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/llvm-project-15.0.7/llvm/test/Transforms/Reassociate/
H A Dfast-ArrayOutOfBounds.ll16 ; CHECK-NEXT: %tmp.26 = fsub float %tmp.8, %tmp.15
17 ; CHECK-NEXT: %tmp.28 = fadd float %tmp.20, %tmp.26
18 ; CHECK-NEXT: %tmp.30 = fsub float %tmp.28, %tmp.23
25 %tmp.4 = fadd float %tmp.2, %a2
26 %tmp.6 = fadd float %tmp.4, %a1
34 %tmp.26 = fsub float %tmp.8, %tmp.15
35 %tmp.28 = fadd float %tmp.26, %tmp.20
36 %tmp.30 = fsub float %tmp.28, %tmp.23
58 %tmp.26 = fsub fast float %tmp.8, %tmp.15
59 %tmp.28 = fadd fast float %tmp.26, %tmp.20
[all …]
H A D2005-09-01-ArrayOutOfBounds.ll8 %tmp.4 = add i32 %tmp.2, %a2
9 %tmp.6 = add i32 %tmp.4, %a1
10 %tmp.8 = add i32 %tmp.6, %a0
12 %tmp.13 = add i32 %tmp.11, %a1
13 %tmp.15 = add i32 %tmp.13, %a0
15 %tmp.20 = add i32 %tmp.18, %a0
17 %tmp.26 = sub i32 %tmp.8, %tmp.15
18 %tmp.28 = add i32 %tmp.26, %tmp.20
19 %tmp.30 = sub i32 %tmp.28, %tmp.23
20 %tmp.32 = sub i32 %tmp.30, %a4
[all …]
/llvm-project-15.0.7/polly/test/ScopInfo/
H A Dpolly-timeout-parameter-bounds.ll20 ; CHECK-NEXT: [tmp] -> { Stmt_bb15[] : -268435455 + tmp <= 1073741824*floor((536870912…
27 ; CHECK-NEXT: [tmp] -> { Stmt_bb18[] : -134217727 + tmp <= 1073741824*floor((536870912…
34 ; CHECK-NEXT: [tmp] -> { Stmt_bb21[] : -67108863 + tmp <= 1073741824*floor((536870912 …
41 ; CHECK-NEXT: [tmp] -> { Stmt_bb24[] : -33554431 + tmp <= 1073741824*floor((536870912 …
48 ; CHECK-NEXT: [tmp] -> { Stmt_bb27[] : -16777215 + tmp <= 1073741824*floor((536870912 …
55 ; CHECK-NEXT: [tmp] -> { Stmt_bb30[] : -8388607 + tmp <= 1073741824*floor((536870912 +…
62 ; CHECK-NEXT: [tmp] -> { Stmt_bb33[] : -4194303 + tmp <= 1073741824*floor((536870912 +…
69 ; CHECK-NEXT: [tmp] -> { Stmt_bb36[] : -2097151 + tmp <= 1073741824*floor((536870912 +…
76 ; CHECK-NEXT: [tmp] -> { Stmt_bb39[] : -1048575 + tmp <= 1073741824*floor((536870912 +…
83 ; CHECK-NEXT: [tmp] -> { Stmt_bb42[] : -524287 + tmp <= 1073741824*floor((536870912 + …
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Generic/
H A D2003-05-28-ManyArgs.ll57 %tmp.137 = load i32, i32* %tmp.112 ; <i32> [#uses=1]
61 %tmp.141 = load i32, i32* %tmp.140 ; <i32> [#uses=1]
63 %tmp.143 = load i32, i32* %tmp.142 ; <i32> [#uses=1]
64 %tmp.145 = load i8*, i8** %tmp.101 ; <i8*> [#uses=1]
66 %tmp.147 = load i32, i32* %tmp.146 ; <i32> [#uses=1]
67 %tmp.149 = load i32, i32* %tmp.114 ; <i32> [#uses=1]
71 %tmp.157 = load i32, i32* %tmp.156 ; <i32> [#uses=1]
91 %tmp.177 = load i32, i32* %tmp.176 ; <i32> [#uses=1]
93 %tmp.179 = load i32, i32* %tmp.178 ; <i32> [#uses=1]
94 %tmp.181 = load i32, i32* %tmp.118 ; <i32> [#uses=1]
[all …]
H A DAPIntLoadStore.ll521 store i1 %tmp, i1* @i1_s
527 store i2 %tmp, i2* @i2_s
533 store i3 %tmp, i3* @i3_s
539 store i4 %tmp, i4* @i4_s
545 store i5 %tmp, i5* @i5_s
551 store i6 %tmp, i6* @i6_s
557 store i7 %tmp, i7* @i7_s
563 store i8 %tmp, i8* @i8_s
569 store i9 %tmp, i9* @i9_s
575 store i10 %tmp, i10* @i10_s
[all …]
H A Dfp_to_int.ll5 ret i8 %tmp.1
10 ret i16 %tmp.1
15 ret i32 %tmp.1
20 ret i64 %tmp.1
25 ret i8 %tmp.1
30 ret i16 %tmp.1
35 ret i32 %tmp.1
40 ret i64 %tmp.1
45 ret i8 %tmp.1
50 ret i16 %tmp.1
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Drlwimi.ll9 %tmp.9 = or i32 %tmp.7, %tmp.3 ; <i32> [#uses=1]
17 %tmp.9 = or i32 %tmp.7, %tmp.3 ; <i32> [#uses=1]
25 %tmp.7 = or i32 %tmp.6, %tmp.3 ; <i32> [#uses=1]
33 %tmp.7 = or i32 %tmp.6, %tmp.3 ; <i32> [#uses=1]
40 %tmp.4 = and i32 %tmp.3, -65536 ; <i32> [#uses=1]
42 %tmp.9 = or i32 %tmp.4, %tmp.7 ; <i32> [#uses=1]
50 %tmp.4 = and i32 %tmp.3, -65536 ; <i32> [#uses=1]
51 %tmp.9 = or i32 %tmp.4, %tmp.7 ; <i32> [#uses=1]
59 %tmp.7 = or i32 %tmp.5, %tmp.2 ; <i32> [#uses=1]
66 %tmp.4 = and i32 %tmp.3, 2 ; <i32> [#uses=1]
[all …]
H A Drlwimi2.ll10 %tmp.4 = and i32 %tmp.1, 32505856 ; <i32> [#uses=1]
12 %tmp.7 = or i32 %tmp.4, %tmp.6 ; <i32> [#uses=1]
14 %tmp.12 = and i32 %tmp.9, 32505856 ; <i32> [#uses=1]
16 %tmp.15 = or i32 %tmp.12, %tmp.14 ; <i32> [#uses=1]
17 %tmp.18 = mul i32 %tmp.7, %alpha ; <i32> [#uses=1]
19 %tmp.22 = mul i32 %tmp.15, %tmp.20 ; <i32> [#uses=1]
20 %tmp.23 = add i32 %tmp.22, %tmp.18 ; <i32> [#uses=2]
21 %tmp.27 = lshr i32 %tmp.23, 5 ; <i32> [#uses=1]
24 %tmp.33 = lshr i32 %tmp.23, 20 ; <i32> [#uses=1]
26 %tmp.35 = and i16 %tmp.34, 992 ; <i16> [#uses=1]
[all …]
H A Drotl.ll8 %tmp.7 = sub i32 32, %sh ; <i32> [#uses=1]
9 %tmp.10 = lshr i32 %x, %tmp.7 ; <i32> [#uses=2]
11 %tmp.12 = or i32 %tmp.10, %tmp.4 ; <i32> [#uses=1]
12 ret i32 %tmp.12
20 %tmp.10 = shl i32 %x, %tmp.7 ; <i32> [#uses=1]
21 %tmp.12 = or i32 %tmp.4, %tmp.10 ; <i32> [#uses=1]
22 ret i32 %tmp.12
29 %tmp.9 = or i32 %tmp.3, %tmp.7 ; <i32> [#uses=1]
30 ret i32 %tmp.9
37 %tmp.9 = or i32 %tmp.3, %tmp.7 ; <i32> [#uses=1]
[all …]
H A Dand_sra.ll6 %tmp.80 = ashr i32 %tmp.79, 15 ; <i32> [#uses=1]
7 %tmp.81 = and i32 %tmp.80, 24 ; <i32> [#uses=1]
8 ret i32 %tmp.81
13 %tmp.80 = ashr i32 %tmp.79, 15 ; <i32> [#uses=1]
15 %tmp.82 = bitcast i32 %tmp.81 to i32 ; <i32> [#uses=1]
16 %tmp.83 = and i32 %tmp.80, %tmp.82 ; <i32> [#uses=1]
17 ret i32 %tmp.83
22 %tmp.2541 = bitcast i32 %tmp.2540 to i32 ; <i32> [#uses=1]
23 %tmp.2542 = shl i32 %tmp.2541, 13 ; <i32> [#uses=1]
24 %tmp.2543 = and i32 %tmp.2542, 8192 ; <i32> [#uses=1]
[all …]
H A Drlwinm.ll12 ret i32 %tmp.1
18 ret i32 %tmp.1
24 %tmp.3 = and i32 %tmp.2, 255 ; <i32> [#uses=1]
25 ret i32 %tmp.3
31 %tmp.4 = and i32 %tmp.3, 255 ; <i32> [#uses=1]
32 ret i32 %tmp.4
38 %tmp.3 = and i32 %tmp.2, -8388608 ; <i32> [#uses=1]
39 ret i32 %tmp.3
45 %tmp.2 = ashr i32 %tmp.1, 8 ; <i32> [#uses=1]
52 %tmp.2 = lshr i32 %tmp.1, 8 ; <i32> [#uses=1]
[all …]
H A Dor-addressing-mode.ll6 %tmp.4.i = and i32 %tmp.2.i, -65536 ; <i32> [#uses=1]
7 %tmp.10.i = lshr i32 %tmp.2.i, 5 ; <i32> [#uses=1]
8 %tmp.11.i = and i32 %tmp.10.i, 2040 ; <i32> [#uses=1]
9 %tmp.13.i = or i32 %tmp.11.i, %tmp.4.i ; <i32> [#uses=1]
10 %tmp.14.i = inttoptr i32 %tmp.13.i to i32* ; <i32*> [#uses=1]
11 %tmp.3 = load i32, i32* %tmp.14.i ; <i32> [#uses=1]
12 ret i32 %tmp.3
17 %tmp.3 = or i32 %tmp.2, 2 ; <i32> [#uses=1]
18 %tmp.4 = inttoptr i32 %tmp.3 to i32* ; <i32*> [#uses=1]
19 %tmp.5 = load i32, i32* %tmp.4 ; <i32> [#uses=1]
[all …]
H A Dsmall-arguments.ll18 %tmp.1 = icmp slt i16 %tmp.0, 1234
30 %tmp.2 = zext i16 %tmp.1 to i32
31 %tmp.3 = and i32 %tmp.2, 255
32 ret i32 %tmp.3
37 %tmp.2 = bitcast i16 %tmp.1 to i16
38 %tmp.3 = zext i16 %tmp.2 to i32
39 %tmp.4 = and i32 %tmp.3, 255
40 ret i32 %tmp.4
45 %tmp.2 = and i32 %tmp.1, 255
46 ret i32 %tmp.2
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/Mem2Reg/
H A D2005-06-30-ReadBeforeWrite.ll18 %tmp.1 = add i32 %tmp.0, 1 ; <i32> [#uses=1]
20 %tmp.3 = icmp sgt i32 %tmp.1, %tmp.2 ; <i1> [#uses=2]
21 %tmp.4 = zext i1 %tmp.3 to i32 ; <i32> [#uses=0]
25 store i32 %tmp.5, i32* %out
28 %tmp.7 = icmp sgt i32 %tmp.6, 0 ; <i1> [#uses=2]
29 %tmp.8 = zext i1 %tmp.7 to i32 ; <i32> [#uses=0]
30 br i1 %tmp.7, label %then, label %endif
34 %tmp.11 = sub i32 %tmp.10, 1 ; <i32> [#uses=1]
35 %tmp.12 = getelementptr i8, i8* %tmp.9, i32 %tmp.11 ; <i8*> [#uses=1]
37 %tmp.14 = trunc i32 %tmp.13 to i8 ; <i8> [#uses=1]
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dapint-add.ll12 %tmp.4 = add i1 %tmp.2, 1
32 %tmp.4 = add i15 %tmp.2, 16384
53 %tmp.4 = add i49 %tmp.2, 1
108 %tmp.4 = xor i111 %x, %tmp.2
109 %tmp.6 = add i111 %tmp.4, %tmp.2
119 %tmp.2 = xor i65 %x, %tmp.0
120 %tmp.4 = add i65 %tmp.2, %tmp.0
131 %tmp.4 = add i1024 %tmp.2, %tmp.0
143 %tmp.2 = xor i128 %x, %tmp.1
144 %tmp.4 = add i128 %tmp.2, %tmp.5
[all …]
H A Dbittest.ll9 %tmp.9 = or i32 %tmp.2, -989855744 ; <i32> [#uses=2]
10 %tmp.16 = and i32 %tmp.9, -805306369 ; <i32> [#uses=2]
11 %tmp.17 = and i32 %tmp.9, -973078529 ; <i32> [#uses=1]
12 store i32 %tmp.17, i32* @b_rec.0
13 %tmp.17.shrunk = bitcast i32 %tmp.16 to i32 ; <i32> [#uses=1]
14 %tmp.22 = and i32 %tmp.17.shrunk, -1073741824 ; <i32> [#uses=1]
15 %tmp.23 = icmp eq i32 %tmp.22, -1073741824 ; <i1> [#uses=1]
16 br i1 %tmp.23, label %endif.0, label %then.0
23 %tmp.17.shrunk2 = bitcast i32 %tmp.16 to i32 ; <i32> [#uses=1]
24 %tmp.27.mask = and i32 %tmp.17.shrunk2, 100663295 ; <i32> [#uses=1]
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/NVPTX/
H A DAPIntLoadStore.ll135 store i1 %tmp, i1* @i1_s
141 store i2 %tmp, i2* @i2_s
147 store i3 %tmp, i3* @i3_s
153 store i4 %tmp, i4* @i4_s
159 store i5 %tmp, i5* @i5_s
165 store i6 %tmp, i6* @i6_s
171 store i7 %tmp, i7* @i7_s
177 store i8 %tmp, i8* @i8_s
183 store i9 %tmp, i9* @i9_s
189 store i10 %tmp, i10* @i10_s
[all …]
/llvm-project-15.0.7/libc/AOR_v20.02/math/test/rtest/
H A Drandom.c88 uint32 tmp; in random_upto_biased() local
89 tmp = random_upto_internal(limit, mask); if (tmp < ret) ret = tmp; in random_upto_biased()
90 tmp = random_upto_internal(limit, mask); if (tmp < ret) ret = tmp; in random_upto_biased()
91 tmp = random_upto_internal(limit, mask); if (tmp < ret) ret = tmp; in random_upto_biased()
92 tmp = random_upto_internal(limit, mask); if (tmp < ret) ret = tmp; in random_upto_biased()
93 tmp = random_upto_internal(limit, mask); if (tmp < ret) ret = tmp; in random_upto_biased()
94 tmp = random_upto_internal(limit, mask); if (tmp < ret) ret = tmp; in random_upto_biased()
95 tmp = random_upto_internal(limit, mask); if (tmp < ret) ret = tmp; in random_upto_biased()
96 tmp = random_upto_internal(limit, mask); if (tmp < ret) ret = tmp; in random_upto_biased()
/llvm-project-15.0.7/lldb/test/Shell/Commands/
H A Dcommand-disassemble.s17 # CHECK-NEXT: command-disassemble.s.tmp`foo:
26 # CHECK-NEXT: command-disassemble.s.tmp`bar:
37 # CHECK-NEXT: command-disassemble.s.tmp`foo:
43 # CHECK-NEXT: command-disassemble.s.tmp`foo:
56 # CHECK-NEXT: command-disassemble.s.tmp`very_long:
61 # CHECK-NEXT: command-disassemble.s.tmp`very_long:
65 # CHECK-NEXT: command-disassemble.s.tmp`foo:
76 # CHECK-NEXT: command-disassemble.s.tmp`n1::case1:
79 # CHECK-NEXT: command-disassemble.s.tmp`n2::case1:
83 # CHECK-NEXT: command-disassemble.s.tmp`n1::case2:
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/LoopSimplify/
H A D2003-08-15-PreheadersFail.ll15 %tmp.36 = load i32, i32* null ; <i32> [#uses=1]
16 store i32 %tmp.36, i32* %tmp.35
21 %tmp.92 = sext i32 %tmp.91 to i64 ; <i64> [#uses=1]
22 %tmp.93 = getelementptr [787 x i16], [787 x i16]* @yy_base, i64 0, i64 %tmp.92 ; <i16*> [#uses=1]
23 %tmp.94 = load i16, i16* %tmp.93 ; <i16> [#uses=1]
24 %tmp.95 = icmp ne i16 %tmp.94, 4394 ; <i1> [#uses=1]
30 %tmp.106 = icmp ne i32 %tmp.105, 0 ; <i1> [#uses=1]
34 %tmp.115 = sext i16 %tmp.114 to i32 ; <i32> [#uses=1]
35 %tmp.116 = icmp slt i32 0, %tmp.115 ; <i1> [#uses=1]
42 %tmp.145 = and i32 %tmp.144, 8192 ; <i32> [#uses=1]
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/IndVarSimplify/
H A Dvariable-stride-ivs-0.ll5 ; cycles, allowing the tmp.21 subtraction to be eliminated.
10 %tmp.2 = load i32, i32* %tmp.1 ; <i32> [#uses=2]
12 %tmp.5 = load i32, i32* %tmp.4 ; <i32> [#uses=2]
14 %tmp.9 = load i32, i32* %tmp.8 ; <i32> [#uses=3]
15 %tmp.125 = icmp sgt i32 %tmp.2, 0 ; <i1> [#uses=1]
19 %tmp.16 = getelementptr i32, i32* %data, i32 %tmp.9 ; <i32*> [#uses=1]
26 … %m.0.0 = phi i32 [ %tmp.5, %no_exit.preheader ], [ %tmp.24, %no_exit ] ; <i32> [#uses=2]
27 store i32 2, i32* %tmp.16
29 store i32 %tmp.21, i32* %data
30 %tmp.24 = add i32 %m.0.0, %tmp.9 ; <i32> [#uses=1]
[all …]
/llvm-project-15.0.7/clang/test/SemaOpenCL/
H A Dclang-builtin-version.cl8 int tmp;
9 …enqueue_kernel(tmp, tmp, tmp, ^(void) { // expected-error{{use of undeclared identifier 'enqueue_k…
30 int tmp;
41 read_pipe(tmp, tmp); // expected-error{{use of undeclared identifier 'read_pipe'}}
43 write_pipe(tmp, tmp); // expected-error{{use of undeclared identifier 'write_pipe'}}
45 …reserve_read_pipe(tmp, tmp); // expected-error{{use of undeclared identifier 'reserve_read_pipe'}}
46 …reserve_write_pipe(tmp, tmp); // expected-error{{use of undeclared identifier 'reserve_write_pipe'…
54 commit_read_pipe(tmp, tmp); // expected-error{{use of undeclared identifier 'commit_read_pipe'}}
55 commit_write_pipe(tmp, tmp); // expected-error{{use of undeclared identifier 'commit_write_pipe'}}
60 …sub_group_commit_write_pipe(tmp, tmp); // expected-error{{use of undeclared identifier 'sub_group_…
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/
H A Drv32zbp-intrinsic.ll13 ret i32 %tmp
23 ret i32 %tmp
32 ret i32 %tmp
41 ret i32 %tmp
50 ret i32 %tmp
59 ret i32 %tmp
68 ret i32 %tmp
77 ret i32 %tmp
88 ret i32 %tmp
98 ret i32 %tmp
[all …]
H A Drv64zbp-intrinsic.ll13 ret i32 %tmp
25 ret i32 %tmp
34 ret i32 %tmp
43 ret i32 %tmp
54 ret i32 %tmp
66 ret i32 %tmp
75 ret i32 %tmp
84 ret i32 %tmp
95 ret i32 %tmp
107 ret i32 %tmp
[all …]
/llvm-project-15.0.7/polly/test/CodeGen/
H A Dphi_loop_carried_float_escape.ll8 ; float tmp = 0;
10 ; tmp += A[i];
11 ; return tmp;
15 ; CHECK-NEXT: %tmp.0.merge = phi float [ %tmp.0.final_reload, %polly.exiting ], [ %tmp.0, %bb8 ]
23 ; CHECK-NEXT: %tmp.0.final_reload = load float, float* %tmp.0.s2a
27 ; CHECK-NEXT: %tmp.0.phiops.reload[[R1:[0-9]*]] = load float, float* %tmp.0.phiops
28 ; CHECK-: store float %tmp.0.phiops.reload[[R1]], float* %tmp.0.s2a
31 ; CHECK: %tmp.0.s2a.reload[[R3:[0-9]*]] = load float, float* %tmp.0.s2a
38 ; CHECK: store float %tmp.0.phiops.reload[[R2]], float* %tmp.0.s2a
44 %tmp = sext i32 %N to i64
[all …]

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