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Searched refs:tiling (Results 1 – 25 of 62) sorted by relevance

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/llvm-project-15.0.7/polly/lib/External/ppcg/
H A Dhybrid.c278 if (!tiling) in ppcg_ht_tiling_free()
293 free(tiling); in ppcg_ht_tiling_free()
303 if (!tiling) in ppcg_ht_tiling_copy()
314 if (!tiling) in ppcg_ht_tiling_get_ctx()
853 if (!tiling) in ppcg_ht_tiling_set_project_ts()
939 if (!tiling->input_schedule || !tiling->local_time || !tiling->hex || in ppcg_ht_bounds_construct_tiling()
940 !tiling->shift_space || !tiling->shift_phase) in ppcg_ht_bounds_construct_tiling()
943 tiling = ppcg_ht_tiling_set_project_ts(tiling); in ppcg_ht_bounds_construct_tiling()
1394 phase->tiling = ppcg_ht_tiling_copy(tiling); in construct_phase()
1461 tiling = phase->tiling; in shift_phase()
[all …]
H A Dgpu_group.c1727 isl_multi_aff *tiling; in strided_tile() local
1758 tiling = isl_multi_aff_range_map(isl_space_copy(space)); in strided_tile()
1759 tiling = isl_multi_aff_add(tiling, shift); in strided_tile()
1760 tiling = isl_multi_aff_scale_down_multi_val(tiling, stride); in strided_tile()
1762 return tiling; in strided_tile()
1789 isl_multi_aff *tiling, *lb, *insert_array; in gpu_array_ref_group_compute_tiling() local
1807 tiling = strided_tile(tile, space, insert_array); in gpu_array_ref_group_compute_tiling()
1818 tiling = isl_multi_aff_sub(tiling, lb); in gpu_array_ref_group_compute_tiling()
1820 p = isl_printer_to_str(isl_multi_aff_get_ctx(tiling)); in gpu_array_ref_group_compute_tiling()
1824 tiling = isl_multi_aff_set_tuple_name(tiling, isl_dim_out, local_name); in gpu_array_ref_group_compute_tiling()
[all …]
H A DChangeLog4 - support hybrid tiling
20 - optionally perform tiling for C target
H A Dgpu_array_tile.h51 isl_multi_aff *tiling; member
/llvm-project-15.0.7/polly/test/ScheduleOptimizer/
H A Drectangular-tiling.ll7 ; CHECK: // 1st level tiling - Tiles
10 ; CHECK: // 1st level tiling - Points
20 ; TWOLEVEL: // 1st level tiling - Tiles
23 ; TWOLEVEL: // 1st level tiling - Points
24 ; TWOLEVEL: // 2nd level tiling - Tiles
27 ; TWOLEVEL: // 2nd level tiling - Points
33 ; TWO-PLUS-REGISTER: // 1st level tiling - Tiles
36 ; TWO-PLUS-REGISTER: // 1st level tiling - Points
37 ; TWO-PLUS-REGISTER: // 2nd level tiling - Tiles
40 ; TWO-PLUS-REGISTER: // 2nd level tiling - Points
[all …]
H A Dpattern-matching-based-opts_3.ll29 ; CHECK-NEXT: // 1st level tiling - Tiles
32 ; CHECK-NEXT: // 1st level tiling - Points
37 ; CHECK-NEXT: // Register tiling - Tiles
41 ; CHECK-NEXT: // Register tiling - Points
81 ; EXTRACTION-OF-MACRO-KERNEL-NEXT: // 1st level tiling - Tiles
84 ; EXTRACTION-OF-MACRO-KERNEL-NEXT: // 1st level tiling - Points
89 ; EXTRACTION-OF-MACRO-KERNEL-NEXT: // 1st level tiling - Tiles
98 ; EXTRACTION-OF-MACRO-KERNEL-NEXT: // 1st level tiling - Points
99 ; EXTRACTION-OF-MACRO-KERNEL-NEXT: // Register tiling - Tiles
104 ; EXTRACTION-OF-MACRO-KERNEL-NEXT: // Register tiling - Points
H A Dmat_mul_pattern_data_layout_2.ll23 ; CHECK-NEXT: // 1st level tiling - Tiles
26 ; CHECK-NEXT: // 1st level tiling - Points
31 ; CHECK-NEXT: // 1st level tiling - Tiles
40 ; CHECK-NEXT: // 1st level tiling - Points
41 ; CHECK-NEXT: // Register tiling - Tiles
46 ; CHECK-NEXT: // Register tiling - Points
H A Dpattern-matching-based-opts_13.ll13 ; CHECK: // 1st level tiling - Tiles
23 ; CHECK-NEXT: // 1st level tiling - Points
24 ; CHECK-NEXT: // Register tiling - Tiles
30 ; CHECK-NEXT: // Register tiling - Points
68 ; CHECK-NEXT: // Register tiling - Points
H A Dpattern-matching-based-opts_8.ll26 ; CHECK: // 1st level tiling - Tiles
35 ; CHECK-NEXT: // 1st level tiling - Points
36 ; CHECK-NEXT: // Register tiling - Tiles
41 ; CHECK-NEXT: // Register tiling - Points
H A Dpattern-matching-based-opts_6.ll41 ; CHECK: // 1st level tiling - Tiles
50 ; CHECK-NEXT: // 1st level tiling - Points
51 ; CHECK-NEXT: // Register tiling - Tiles
57 ; CHECK-NEXT: // Register tiling - Points
96 ; CHECK-NEXT: // Register tiling - Points
H A Dpattern-matching-based-opts_4.ll25 ; PATTERN-MATCHING-OPTS: // 1st level tiling - Tiles
34 ; PATTERN-MATCHING-OPTS-NEXT: // 1st level tiling - Points
35 ; PATTERN-MATCHING-OPTS-NEXT: // Register tiling - Tiles
40 ; PATTERN-MATCHING-OPTS-NEXT: // Register tiling - Points
H A Douter_coincidence.ll1 ; RUN: opt %loadPolly -polly-tiling=0 -polly-parallel -polly-opt-outer-coincidence=no -polly-opt-i…
2 ; RUN: opt %loadPolly -polly-tiling=0 -polly-parallel -polly-opt-outer-coincidence=yes -polly-opt-i…
H A Dpattern-matching-based-opts_7.ll25 ; CHECK: // 1st level tiling - Tiles
34 ; CHECK-NEXT: // 1st level tiling - Points
35 ; CHECK-NEXT: // Register tiling - Tiles
40 ; CHECK-NEXT: // Register tiling - Points
/llvm-project-15.0.7/mlir/test/Dialect/Affine/
H A Dloop-tiling-validity.mlir30 // The default tiling method (hyper-rect) will violate tiling legality.
37 // expected-remark@above {{tiling code is illegal due to dependences}}
/llvm-project-15.0.7/llvm/docs/AMDGPU/
H A Dgfx1030_srsrc_5dafbc.rst13 … which defines the location of the image buffer in memory, its dimensions, tiling, and data format.
H A Dgfx1013_srsrc_5dafbc.rst13 … which defines the location of the image buffer in memory, its dimensions, tiling, and data format.
H A Dgfx90a_srsrc_79ffcd.rst13 … which defines the location of the image buffer in memory, its dimensions, tiling, and data format.
H A Dgfx9_srsrc_79ffcd.rst13 … which defines the location of the image buffer in memory, its dimensions, tiling, and data format.
H A Dgfx1030_srsrc_cf7132.rst13 … which defines the location of the image buffer in memory, its dimensions, tiling, and data format.
H A Dgfx8_srsrc_cf7132.rst13 … which defines the location of the image buffer in memory, its dimensions, tiling, and data format.
H A Dgfx1013_srsrc_cf7132.rst13 … which defines the location of the image buffer in memory, its dimensions, tiling, and data format.
H A Dgfx7_srsrc_cf7132.rst13 … which defines the location of the image buffer in memory, its dimensions, tiling, and data format.
H A Dgfx10_srsrc_cf7132.rst13 … which defines the location of the image buffer in memory, its dimensions, tiling, and data format.
/llvm-project-15.0.7/mlir/include/mlir/Interfaces/
H A DTilingInterface.td1 //===- TilingInterface.td - Interface for tiling operations *- tablegen -*-===//
83 or not. Avoiding tiling `dest` operands can be useful for
148 or not. Avoiding tiling `dest` operands can be useful for
/llvm-project-15.0.7/mlir/test/Dialect/Linalg/
H A Dmultisize-tiling-full.mlir5 // This implements a 2D multisize tiling with target sizes [3, 10].
42 // 2D multi-size tiling should produce for quadrants with sizes

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