Home
last modified time | relevance | path

Searched refs:test_v4i32 (Results 1 – 25 of 36) sorted by relevance

12

/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Dvec_mul.ll7 define <4 x i32> @test_v4i32(<4 x i32>* %X, <4 x i32>* %Y) {
13 ; CHECK-LABEL: test_v4i32:
16 ; CHECK-LE-LABEL: test_v4i32:
19 ; CHECK-VSX-LABEL: test_v4i32:
22 ; CHECK-LE-VSX-LABEL: test_v4i32:
H A Dvec_clz.ll41 define <4 x i32> @test_v4i32(<4 x i32> %x) nounwind readnone {
42 ; CHECK-LABEL: test_v4i32:
47 ; CHECK-NOVSX-LABEL: test_v4i32:
H A Dvavg.ll49 define <4 x i32> @test_v4i32(<4 x i32> %m, <4 x i32> %n) {
50 ; CHECK-P9-LABEL: test_v4i32:
55 ; CHECK-P8-LABEL: test_v4i32:
60 ; CHECK-P7-LABEL: test_v4i32:
H A Dppc64le-aggregates.ll163 tail call void @test_v4i32(i64 %x, [4 x <4 x i32>] %y, i64 %x)
168 ; CHECK: bl test_v4i32
170 declare void @test_v4i32(i64, [4 x <4 x i32>], i64)
/llvm-project-15.0.7/clang/test/CodeGen/
H A Dmips-vector-return.c28 v4i32 test_v4i32(int a) { in test_v4i32() function
H A Dmips-vector-arg.c25 void test_v4i32(v4i32 a1, int a2, v4i32 a3) { in test_v4i32() function
H A Dmips-varargs.c128 int test_v4i32(char *fmt, ...) { in test_v4i32() function
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dvector-reduce-add-zext.ll206 define i32 @test_v4i32(<4 x i8> %a0) {
207 ; SSE2-LABEL: test_v4i32:
215 ; SSE41-LABEL: test_v4i32:
223 ; AVX1-LABEL: test_v4i32:
231 ; AVX2-LABEL: test_v4i32:
239 ; AVX512-LABEL: test_v4i32:
H A Dabs.ll260 define <4 x i32> @test_v4i32(<4 x i32> %a) nounwind {
261 ; SSE-LABEL: test_v4i32:
269 ; AVX-LABEL: test_v4i32:
274 ; X86-LABEL: test_v4i32:
H A Dsmax.ll306 define <4 x i32> @test_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
307 ; SSE-LABEL: test_v4i32:
316 ; AVX-LABEL: test_v4i32:
321 ; X86-LABEL: test_v4i32:
H A Dsmin.ll305 define <4 x i32> @test_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
306 ; SSE-LABEL: test_v4i32:
315 ; AVX-LABEL: test_v4i32:
320 ; X86-LABEL: test_v4i32:
H A Dvector-reduce-add-mask.ll348 define i32 @test_v4i32(<4 x i32> %a0) {
349 ; SSE2-LABEL: test_v4i32:
359 ; SSE41-LABEL: test_v4i32:
369 ; AVX1-SLOW-LABEL: test_v4i32:
379 ; AVX1-FAST-LABEL: test_v4i32:
387 ; AVX2-LABEL: test_v4i32:
397 ; AVX512BW-LABEL: test_v4i32:
406 ; AVX512BWVL-LABEL: test_v4i32:
H A Dumax.ll308 define <4 x i32> @test_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
309 ; SSE-LABEL: test_v4i32:
321 ; AVX-LABEL: test_v4i32:
326 ; X86-LABEL: test_v4i32:
H A Dumin.ll307 define <4 x i32> @test_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
308 ; SSE-LABEL: test_v4i32:
320 ; AVX-LABEL: test_v4i32:
325 ; X86-LABEL: test_v4i32:
H A Dfast-isel-vecload.ll40 define <4 x i32> @test_v4i32(ptr %V) {
41 ; SSE-LABEL: test_v4i32:
46 ; AVX-LABEL: test_v4i32:
H A Dvector-reduce-add.ll236 define i32 @test_v4i32(<4 x i32> %a0) {
237 ; SSE-LABEL: test_v4i32:
246 ; AVX1-SLOW-LABEL: test_v4i32:
255 ; AVX1-FAST-LABEL: test_v4i32:
262 ; AVX2-LABEL: test_v4i32:
271 ; AVX512-LABEL: test_v4i32:
H A Dvector-reduce-or-cmp.ll206 define i1 @test_v4i32(<4 x i32> %a0) {
207 ; SSE2-LABEL: test_v4i32:
216 ; SSE41-LABEL: test_v4i32:
222 ; AVX-LABEL: test_v4i32:
H A Dnontemporal-loads.ll34 define <4 x i32> @test_v4i32(ptr %src) {
35 ; SSE2-LABEL: test_v4i32:
40 ; SSE41-LABEL: test_v4i32:
45 ; AVX-LABEL: test_v4i32:
50 ; AVX512-LABEL: test_v4i32:
H A Dvector-reduce-add-sext.ll408 define i32 @test_v4i32(<4 x i8> %a0) {
409 ; SSE2-LABEL: test_v4i32:
421 ; SSE41-LABEL: test_v4i32:
431 ; AVX1-SLOW-LABEL: test_v4i32:
441 ; AVX1-FAST-LABEL: test_v4i32:
449 ; AVX2-LABEL: test_v4i32:
459 ; AVX512-LABEL: test_v4i32:
H A Dvector-reduce-xor.ll200 define i32 @test_v4i32(<4 x i32> %a0) {
201 ; SSE-LABEL: test_v4i32:
210 ; AVX-LABEL: test_v4i32:
/llvm-project-15.0.7/llvm/test/CodeGen/Thumb2/
H A Dmve-selectcc.ll4 define arm_aapcs_vfpcc <4 x i32> @test_v4i32(i32 %x, <4 x i32> %s0, <4 x i32> %s1) {
5 ; CHECK-LABEL: test_v4i32:
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dcttz_vector.ll223 define void @test_v4i32(<4 x i32>* %p) {
224 ; CHECK-LABEL: test_v4i32:
/llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/X86/
H A Dhsub-inseltpoison.ll75 define <4 x i32> @test_v4i32(<4 x i32> %a, <4 x i32> %b) {
76 ; CHECK-LABEL: @test_v4i32(
H A Dhsub.ll75 define <4 x i32> @test_v4i32(<4 x i32> %a, <4 x i32> %b) {
76 ; CHECK-LABEL: @test_v4i32(
/llvm-project-15.0.7/llvm/test/CodeGen/NVPTX/
H A Dparam-load-store.ll637 ; CHECK-LABEL: test_v4i32(
644 ; CHECK-NEXT: test_v4i32,
648 define <4 x i32> @test_v4i32(<4 x i32> %a) {
649 %r = tail call <4 x i32> @test_v4i32(<4 x i32> %a);

12