Home
last modified time | relevance | path

Searched refs:t8 (Results 1 – 25 of 321) sorted by relevance

12345678910>>...13

/llvm-project-15.0.7/llvm/test/MC/LoongArch/Basic/Integer/
H A Dbit-manipu.s16 # CHECK-ASM: ext.w.b $t8, $t6
18 ext.w.b $t8, $t6
44 # CHECK-ASM-AND-OBJ: revb.2h $t8, $a7
46 revb.2h $t8, $a7
64 # CHECK-ASM-AND-OBJ: maskeqz $t8, $a7, $t6
66 maskeqz $t8, $a7, $t6
68 # CHECK-ASM-AND-OBJ: masknez $t8, $t1, $s3
70 masknez $t8, $t1, $s3
87 # CHECK64-ASM-AND-OBJ: cto.d $t6, $t8
89 cto.d $t6, $t8
[all …]
H A Dmisc.s47 # CHECK64-ASM-AND-OBJ: asrtgt.d $t8, $t8
49 asrtgt.d $t8, $t8
H A Datomic.s68 # CHECK64-ASM-AND-OBJ: amxor.d $a4, $t8, $s5
70 amxor.d $a4, $t8, $s5
76 # CHECK64-ASM-AND-OBJ: ammax.d $a5, $t8, $s4
78 ammax.d $a5, $t8, $s4
140 # CHECK64-ASM-AND-OBJ: amxor_db.d $a4, $t8, $s5
142 amxor_db.d $a4, $t8, $s5
148 # CHECK64-ASM-AND-OBJ: ammax_db.d $a5, $t8, $s4
150 ammax_db.d $a5, $t8, $s4
H A Dbound-check.s36 # CHECK-ASM-AND-OBJ: ldle.d $t8, $t3, $t4
38 ldle.d $t8, $t3, $t4
40 # CHECK-ASM-AND-OBJ: stgt.b $s4, $t7, $t8
42 stgt.b $s4, $t7, $t8
H A Dbit-shift.s44 # CHECK-ASM-AND-OBJ: rotri.w $s0, $t8, 23
46 rotri.w $s0, $t8, 23
55 # CHECK64-ASM-AND-OBJ: sll.d $t8, $t3, $sp
57 sll.d $t8, $t3, $sp
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dmidpoint-int.ll30 %t8 = lshr i32 %t7, 1
53 %t8 = lshr i32 %t7, 1
54 %t9 = mul i32 %t8, %t4
80 %t8 = lshr i32 %t7, 1
105 %t8 = lshr i32 %t7, 1
132 %t8 = lshr i32 %t7, 1
161 %t8 = lshr i64 %t7, 1
184 %t8 = lshr i64 %t7, 1
211 %t8 = lshr i64 %t7, 1
236 %t8 = lshr i64 %t7, 1
[all …]
H A Darm64-leaf.ll4 define void @t8() nounwind ssp {
5 ; CHECK-LABEL: t8:
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dvec_ins_extract-1.ll8 define i32 @t0(i32 inreg %t7, <4 x i32> inreg %t8) nounwind {
31 %t13 = insertelement <4 x i32> %t8, i32 76, i32 %t7
36 define i32 @t1(i32 inreg %t7, <4 x i32> inreg %t8) nounwind {
61 %t13 = insertelement <4 x i32> %t8, i32 76, i32 0
66 define <4 x i32> @t2(i32 inreg %t7, <4 x i32> inreg %t8) nounwind {
87 %t9 = extractelement <4 x i32> %t8, i32 %t7
88 %t13 = insertelement <4 x i32> %t8, i32 %t9, i32 0
92 define <4 x i32> @t3(i32 inreg %t7, <4 x i32> inreg %t8) nounwind {
115 %t9 = extractelement <4 x i32> %t8, i32 0
116 %t13 = insertelement <4 x i32> %t8, i32 %t9, i32 %t7
H A Dmasked-iv-safe.ll43 %t8 = fmul double %t7, 4.5
44 store double %t8, ptr %t6
89 %t8 = fmul double %t7, 4.5
90 store double %t8, ptr %t6
137 %t8 = fmul double %t7, 4.5
138 store double %t8, ptr %t6
185 %t8 = fmul double %t7, 4.5
186 store double %t8, ptr %t6
236 store double %t8, ptr %t6
290 store double %t8, ptr %t6
[all …]
H A Dmidpoint-int.ll58 %t8 = lshr i32 %t7, 1
108 %t8 = lshr i32 %t7, 1
109 %t9 = mul i32 %t8, %t4
163 %t8 = lshr i32 %t7, 1
216 %t8 = lshr i32 %t7, 1
272 %t8 = lshr i32 %t7, 1
348 %t8 = lshr i64 %t7, 1
418 %t8 = lshr i64 %t7, 1
496 %t8 = lshr i64 %t7, 1
994 %t8 = lshr i8 %t7, 1
[all …]
H A Dmasked-iv-unsafe.ll50 %t8 = fmul double %t7, 4.5
51 store double %t8, ptr %t6
104 %t8 = fmul double %t7, 4.5
105 store double %t8, ptr %t6
164 %t8 = fmul double %t7, 4.5
165 store double %t8, ptr %t6
224 %t8 = fmul double %t7, 4.5
225 store double %t8, ptr %t6
279 store double %t8, ptr %t6
507 %t8 = fmul double %t7, 4.5
[all …]
/llvm-project-15.0.7/llvm/test/tools/llvm-ml/
H A Dindirect_branch.asm110 t8: label
111 call qword ptr [t8]
112 jmp qword ptr [t8]
113 ; CHECK-64-LABEL: t8:
114 ; CHECK-64: call qword ptr [rip + t8]
117 t8: label
118 call dword ptr [t8]
119 jmp dword ptr [t8]
120 ; CHECK-32-LABEL: t8:
121 ; CHECK-32: call dword ptr [t8]
[all …]
H A Drip_relative_addressing.asm51 t8: label
52 mov eax, [t8]
53 ; CHECK-LABEL: t8:
54 ; CHECK: mov eax, dword ptr [t8]
/llvm-project-15.0.7/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/
H A Dx86_isel.ll.expected35 ; PIC-NEXT: t8: i64 = SUBREG_TO_REG TargetConstant:i64<0>, t7, TargetConstant:i32<6>
36 ; PIC-NEXT: t11: ch,glue = CopyToReg t0, Register:i64 $rax, t8
45 ; WIN-NEXT: t8: i64 = SUBREG_TO_REG TargetConstant:i64<0>, t7, TargetConstant:i32<6>
46 ; WIN-NEXT: t11: ch,glue = CopyToReg t0, Register:i64 $rax, t8
63 ; PIC-NEXT: t15: i32 = MOVZX32rr16 t8
75 ; WIN-NEXT: t8: i64 = SUBREG_TO_REG TargetConstant:i64<0>, t14, TargetConstant:i32<6>
76 ; WIN-NEXT: t11: ch,glue = CopyToReg t0, Register:i64 $rax, t8
92 ; PIC-NEXT: t8: i8,i32,ch = ADD8rm<Mem:(dereferenceable load (s8) from %ir.loc)> t3, TargetFrame…
93 ; PIC-NEXT: t15: i32 = MOVZX32rr8 t8
105 ; WIN-NEXT: t8: i64 = SUBREG_TO_REG TargetConstant:i64<0>, t14, TargetConstant:i32<6>
[all …]
/llvm-project-15.0.7/flang/test/Evaluate/
H A Dfolding28.f9022 real(8), parameter :: t8 = tiny(1.0_8), t8z = z'0010000000000000' variable
23 logical, parameter :: test_t8 = t8 == t8z
24 real(8), parameter :: sqrt_t8 = sqrt(t8), sqrt_t8z = z'2000000000000000'
27 logical, parameter :: test_sqr_sqrt_t8 = sqr_sqrt_t8 == t8
/llvm-project-15.0.7/llvm/test/MC/LoongArch/Basic/Privilege/
H A Dvalid.s36 # CHECK-ASM-AND-OBJ: iocsrrd.w $a6, $t8
38 iocsrrd.w $a6, $t8
48 # CHECK-ASM-AND-OBJ: iocsrwr.w $t8, $s3
50 iocsrwr.w $t8, $s3
114 # CHECK64-ASM-AND-OBJ: iocsrwr.d $t8, $a3
116 iocsrwr.d $t8, $a3
/llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/X86/
H A Dpr52275.ll60 %t8 = insertelement <2 x i8> %t6, i8 %t7, i64 0
62 %t10 = insertelement <2 x i8> %t8, i8 %t9, i64 1
63 %t11 = add <2 x i8> %t10, %t8
94 %t8 = insertelement <2 x i8> %t6, i8 %t7, i64 1
96 %t10 = insertelement <2 x i8> %t8, i8 %t9, i64 0
97 %t11 = add <2 x i8> %t10, %t8
128 %t8 = insertelement <4 x i8> %t6, i8 %t7, i64 0
130 %t10 = insertelement <4 x i8> %t8, i8 %t9, i64 1
131 %t11 = add <4 x i8> %t10, %t8
162 %t8 = insertelement <4 x i8> %t6, i8 %t7, i64 3
[all …]
/llvm-project-15.0.7/cross-project-tests/debuginfo-tests/clang_llvm_roundtrip/
H A Dsimplified_template_names.cpp154 struct t8 { struct
322 struct t8 { decltype(A) m; }; in main() argument
323 f1<void(t8, decltype(A))>(); in main()
324 f1<void(t8)>(); in main()
337 void t8::mem() { in mem()
340 f1<decltype(&t8::mem)>(); in mem()
/llvm-project-15.0.7/llvm/test/Transforms/Reassociate/
H A Dmightymul.ll13 %t8 = mul i32 %t7, %t7
14 %t9 = mul i32 %t8, %t8
H A Dfast-mightymul.ll13 %t8 = fmul fast float %t7, %t7
14 %t9 = fmul fast float %t8, %t8
/llvm-project-15.0.7/compiler-rt/test/asan/TestCases/Posix/
H A Dstack-overflow.cpp39 int t0, t1, t2, t3, t4, t5, t6, t7, t8, t9, t10, t11, t12, t13; in recursive_func()
48 t8 = z8; in recursive_func()
63 z8 = t8; in recursive_func()
/llvm-project-15.0.7/llvm/test/tools/llvm-objcopy/ELF/
H A Dstrip-all.test34 # RUN: cp %t %t8
35 # RUN: llvm-objcopy -S %t8 %t8
36 # RUN: cmp %t2 %t8
/llvm-project-15.0.7/lld/test/ELF/
H A Dversion-script-complex-wildcards.s44 # RUN: echo "FOO { global: extern \"C++\" { a[x-za-b][a-c]*; }; };" > %t8.script
45 # RUN: ld.lld --version-script %t8.script -shared %t.o -o %t8.so
46 # RUN: llvm-readobj -V %t8.so | FileCheck %s --check-prefix=ABBABC
/llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/vect/
H A Dvect-bool-basic-compile.ll35 …%t8 = shufflevector <4 x i1> %t7, <4 x i1> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef…
36 %t9 = bitcast <8 x i1> %t8 to i8
51 %t8 = insertelement <8 x i1> undef, i1 %t0, i32 0
52 %t9 = insertelement <8 x i1> %t8, i1 %t1, i32 1
/llvm-project-15.0.7/clang/test/CodeGen/
H A Dms_struct-bitfield-1.c70 } ATTR t8; variable
71 static int a8[(sizeof(t8) == 4) -1];

12345678910>>...13