| /llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/ |
| H A D | Atomics.ll | 17 %t41 = atomicrmw and i64* @sll, i64 1 monotonic 46 %t41 = atomicrmw and i64* @sll, i64 11 monotonic 47 store i64 %t41, i64* @sll, align 8
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| H A D | rdf-filter-defs.ll | 116 %t41 = phi i8* [ %t38, %b16 ], [ %t39, %b17 ] 118 %t43 = getelementptr inbounds i8, i8* %t41, i32 %p1
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| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | haddsub-shuf-undef-operand.ll | 18 …%t41 = tail call <4 x double> @llvm.x86.avx.hadd.pd.256(<4 x double> %shuffle11, <4 x double> %t40) 19 %t42 = tail call <4 x double> @llvm.x86.avx.hsub.pd.256(<4 x double> %z, <4 x double> %t41)
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| H A D | pseudo_cmov_lower.ll | 181 %t41 = select i1 %cmp, double %v42, double %t43 192 store double %t41, ptr %add.ptr41, align 8 244 %t41 = select i1 %cmp, <64 x i1> %v42, <64 x i1> %t43 249 store <64 x i1> %t41, ptr %add.ptr41, align 16
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| H A D | lsr-reuse.ll | 542 %t41 = fadd float %t23, %t40 ; <float> [#uses=1] 543 %t42 = insertelement <4 x float> undef, float %t41, i32 0 ; <<4 x float>> [#uses=1]
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| /llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/X86/ |
| H A D | inst_size_bug.ll | 27 %t41 = icmp sgt i64 0, %val 34 %phi1 = phi i1 [ %t41, %entry]
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| H A D | pr49933.ll | 59 %t41 = select i1 %t39, i8 %t38, i8 %t40 61 store i8 %t41, i8* %t42, align 1, !tbaa !3
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| H A D | reorder_repeated_ops.ll | 82 %t41 = icmp sgt i32 %t40, undef 83 %t42 = select i1 %t41, i32 undef, i32 %t40
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| H A D | vec_list_bias-inseltpoison.ll | 87 %t41 = mul nsw i32 %t25, 2446
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| H A D | vec_list_bias.ll | 87 %t41 = mul nsw i32 %t25, 2446
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| H A D | bad-reduction.ll | 484 %t41 = zext i8 %t40 to i32 494 %t42 = shl nuw i32 %t41, 24
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| /llvm-project-15.0.7/llvm/test/Transforms/IndVarSimplify/ |
| H A D | eliminate-rem.ll | 74 %t22 = phi i64 [ %t41, %bb21 ], [ 0, %bb20 ] ; <i64> [#uses=4] 93 %t41 = add nsw i64 %t22, 1 ; <i64> [#uses=2] 94 %t42 = icmp slt i64 %t41, %arg1 ; <i1> [#uses=1]
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| H A D | ashr-tripcount.ll | 87 %t41 = fmul float %t25, %invQuantizer.0 ; <float> [#uses=1] 90 store float %t41, float* %t43, align 4
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| /llvm-project-15.0.7/llvm/test/Transforms/Reassociate/ |
| H A D | 2012-05-08-UndefLeak.ll | 53 %t41 = add i64 %t40, %t6 54 %t42 = add i64 %t41, %t7
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| /llvm-project-15.0.7/clang/test/CodeGen/ |
| H A D | ms-inline-asm.c | 583 void t41(unsigned short a) { 685 __asm call t41
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| /llvm-project-15.0.7/llvm/test/Transforms/PhaseOrdering/X86/ |
| H A D | nancvt.ll | 112 %t41 = load i32, i32* %t3940, align 4 114 store volatile i32 %t41, i32* @var
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| /llvm-project-15.0.7/llvm/test/tools/llvm-readobj/ELF/ |
| H A D | note-core.test | 204 # RUN: yaml2obj %s -DTYPE=0x30b -o %t41.o 205 # RUN: llvm-readelf --notes %t41.o | FileCheck %s --check-prefix=CHECK-GNU -DDESC="NT_S390_GS_CB (… 206 # RUN: llvm-readobj --notes %t41.o | FileCheck %s --check-prefix=CHECK-LLVM -DDESC="NT_S390_GS_CB (…
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| /llvm-project-15.0.7/clang/test/SemaCXX/ |
| H A D | type-traits.cpp | 1079 int t41[F(__is_const(unsigned int))]; in is_const() local 1128 int t41[F(__is_volatile(unsigned int))]; in is_volatile() local 1243 int t41[F(__is_trivial(AnIncompleteType))]; // expected-error {{incomplete type}} in is_trivial2() local 1287 int t41[F(__is_trivially_copyable(AnIncompleteType))]; // expected-error {{incomplete type}} in is_trivially_copyable2() local 1357 int t41[F(__is_standard_layout(AnIncompleteType))]; // expected-error {{incomplete type}} in is_standard_layout() local
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| /llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/AArch64/ |
| H A D | memory-runtime-checks.ll | 1120 %t41 = load i8, i8* %t8, align 1 1123 %t44 = xor i8 %t43, %t41 1265 %t41 = getelementptr inbounds float, float* %t, i64 3 1266 store float %t40, float* %t41, align 4
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| /llvm-project-15.0.7/libcxxabi/test/ |
| H A D | dynamic_cast3.pass.cpp | 2359 namespace t41 namespace 2460 t41::test(); in main()
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| /llvm-project-15.0.7/llvm/test/Transforms/InstCombine/ |
| H A D | phi.ll | 304 %t41 = ptrtoint i8* %Ptr to i64 305 %t42 = zext i64 %t41 to i128
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