| /llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/ |
| H A D | Atomics.ll | 16 %t40 = atomicrmw and i32* @si, i32 1 monotonic 44 %t40 = atomicrmw and i32* @si, i32 11 monotonic 45 store i32 %t40, i32* @si, align 4
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| H A D | rdf-filter-defs.ll | 112 %t40 = bitcast %type.3* %t36 to i8* 117 %t42 = phi i8* [ %t38, %b16 ], [ %t40, %b17 ]
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| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | haddsub-shuf-undef-operand.ll | 17 %t40 = load volatile <4 x double>, ptr %p1, align 32 18 …%t41 = tail call <4 x double> @llvm.x86.avx.hadd.pd.256(<4 x double> %shuffle11, <4 x double> %t40)
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| H A D | lsr-reuse.ll | 541 %t40 = fmul float %t8, 0.000000e+00 ; <float> [#uses=1] 542 %t41 = fadd float %t23, %t40 ; <float> [#uses=1]
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| /llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/X86/ |
| H A D | reorder_repeated_ops.ll | 81 %t40 = add nsw i32 %t22, -17 82 %t41 = icmp sgt i32 %t40, undef 83 %t42 = select i1 %t41, i32 undef, i32 %t40
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| H A D | vec_list_bias-inseltpoison.ll | 86 %t40 = mul nsw i32 %t39, 9633 91 %t49 = add nsw i32 %t40, %t47 92 %t50 = add nsw i32 %t40, %t48
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| H A D | vec_list_bias.ll | 86 %t40 = mul nsw i32 %t39, 9633 91 %t49 = add nsw i32 %t40, %t47 92 %t50 = add nsw i32 %t40, %t48
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| H A D | pr49933.ll | 58 %t40 = sub i8 0, %t38 59 %t41 = select i1 %t39, i8 %t38, i8 %t40
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| H A D | PR34635.ll | 94 %t40 = select i1 %t39, i32 7, i32 %t37 95 store i32 %t40, i32* %t2, align 4
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| H A D | bad-reduction.ll | 468 %t40 = load i8, i8* %t39, align 1 484 %t41 = zext i8 %t40 to i32
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| /llvm-project-15.0.7/llvm/test/Transforms/IndVarSimplify/ |
| H A D | eliminate-rem.ll | 75 %t23 = phi i32 [ %t40, %bb21 ], [ %t18, %bb20 ] ; <i32> [#uses=1] 92 %t40 = trunc i64 %t39 to i32 ; <i32> [#uses=2] 101 %t45 = phi i32 [ %t18, %bb16 ], [ %t40, %bb43 ] ; <i32> [#uses=2]
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| H A D | ashr-tripcount.ll | 86 %t40 = or i32 %i.05, 2 ; <i32> [#uses=1] 88 %t42 = sext i32 %t40 to i64 ; <i64> [#uses=1]
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| /llvm-project-15.0.7/llvm/test/Transforms/Reassociate/ |
| H A D | 2012-05-08-UndefLeak.ll | 52 %t40 = add i64 %t39, %t5 53 %t41 = add i64 %t40, %t6
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| /llvm-project-15.0.7/clang/test/Coverage/ |
| H A D | c-language-features.inc | 145 float t37, *t38, t39[9], t40(double);
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| /llvm-project-15.0.7/llvm/test/Transforms/AggressiveInstCombine/ |
| H A D | masked-cmp.ll | 233 %t40 = lshr i64 %x, 40 274 %a40 = and i64 %t40, %a39
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| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/ |
| H A D | fp16_intrinsic_scalar_1op.ll | 314 define dso_local i16 @t40(half %a) { 315 ; CHECK-LABEL: t40:
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| /llvm-project-15.0.7/llvm/test/tools/llvm-readobj/ELF/ |
| H A D | note-core.test | 199 # RUN: yaml2obj %s -DTYPE=0x30a -o %t40.o 200 # RUN: llvm-readelf --notes %t40.o | FileCheck %s --check-prefix=CHECK-GNU -DDESC="NT_S390_VXRS_HI… 201 # RUN: llvm-readobj --notes %t40.o | FileCheck %s --check-prefix=CHECK-LLVM -DDESC="NT_S390_VXRS_HI…
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| /llvm-project-15.0.7/clang/test/CodeGen/ |
| H A D | ms-inline-asm.c | 573 void t40(float a) {
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| /llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/AArch64/ |
| H A D | memory-runtime-checks.ll | 1118 %t40 = xor i8 %t39, %t37 1119 store i8 %t40, i8* %t38, align 1 1264 %t40 = fdiv float %t39, 2.550000e+02 1266 store float %t40, float* %t41, align 4 1331 %t40 = getelementptr inbounds float, float* %arg.3, i64 1 1332 store float %t39, float* %t40, align 4
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| /llvm-project-15.0.7/clang/test/SemaCXX/ |
| H A D | type-traits.cpp | 1078 int t40[F(__is_const(unsigned char))]; in is_const() local 1127 int t40[F(__is_volatile(unsigned char))]; in is_volatile() local 1242 int t40[T(__is_trivial(ACompleteType))]; in is_trivial2() local 1286 int t40[T(__is_trivially_copyable(ACompleteType))]; in is_trivially_copyable2() local 1356 int t40[T(__is_standard_layout(ACompleteType))]; in is_standard_layout() local
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| /llvm-project-15.0.7/libcxxabi/test/ |
| H A D | dynamic_cast3.pass.cpp | 2300 namespace t40 namespace 2459 t40::test(); in main()
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