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/llvm-project-15.0.7/lldb/test/Shell/Register/
H A Dx86-multithread-write.test14 register read st0
15 register write st0 "{0x10 0x20 0x30 0x40 0x50 0x60 0x70 0x80 0x00 0x40}"
20 # CHECK-DAG: st0 = { 0x10 0x20 0x30 0x40 0x50 0x60 0x70 0x80 0x00 0x40 }
25 register read st0
26 register write st0 "{0x11 0x21 0x31 0x41 0x51 0x61 0x71 0x81 0x00 0xc0}"
31 # CHECK-DAG: st0 = { 0x11 0x21 0x31 0x41 0x51 0x61 0x71 0x81 0x00 0xc0 }
H A Dx86-64-fp-write.test21 register write st0 "{0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x80 0x00 0x40}"
40 # CHECK-DAG: st0 = { 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x80 0x00 0x40 }
H A Dx86-fp-write.test20 register write st0 "{0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x80 0x00 0x40}"
42 # CHECK-DAG: st0 = { 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x80 0x00 0x40 }
/llvm-project-15.0.7/lldb/test/Shell/Register/Inputs/
H A Dx86-multithread-write.cpp15 } st0; member
21 .st0 = {{0x1f, 0x2f, 0x3f, 0x4f, 0x5f, 0x6f, 0x7f, 0x8f, 0x80, 0x40}},
34 : "m"(out.st0) in t_func()
41 for (int i = 0; i < sizeof(out.st0.data); ++i) in t_func()
42 printf("0x%02" PRIx8 " ", out.st0.data[i]); in t_func()
H A Dx86-multithread-read.cpp14 } st0; member
25 : "a"(t_data.eax), "b"(t_data.ebx), "m"(t_data.st0) in t_func()
34 .st0 = {0x8070605040302010, 0x4000}, in main()
39 .st0 = {0x8171615141312111, 0xc000}, in main()
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dx87-stack-pop.mir12 … $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw, implicit-def $st0 :: (load (s80) from…
13 ; CHECK-NEXT: XAM_F implicit-def $fpsw, implicit $st0
15 ; CHECK-NEXT: ST_FPrr $st0, implicit-def $fpsw, implicit $fpcw
34 … $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw, implicit-def $st0 :: (load (s80) from…
35 ; CHECK-NEXT: TST_F implicit-def $fpsw, implicit $fpcw, implicit $st0
37 ; CHECK-NEXT: ST_FPrr $st0, implicit-def $fpsw, implicit $fpcw
55 … $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw, implicit-def $st0 :: (load (s80) from…
56 ; CHECK-NEXT: TST_F implicit-def dead $fpsw, implicit $fpcw, implicit $st0
57 ; CHECK-NEXT: ST_FPrr $st0, implicit-def $fpsw, implicit $fpcw
H A Dipra-reg-usage.ll6 … $k1 $k2 $k3 $k4 $k5 $k6 $k7 $mm0 $mm1 $mm2 $mm3 $mm4 $mm5 $mm6 $mm7 $r11 $st0 $st1 $st2 $st3 $st4…
H A Dinline-asm-fpstack.ll441 …SM $frndint [sideeffect] [attdialect], $0:[regdef], %st0<imp-def,tied5>, $1:[reguse tiedto:$0], %s…
443 ; %fp0 = COPY %st0
/llvm-project-15.0.7/llvm/test/CodeGen/XCore/
H A DbyVal.ll7 %struct.st0 = type { [0 x i32] }
8 declare void @f0(%struct.st0*) nounwind
9 define void @f0Test(%struct.st0* byval(%struct.st0) %s0) nounwind {
11 call void @f0(%struct.st0* %s0) nounwind
/llvm-project-15.0.7/clang/test/CodeGen/
H A Daapcs-bitfield.c14 struct st0 { struct
94 int st0_check_load(struct st0 *m) { in st0_check_load()
170 void st0_check_store(struct st0 *m) { in st0_check_store()
/llvm-project-15.0.7/mlir/test/Conversion/MemRefToLLVM/
H A Dconvert-dynamic-memref-ops.mlir12 // CHECK-NEXT: %[[st0:.*]] = llvm.mul %[[N]], %[[c42]] : i64
13 // CHECK-NEXT: %[[sz:.*]] = llvm.mul %[[st0]], %[[M]] : i64
27 // CHECK-NEXT: llvm.insertvalue %[[st0]], %{{.*}}[4, 0] : !llvm.struct<(ptr<f32>, ptr<f32>, i64, …
174 // CHECK-NEXT: %[[st0:.*]] = llvm.extractvalue %[[ld]][4, 0] : !llvm.struct<(ptr<f32>, ptr<f32>, …
175 // CHECK-NEXT: %[[offI:.*]] = llvm.mul %[[I]], %[[st0]] : i64
191 // CHECK-NEXT: %[[st0:.*]] = llvm.extractvalue %[[ld]][4, 0] : !llvm.struct<(ptr<f32>, ptr<f32>, …
192 // CHECK-NEXT: %[[offI:.*]] = llvm.mul %[[I]], %[[st0]] : i64
208 // CHECK-NEXT: %[[st0:.*]] = llvm.extractvalue %[[ld]][4, 0] : !llvm.struct<(ptr<f32>, ptr<f32>, i…
209 // CHECK-NEXT: %[[offI:.*]] = llvm.mul %[[I]], %[[st0]] : i64
239 // CHECK-NEXT: %[[offI:.*]] = llvm.mul %[[I]], %[[st0]] : i64
[all …]
H A Dconvert-static-memref-ops.mlir134 // CHECK: %[[st0:.*]] = llvm.mlir.constant(42 : index) : i64
135 // CHECK: %[[offI:.*]] = llvm.mul %[[II]], %[[st0]] : i64
162 // CHECK: %[[st0:.*]] = llvm.mlir.constant(42 : index) : i64
163 // CHECK: %[[offI:.*]] = llvm.mul %[[II]], %[[st0]] : i64
/llvm-project-15.0.7/lldb/test/Shell/Register/Core/Inputs/
H A Dx86-fp.check7 # CHECK-DAG: st0 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x80 0x00 0x40}
/llvm-project-15.0.7/lldb/source/Plugins/Process/Utility/
H A DRegisterInfos_i386.h255 DEFINE_FP_MM(mm, 0, st0), DEFINE_FP_MM(mm, 1, st1),
H A DRegisterInfos_x86_64.h281 DEFINE_FP_MM(mm, 0, st0), DEFINE_FP_MM(mm, 1, st1),
/llvm-project-15.0.7/mlir/test/Dialect/Linalg/
H A Dhoisting.mlir369 … %st0 = tensor.extract_slice %arg6[%i, %i][%step, %step][1, 1] : tensor<?x?xf32> to tensor<?x?xf32>
370 %r0 = vector.transfer_read %st0[%c0, %c0], %cst: tensor<?x?xf32>, vector<1xf32>
392 %w0 = vector.transfer_write %u0, %st0[%c0, %c0] : vector<1xf32>, tensor<?x?xf32>