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/llvm-project-15.0.7/llvm/test/MC/ARM/
H A Dthumb-invalid-crypto.txt5 @ CHECK: error: instruction 'aesd' is not predicable, but condition code specified
7 @ CHECK: error: instruction 'aesimc' is not predicable, but condition code specified
9 @ CHECK: error: instruction 'aesmc' is not predicable, but condition code specified
11 @ CHECK: error: instruction 'aese' is not predicable, but condition code specified
15 @ CHECK: error: instruction 'sha1h' is not predicable, but condition code specified
17 @ CHECK: error: instruction 'sha1su1' is not predicable, but condition code specified
23 @ CHECK: error: instruction 'sha1c' is not predicable, but condition code specified
25 @ CHECK: error: instruction 'sha1m' is not predicable, but condition code specified
27 @ CHECK: error: instruction 'sha1p' is not predicable, but condition code specified
40 @ CHECK: error: instruction 'vmull' is not predicable, but condition code specified
[all …]
H A Dinvalid-crc32.s11 @ CHECK: error: instruction 'crc32cb' is not predicable, but condition code specified
12 @ CHECK: error: instruction 'crc32b' is not predicable, but condition code specified
13 @ CHECK: error: instruction 'crc32ch' is not predicable, but condition code specified
14 @ CHECK: error: instruction 'crc32h' is not predicable, but condition code specified
15 @ CHECK: error: instruction 'crc32cw' is not predicable, but condition code specified
16 @ CHECK: error: instruction 'crc32w' is not predicable, but condition code specified
/llvm-project-15.0.7/llvm/docs/CommandGuide/
H A Dllvm-install-name-tool.rst29 Add an rpath named ``<rpath>`` to the specified binary. Can be specified multiple
36 specified binary. Can be specified multiple times to change multiple dependent shared
38 in the specified binary.
42 Delete an rpath named ``<rpath>`` from the specified binary. Can be specified multiple
57 specified binary. If specified multiple times, only the last :option:`-id` option is
58 selected. Option is ignored if the specified Mach-O binary is not a dynamic shared library.
62 Change an rpath named ``<old_rpath>`` to ``<new_rpath>`` in the specified binary. Can be specified
H A Dllvm-extract.rst15 it from the specified LLVM bitcode file. It is primarily used as a debugging
18 In addition to extracting the bitcode of the specified function,
24 standard output, unless the **-o** option is specified (see below).
32 specified multiple times to extract multiple alias at once.
38 specified multiple times.
42 Extract basic blocks(s) specified in *basic-block-specifier*. May be
49 Delete specified Globals from Module.
61 specified multiple times to extract multiple functions at once.
67 specified multiple times.
72 specified multiple times to extract multiple global variables at once.
[all …]
H A Dllvm-objcopy.rst44 specified multiple times to add multiple sections.
97 Can be specified multiple times to keep multiple sections.
117 If specified, symbol and section names specified by other switches are treated
122 Remove the specified section from the output. Can be specified multiple times
136 specified ``<flag>`` values. Can be specified multiple times to update multiple
159 flags, unless the `load` flag is specified.
200 specified multiple times to read names from multiple files.
287 Can be specified multiple times to add multiple symbols.
327 Can be specified multiple times to mark multiple symbols.
356 specified multiple times to read names from multiple files.
[all …]
H A Dllvm-lipo.rst29 Take a single input file and verify the specified architectures are present in the file.
49 Require the output flag to be specified, and output a thin binary of the specified architecture.
53 Take at least one input file and require the output flag to be specified.
58 Take a single universal binary input file and require the output flag to be specified.
60 Output a universal binary with the specified architecture slice in the
65 Additional flag that can be specified with create and replace.
68 Output a file in which the slice with the specified architecture has the specified alignment.
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Dlower-intrinsics-afn-mass.ll18 ; With afn flag specified per-function
28 ; With afn flag specified per-function
38 ; With afn flag specified per-function
48 ; With afn flag specified per-function
58 ; With afn flag specified per-function
68 ; With afn flag specified per-function
78 ; With afn flag specified per-function
88 ; With afn flag specified per-function
98 ; With afn flag specified per-function
108 ; With afn flag specified per-function
[all …]
H A Dlower-intrinsics-nofast-mass.ll19 ; With no fast math flag specified per-function
29 ; With no fast math flag specified per-function
39 ; With no fast math flag specified per-function
49 ; With no fast math flag specified per-function
59 ; With no fast math flag specified per-function
69 ; With no fast math flag specified per-function
79 ; With no fast math flag specified per-function
89 ; With no fast math flag specified per-function
99 ; With no fast math flag specified per-function
109 ; With no fast math flag specified per-function
[all …]
H A Dlower-intrinsics-fast-mass.ll18 ; With fast-math flag specified per-function
28 ; With fast-math flag specified per-function
38 ; With fast-math flag specified per-function
48 ; With fast-math flag specified per-function
58 ; With fast-math flag specified per-function
68 ; With fast-math flag specified per-function
78 ; With fast-math flag specified per-function
88 ; With fast-math flag specified per-function
98 ; With fast-math flag specified per-function
108 ; With fast-math flag specified per-function
[all …]
/llvm-project-15.0.7/llvm/test/MC/AArch64/
H A Darm64-diags.s396 ; CHECK-ERRORS: error: specified ic op requires a register
399 ; CHECK-ERRORS: error: specified dc op requires a register
401 ; CHECK-ERRORS: error: specified dc op requires a register
403 ; CHECK-ERRORS: error: specified dc op requires a register
405 ; CHECK-ERRORS: error: specified dc op requires a register
407 ; CHECK-ERRORS: error: specified dc op requires a register
409 ; CHECK-ERRORS: error: specified dc op requires a register
411 ; CHECK-ERRORS: error: specified dc op requires a register
413 ; CHECK-ERRORS: error: specified dc op requires a register
416 ; CHECK-ERRORS: error: specified at op requires a register
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dalignment.ll4 ; explicit alignment specified.
14 ; they have an explicit alignment specified.
28 ; explicit alignment specified *and* a section specified.
37 ; they have an explicit alignment specified and a section specified.
/llvm-project-15.0.7/libunwind/cmake/Modules/
H A DHandleLibunwindFlags.cmake26 # This can be used to remove unwanted flags specified on the command line
55 # If the specified 'condition' is true then append the specified list of flags to DEST
118 # If the specified 'condition' is true then add a list of flags to
138 # Add a specified list of flags to both 'LIBUNWIND_COMPILE_FLAGS' and
147 # If the specified 'condition' is true then add a list of flags to both
172 # If 'condition' is true then add the specified list of flags to
197 # If 'condition' is true then add the specified list of flags to
205 # For each specified flag, add that flag to 'LIBUNWIND_C_FLAGS' if the
222 # If 'condition' is true then add the specified list of flags to
230 # For each specified flag, add that flag to 'LIBUNWIND_CXX_FLAGS' if the
[all …]
/llvm-project-15.0.7/llvm/include/llvm/Target/
H A DTargetCallingConv.td28 /// CCIfType - If the current argument is one of the specified types, apply
79 /// the specified action.
83 /// the specified action.
87 /// the specified action.
91 /// the specified action.
101 /// pointer type in the specified address-space.
162 /// the specified type.
168 /// value to the specified type and shifts the value into the upper bits.
174 /// value to the specified type.
180 /// the specified type.
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/
H A Dtls-models.ll16 ; ----- no model specified -----
41 ; ----- localdynamic specified -----
66 ; ----- initialexec specified -----
72 ; Non-PIC and PIC code will use initial exec as specified.
83 ; Non-PIC code can use local exec, PIC code use initial exec as specified.
91 ; ----- localexec specified -----
97 ; Non-PIC and PIC code will use local exec as specified.
108 ; Non-PIC and PIC code will use local exec as specified.
/llvm-project-15.0.7/libcxxabi/cmake/Modules/
H A DHandleLibcxxabiFlags.cmake25 # This can be used to remove unwanted flags specified on the command line
54 # If the specified 'condition' is true then append the specified list of flags to DEST
84 # Add a macro definition to the __config_site file if the specified condition
117 # If the specified 'condition' is true then add a list of flags to
137 # Add a specified list of flags to both 'LIBCXXABI_COMPILE_FLAGS' and
146 # If the specified 'condition' is true then add a list of flags to both
171 # If 'condition' is true then add the specified list of flags to
206 # If 'condition' is true then add the specified list of flags to
214 # For each specified flag, add that flag to 'LIBCXXABI_LINK_FLAGS' if the
231 # if 'condition' is true then add the specified list of libraries and flags
[all …]
/llvm-project-15.0.7/libcxx/cmake/Modules/
H A DHandleLibcxxFlags.cmake26 # This can be used to remove unwanted flags specified on the command line
55 # If the specified 'condition' is true then append the specified list of flags to DEST
115 # If the specified 'condition' is true then add a list of flags to
135 # Add a specified list of flags to both 'LIBCXX_COMPILE_FLAGS' and
144 # If the specified 'condition' is true then add a list of flags to both
169 # If 'condition' is true then add the specified list of flags to
177 # For each specified flag, add that flag to 'LIBCXX_COMPILE_FLAGS' if the
194 # If 'condition' is true then add the specified list of flags to
202 # For each specified flag, add that flag to 'LIBCXX_LINK_FLAGS' if the
232 # For each specified flag, add that link flag to the provided target.
[all …]
/llvm-project-15.0.7/llvm/test/tools/llvm-libtool-darwin/
H A Dversion.test2 ## for no operation to be specified, but if an operation is specified, it should
5 ## specified).
13 ## Parsing errors should not be surfaced when no operation is specified.
16 ## Regular errors should occur when an operation is specified.
18 # ERROR: for the -o option: must be specified
/llvm-project-15.0.7/llvm/docs/AMDGPU/
H A Dgfx10_msg.rst25 This operand may be specified as one of the following:
39 *Type* may be specified using message *name* or message *id*.
41 *Op* may be specified using operation *name* or operation *id*.
45 Numeric values may be specified as positive :ref:`integer numbers<amdgpu_synid_integer_number>`
73 *Sendmsg* arguments are validated depending on how *type* value is specified:
75 * If message *type* is specified by name, arguments values must satisfy limitations detailed in the…
76 * If message *type* is specified as a number, each argument must not exceed corresponding value ran…
H A Dgfx8_msg.rst25 This operand may be specified as one of the following:
39 *Type* may be specified using message *name* or message *id*.
41 *Op* may be specified using operation *name* or operation *id*.
45 Numeric values may be specified as positive :ref:`integer numbers<amdgpu_synid_integer_number>`
68 *Sendmsg* arguments are validated depending on how *type* value is specified:
70 * If message *type* is specified by name, arguments values must satisfy limitations detailed in the…
71 * If message *type* is specified as a number, each argument must not exceed corresponding value ran…
H A Dgfx1030_msg.rst25 This operand may be specified as one of the following:
39 *Type* may be specified using message *name* or message *id*.
41 *Op* may be specified using operation *name* or operation *id*.
45 Numeric values may be specified as positive :ref:`integer numbers<amdgpu_synid_integer_number>`
73 *Sendmsg* arguments are validated depending on how *type* value is specified:
75 * If message *type* is specified by name, arguments values must satisfy limitations detailed in the…
76 * If message *type* is specified as a number, each argument must not exceed corresponding value ran…
H A Dgfx90a_msg.rst25 This operand may be specified as one of the following:
39 *Type* may be specified using message *name* or message *id*.
41 *Op* may be specified using operation *name* or operation *id*.
45 Numeric values may be specified as positive :ref:`integer numbers<amdgpu_synid_integer_number>`
73 *Sendmsg* arguments are validated depending on how *type* value is specified:
75 * If message *type* is specified by name, arguments values must satisfy limitations detailed in the…
76 * If message *type* is specified as a number, each argument must not exceed corresponding value ran…
H A Dgfx7_msg.rst25 This operand may be specified as one of the following:
39 *Type* may be specified using message *name* or message *id*.
41 *Op* may be specified using operation *name* or operation *id*.
45 Numeric values may be specified as positive :ref:`integer numbers<amdgpu_synid_integer_number>`
67 *Sendmsg* arguments are validated depending on how *type* value is specified:
69 * If message *type* is specified by name, arguments values must satisfy limitations detailed in the…
70 * If message *type* is specified as a number, each argument must not exceed corresponding value ran…
H A Dgfx9_msg.rst25 This operand may be specified as one of the following:
39 *Type* may be specified using message *name* or message *id*.
41 *Op* may be specified using operation *name* or operation *id*.
45 Numeric values may be specified as positive :ref:`integer numbers<amdgpu_synid_integer_number>`
73 *Sendmsg* arguments are validated depending on how *type* value is specified:
75 * If message *type* is specified by name, arguments values must satisfy limitations detailed in the…
76 * If message *type* is specified as a number, each argument must not exceed corresponding value ran…
H A Dgfx940_msg.rst25 This operand may be specified as one of the following:
39 *Type* may be specified using message *name* or message *id*.
41 *Op* may be specified using operation *name* or operation *id*.
45 Numeric values may be specified as positive :ref:`integer numbers<amdgpu_synid_integer_number>`
73 *Sendmsg* arguments are validated depending on how *type* value is specified:
75 * If message *type* is specified by name, arguments values must satisfy limitations detailed in the…
76 * If message *type* is specified as a number, each argument must not exceed corresponding value ran…
H A Dgfx7_vaddr_da1f09.rst17 * If only :ref:`addr64<amdgpu_synid_addr64>` is specified, this operand supplies a 64-bit address. …
18 * If only :ref:`idxen<amdgpu_synid_idxen>` is specified, this operand supplies an index. Size is 1 …
19 * If only :ref:`offen<amdgpu_synid_offen>` is specified, this operand supplies an offset. Size is 1…
20 * If both :ref:`idxen<amdgpu_synid_idxen>` and :ref:`offen<amdgpu_synid_offen>` are specified, inde…
21 * If none of these modifiers are specified, this operand must be set to :ref:`off<amdgpu_synid_off>…

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