| /llvm-project-15.0.7/mlir/include/mlir/Interfaces/ |
| H A D | DataLayoutInterfaces.td | 9 // Defines the interfaces for the data layout specification, operations to which 27 Attribute interface describing an entry in a data layout specification. 29 A data layout specification entry is a key-value pair. Its key is either a 75 Attribute interface describing a data layout specification. 77 A data layout specification is seen as a sequence of entries, each of which 80 for implementations to verify the well-formedness of the specification, 87 modification. Concrete specification attributes must implement the 137 /*description=*/"Verifies the validity of the specification and reports " 178 constructed for such operations. The absence of a data layout specification 194 /*description=*/"Returns the data layout specification for this op, or " [all …]
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| /llvm-project-15.0.7/mlir/test/mlir-pdll-lsp-server/ |
| H A D | signature-help.test | 22 // CHECK-NEXT: "documentation": "`op<test.multi>` ODS operand specification", 42 // CHECK-NEXT: "documentation": "Generic operation operand specification", 68 // CHECK-NEXT: "documentation": "`op<test.multi>` ODS operand specification", 101 // CHECK-NEXT: "documentation": "`op<test.multi>` ODS result specification", 121 // CHECK-NEXT: "documentation": "Generic operation result specification", 147 // CHECK-NEXT: "documentation": "`op<test.multi>` ODS result specification",
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| /llvm-project-15.0.7/llvm/test/FileCheck/ |
| H A D | check-count.txt | 11 ERRCOUNT1: [[@LINE-1]]:18: error: invalid count in -COUNT specification on prefix 'CHECK-ERR1' 17 ERRCOUNT2: [[@LINE-1]]:19: error: invalid count in -COUNT specification on prefix 'CHECK-ERR2' 23 ERRCOUNT3: [[@LINE-1]]:21: error: invalid count in -COUNT specification on prefix 'CHECK-ERR3' 29 ERRCOUNT4: [[@LINE-1]]:19: error: invalid count in -COUNT specification on prefix 'CHECK-ERR4'
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| /llvm-project-15.0.7/flang/docs/ |
| H A D | f2018-grammar.md | 20 R504 specification-part -> 29 R508 specification-construct -> 32 other-specification-stmt | type-declaration-stmt 38 R513 other-specification-stmt -> 227 R812 lower-cobound -> specification-expr 228 R813 upper-cobound -> specification-expr 235 R817 lower-bound -> specification-expr 236 R818 upper-bound -> specification-expr 406 R1028 specification-expr -> scalar-int-expr 457 R1109 block-specification-part -> [all …]
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| /llvm-project-15.0.7/mlir/docs/ |
| H A D | DataLayout.md | 32 them, typically organized in a data layout specification. 100 Data layout specification is an [attribute](LangRef.md/#attributes) that is 101 conceptually a collection of key-value pairs called data layout specification 102 _entries_. Data layout specification attributes implement the 107 type or a dialect can only see the specification entries relevant to them and 113 For example, a data layout specification may be an actual list of pairs with 123 The exact details of the specification and entry attributes, as well as their 149 data layout specification. The specification need not be necessarily attached to 196 fetches the data layout specification and combines it with those of 290 attribute that can be used to attach the specification to a given operation. The [all …]
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| /llvm-project-15.0.7/mlir/docs/Dialects/ |
| H A D | TOSA.md | 8 specification](https://developer.mlplatform.org/w/tosa/). This document 56 specification of the operation. 61 described in the TOSA specification document under Section 1.3 Operator 81 The TOSA specification describes each operator in functional detail. It is 86 The functional steps described in the pseudocode of the specification enables
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| /llvm-project-15.0.7/mlir/test/Dialect/Quant/ |
| H A D | quant_region.mlir | 44 …// @expected-error @+1 {{'quant.region' op has incompatible specification !quant.uniform<i32:f16, … 59 …// @expected-error @+1 {{'quant.region' op has incompatible specification i32 and input type 'tens… 74 …// @expected-error @+1 {{'quant.region' op has incompatible specification !quant.uniform<i32:f16, … 89 …// @expected-error @+1 {{'quant.region' op has incompatible specification i32 and output type 'ten…
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| /llvm-project-15.0.7/clang-tools-extra/docs/clang-tidy/checks/modernize/ |
| H A D | use-noexcept.rst | 7 the appropriate noexcept specification (introduced in C++11). By 34 that uses custom exception specification marking other than
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| /llvm-project-15.0.7/llvm/test/Assembler/ |
| H A D | invalid-datalayout5.ll | 3 ; CHECK: Sized aggregate specification in datalayout string
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| H A D | invalid-datalayout12.ll | 3 ; CHECK: Missing alignment specification in datalayout string
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| H A D | invalid-datalayout9.ll | 3 ; CHECK: Missing alignment specification for pointer in datalayout string
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| H A D | invalid-datalayout8.ll | 3 ; CHECK: Missing size specification for pointer in datalayout string
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| H A D | invalid-datalayout22.ll | 5 ; CHECK: ABI alignment specification must be >0 for non-aggregate types
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| /llvm-project-15.0.7/clang/docs/ |
| H A D | SYCLSupport.rst | 19 The SYCL specification represents pointers to disjoint memory regions using C++ 22 specification defines 26 The SYCL specification allows two modes of address space deduction: "generic as
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| /llvm-project-15.0.7/libc/AOR_v20.02/math/test/testcases/random/ |
| H A D | double.tst | 1 !! double.tst - Random test case specification for DP functions
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| H A D | float.tst | 1 !! single.tst - Random test case specification for SP functions
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| /llvm-project-15.0.7/llvm/test/CodeGen/MIR/X86/ |
| H A D | register-operand-class-invalid0.mir | 11 ; CHECK: [[@LINE+1]]:10: register class specification expects a virtual register
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| H A D | expected-size-integer-after-memory-operation.mir | 20 ; CHECK: [[@LINE+1]]:53: expected an atomic scope, ordering or a size specification
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| H A D | register-operand-class.mir | 2 # Test various aspects of register class specification on machine operands.
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| /llvm-project-15.0.7/clang/test/Parser/ |
| H A D | objcxx-at.mm | 14 @interface A // expected-error{{unexpected '@' in member specification}}
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| /llvm-project-15.0.7/llvm/test/CodeGen/MIR/AArch64/ |
| H A D | register-operand-bank.mir | 2 # Test various aspects of register bank specification on machine operands.
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| /llvm-project-15.0.7/mlir/include/mlir/Dialect/Tosa/IR/ |
| H A D | TosaInterfaces.td | 20 Implemented by ops that correspond to the Tosa specification.
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| /llvm-project-15.0.7/compiler-rt/lib/cfi/ |
| H A D | cfi_ignorelist.txt | 2 # The specification of std::get_temporary_buffer mandates a cast to
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| /llvm-project-15.0.7/mlir/include/mlir/Dialect/OpenMP/ |
| H A D | OpenMPTypeInterfaces.td | 19 specification refers to as variable.
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| /llvm-project-15.0.7/llvm/lib/Analysis/ |
| H A D | DevelopmentModeInlineAdvisor.cpp | 68 "specification of that file."));
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