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/llvm-project-15.0.7/llvm/test/MC/Hexagon/PacketRules/
H A Drestrict_no_slot1_store.s9 # CHECK: note: Instruction can utilize slots: 0, 1, 2, 3
10 # CHECK: note: Instruction can utilize slots: 0, 1, 2, 3
11 # CHECK: note: Instruction can utilize slots: <None>
12 # CHECK: note: Instruction can utilize slots: 0
/llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/
H A Dframe-21.ll1 ; Test the allocation of emergency spill slots.
18 ; spill slots. Check the minimum such case.
30 ; in reach, so the maximum frame size without emergency spill slots is
32 ; case where we still need no emergency spill slots ...
55 ; Check the maximum case where we still need no emergency spill slots ...
H A Dvec-args-03.ll6 ; the two double-wide stack slots at 160 and 176.
19 ; the two single-wide stack slots at 160 and 168.
H A Dargs-09.ll11 ; There are two indirect i128 slots, one at offset 200 (the first available
13 ; These slots should be set up outside the glued call sequence, so would
H A Dargs-01.ll14 ; There are two indirect fp128 slots, one at offset 224 (the first available
16 ; These slots should be set up outside the glued call sequence, so would
H A Dargs-03.ll15 ; There are two indirect fp128 slots, one at offset 224 (the first available
17 ; These slots should be set up outside the glued call sequence, so would
H A Dargs-02.ll15 ; There are two indirect fp128 slots, one at offset 224 (the first available
17 ; These slots should be set up outside the glued call sequence, so would
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DStackColoring.cpp522 SmallVector<int, 4> &slots,
624 slots.push_back(Slot); in isLifetimeStartOrEnd()
643 slots.push_back(Slot); in isLifetimeStartOrEnd()
767 SmallVector<int, 4> slots; in collectMarkers() local
770 slots.clear(); in collectMarkers()
771 if (isLifetimeStartOrEnd(MI, slots, isStart)) { in collectMarkers()
774 int Slot = slots[0]; in collectMarkers()
780 for (auto Slot : slots) { in collectMarkers()
879 SmallVector<int, 4> slots; in calculateLiveIntervals() local
881 if (!isLifetimeStartOrEnd(MI, slots, IsStart)) in calculateLiveIntervals()
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/HotColdSplit/
H A Dlifetime-markers-on-inputs-1.ll21 ; These two uses of stack slots are non-overlapping. Based on this alone,
22 ; the stack slots could be merged.
40 ; These two uses of stack slots are overlapping. This should prevent
41 ; merging of stack slots. CodeExtractor must replicate the effects of
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dstatepoint-stack-usage.ll6 ; This test is checking to make sure that we reuse the same stack slots
13 ; The exact stores don't matter, but there need to be three stack slots created
34 ; This test simply checks that minor changes in vm state don't prevent slots
38 ; The exact stores don't matter, but there need to be three stack slots created
63 ; The exact stores don't matter, but there need to be three stack slots created
87 ; Test that stack slots are reused for invokes
91 ; The exact stores don't matter, but there need to be three stack slots created
H A Dsetjmp-spills.ll11 ; Test that llc avoids reusing spill slots in functions that call
39 ; Again, keep enough variables live that they need spill slots. Since
41 ; compiler should not reuse the spill slots. longjmp() can return to
42 ; where the first spill slots were still live.
H A Dstatepoint-vector.ll56 ; with stack slots entirely.
141 ; Check for the two spill slots
158 ; Check for the two spill slots
175 ; Check for the four spill slots
/llvm-project-15.0.7/llvm/lib/Target/XCore/
H A DXCoreCallingConv.td18 // Integer values get stored in stack slots that are 4 bytes in
36 // Integer values get stored in stack slots that are 4 bytes in
/llvm-project-15.0.7/llvm/lib/Target/ARC/
H A DARCCallingConv.td18 // Integer values get stored in stack slots that are 4 bytes in
34 // Integer values get stored in stack slots that are 4 bytes in
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86CallingConv.td144 // float 128 get stack slots whose size and alignment depends
148 // Vectors get 16-byte stack slots that are 16-byte aligned.
152 // 256-bit vectors get 32-byte stack slots that are 32-byte aligned.
156 // 512-bit vectors get 64-byte stack slots that are 64-byte aligned.
594 // Vectors get 16-byte stack slots that are 16-byte aligned.
597 // 256-bit vectors get 32-byte stack slots that are 32-byte aligned.
601 // 512-bit vectors get 64-byte stack slots that are 64-byte aligned.
749 // in 8 byte stack slots.
787 // Other SSE vectors get 16-byte stack slots that are 4-byte aligned.
865 // Doubles get 8-byte slots that are 4-byte aligned.
[all …]
/llvm-project-15.0.7/llvm/test/DebugInfo/MIR/InstrRef/
H A Dspill-slot-limits.mir3 # RUN: -run-pass=livedebugvalues -livedebugvalues-max-stack-slots=0 | \
7 # RUN: -run-pass=livedebugvalues -livedebugvalues-max-stack-slots=100 | \
13 # slots, which can show up with autogenerated code and/or asan.
/llvm-project-15.0.7/bolt/test/X86/
H A Ddwarf4-ftypes-dwo-input-dwp-output.test19 ; PRE-BOLT-DWP-TU-INDEX: version = 2, units = 2, slots = 4
27 ; BOLT-DWP-TU-INDEX: version = 2, units = 2, slots = 4
H A Ddwarf4-ftypes-dwp-input-dwp-output.test21 ; PRE-BOLT-DWP-TU-INDEX: version = 2, units = 2, slots = 4
29 ; BOLT-DWP-TU-INDEX: version = 2, units = 2, slots = 4
/llvm-project-15.0.7/llvm/test/DebugInfo/
H A Ddwarfdump-dwp.test40 ; CHECK-NEXT: version = 2, units = 2, slots = 16
47 ; CHECK-NEXT: version = 2, units = 2, slots = 16
/llvm-project-15.0.7/lldb/third_party/Python/module/six/
H A Dsix.py835 slots = orig_vars.get('__slots__')
836 if slots is not None:
837 if isinstance(slots, str):
838 slots = [slots]
839 for slots_var in slots:
/llvm-project-15.0.7/compiler-rt/lib/tsan/tests/unit/
H A Dtsan_trace_test.cpp89 Lock slot_lock(&ctx->slots[static_cast<uptr>(thr->fast_state.sid())].mtx); in TRACE_TEST()
149 Lock slot_lock(&ctx->slots[static_cast<uptr>(thr->fast_state.sid())].mtx); in TRACE_TEST()
177 Lock slot_lock(&ctx->slots[static_cast<uptr>(thr->fast_state.sid())].mtx); in TRACE_TEST()
220 Lock slot_lock(&ctx->slots[static_cast<uptr>(thr->fast_state.sid())].mtx); in TRACE_TEST()
/llvm-project-15.0.7/llvm/test/MC/Hexagon/
H A Dbug18767.s11 # CHECK: rror: invalid instruction packet: out of slots
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsCallingConv.td84 // Integer values get stored in stack slots that are 4 bytes in
88 // Integer values get stored in stack slots that are 8 bytes in
163 // All stack parameter slots become 64-bit doublewords and are 8-byte aligned.
183 // All stack parameter slots become 64-bit doublewords and are 8-byte aligned.
240 // Stack parameter slots for f64 are 64-bit doublewords and 8-byte aligned.
256 // Stack parameter slots for i64 and f64 are 64-bit doublewords and
289 // Stack parameter slots for i32 and f32 are 32-bit words and 4-byte aligned.
/llvm-project-15.0.7/llvm/test/tools/llvm-dwp/X86/
H A Dunknown-section-id.s16 # CHECK-NEXT: version = 2, units = 1, slots = 2
24 # CHECK-NEXT: version = 2, units = 1, slots = 2
/llvm-project-15.0.7/compiler-rt/lib/tsan/rtl/
H A Dtsan_rtl.cpp192 for (auto& slot : ctx->slots) { in DoResetImpl()
230 for (auto& slot : ctx->slots) { in DoReset()
243 for (auto& slot : ctx->slots) slot.mtx.Unlock(); in DoReset()
392 for (uptr i = 0; i < ARRAY_SIZE(slots); i++) {
393 TidSlot* slot = &slots[i];
809 for (auto& slot : ctx->slots) slot.mtx.Lock(); in ForkBefore()
839 for (auto& slot : ctx->slots) slot.mtx.Unlock(); in ForkAfter()

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