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Searched refs:size0 (Results 1 – 11 of 11) sorted by relevance

/llvm-project-15.0.7/llvm/test/Transforms/InstSimplify/
H A Ddiv-by-0-guard-before-umul_ov.ll32 define i1 @n2_wrong_size(i4 %size0, i4 %size1, i4 %nmemb) {
40 %cmp = icmp ne i4 %size1, 0 ; not %size0
41 %umul = tail call { i4, i1 } @llvm.umul.with.overflow.i4(i4 %size0, i4 %nmemb)
H A Ddiv-by-0-guard-before-smul_ov.ll32 define i1 @n2_wrong_size(i4 %size0, i4 %size1, i4 %nmemb) {
40 %cmp = icmp ne i4 %size1, 0 ; not %size0
41 %smul = tail call { i4, i1 } @llvm.smul.with.overflow.i4(i4 %size0, i4 %nmemb)
H A Ddiv-by-0-guard-before-smul_ov-not.ll36 define i1 @n2_wrong_size(i4 %size0, i4 %size1, i4 %nmemb) {
45 %cmp = icmp eq i4 %size1, 0 ; not %size0
46 %smul = tail call { i4, i1 } @llvm.smul.with.overflow.i4(i4 %size0, i4 %nmemb)
H A Ddiv-by-0-guard-before-umul_ov-not.ll36 define i1 @n2_wrong_size(i4 %size0, i4 %size1, i4 %nmemb) {
45 %cmp = icmp eq i4 %size1, 0 ; not %size0
46 %umul = tail call { i4, i1 } @llvm.umul.with.overflow.i4(i4 %size0, i4 %nmemb)
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Ddiv-by-0-guard-before-smul_ov.ll33 define i1 @n2_wrong_size(i4 %size0, i4 %size1, i4 %nmemb) {
41 %cmp = icmp ne i4 %size1, 0 ; not %size0
42 %smul = tail call { i4, i1 } @llvm.smul.with.overflow.i4(i4 %size0, i4 %nmemb)
H A Ddiv-by-0-guard-before-umul_ov.ll33 define i1 @n2_wrong_size(i4 %size0, i4 %size1, i4 %nmemb) {
41 %cmp = icmp ne i4 %size1, 0 ; not %size0
42 %umul = tail call { i4, i1 } @llvm.umul.with.overflow.i4(i4 %size0, i4 %nmemb)
H A Ddiv-by-0-guard-before-smul_ov-not.ll37 define i1 @n2_wrong_size(i4 %size0, i4 %size1, i4 %nmemb) {
46 %cmp = icmp eq i4 %size1, 0 ; not %size0
47 %smul = tail call { i4, i1 } @llvm.smul.with.overflow.i4(i4 %size0, i4 %nmemb)
H A Ddiv-by-0-guard-before-umul_ov-not.ll37 define i1 @n2_wrong_size(i4 %size0, i4 %size1, i4 %nmemb) {
46 %cmp = icmp eq i4 %size1, 0 ; not %size0
47 %umul = tail call { i4, i1 } @llvm.umul.with.overflow.i4(i4 %size0, i4 %nmemb)
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/
H A Dcall-translator.ll324 declare %size0type @func.returns.size0.struct()
334 %call = call %size0type @func.returns.size0.struct()
338 declare [0 x i8] @func.returns.size0.array()
348 %call = call [0 x i8] @func.returns.size0.array()
352 declare [1 x %size0type] @func.returns.array.size0.struct()
361 %call = call [1 x %size0type] @func.returns.array.size0.struct()
/llvm-project-15.0.7/compiler-rt/lib/tsan/rtl/
H A Dtsan_rtl_report.cpp721 uptr addr_off0, size0; in ReportRace() local
722 cur.GetAccess(&addr_off0, &size0, nullptr); in ReportRace()
736 uptr end0 = addr0 + size0; in ReportRace()
/llvm-project-15.0.7/mlir/include/mlir/Dialect/MemRef/IR/
H A DMemRefOps.td1003 sizes: [%size0, 10],
1009 sizes: [%size0, %size1],
1476 %1 = memref.subview %0[%c0, %c0][%size0, %size1][%c1, %c1]
1493 %1 = memref.subview %0[%i, %j, %k][%size0, %size1, %size2][%x, %y, %z]
1791 %2 = memref.view %0[%offset_1024][%size0, %size1] :