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/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Darm64-neon-simd-vget.ll8 ret <8 x i8> %shuffle.i
16 ret <4 x i16> %shuffle.i
24 ret <2 x i32> %shuffle.i
32 ret <1 x i64> %shuffle.i
40 ret <8 x i8> %shuffle.i
48 ret <4 x i16> %shuffle.i
56 ret <2 x i32> %shuffle.i
64 ret <1 x i64> %shuffle.i
72 ret <1 x i64> %shuffle.i
96 ret <8 x i8> %shuffle.i
[all …]
H A Dext-narrow-index.ll15 ret <8 x i8> %shuffle
26 ret <8 x i8> %shuffle
37 ret <8 x i8> %shuffle
48 ret <8 x i8> %shuffle
59 ret <8 x i8> %shuffle
70 ret <4 x i16> %shuffle
81 ret <4 x i16> %shuffle
92 ret <4 x i16> %shuffle
103 ret <4 x i16> %shuffle
191 ret <8 x i8> %shuffle
[all …]
H A Dneon-perm.ll30 ret <8 x i8> %shuffle.i
40 ret <16 x i8> %shuffle.i
50 ret <4 x i16> %shuffle.i
60 ret <8 x i16> %shuffle.i
70 ret <2 x i32> %shuffle.i
80 ret <4 x i32> %shuffle.i
90 ret <2 x i64> %shuffle.i
100 ret <8 x i8> %shuffle.i
110 ret <16 x i8> %shuffle.i
120 ret <4 x i16> %shuffle.i
[all …]
H A Darm64-neon-2velem.ll71 %mul = mul <4 x i16> %shuffle, %b
84 %mul = mul <8 x i16> %shuffle, %b
97 %mul = mul <2 x i32> %shuffle, %b
110 %mul = mul <4 x i32> %shuffle, %b
122 %mul = mul <4 x i16> %shuffle, %b
134 %mul = mul <8 x i16> %shuffle, %b
146 %mul = mul <2 x i32> %shuffle, %b
158 %mul = mul <4 x i32> %shuffle, %b
171 %mul = mul <4 x i16> %shuffle, %b
184 %mul = mul <8 x i16> %shuffle, %b
[all …]
H A Darm64-neon-3vdiff.ll1771 ….i = tail call <8 x i8> @llvm.aarch64.neon.sabd.v8i8(<8 x i8> %shuffle.i.i, <8 x i8> %shuffle.i3.i)
1810 ….i = tail call <8 x i8> @llvm.aarch64.neon.uabd.v8i8(<8 x i8> %shuffle.i.i, <8 x i8> %shuffle.i3.i)
1849 ….i = tail call <8 x i8> @llvm.aarch64.neon.sabd.v8i8(<8 x i8> %shuffle.i.i, <8 x i8> %shuffle.i3.i)
1891 ….i = tail call <8 x i8> @llvm.aarch64.neon.uabd.v8i8(<8 x i8> %shuffle.i.i, <8 x i8> %shuffle.i3.i)
1993 …= tail call <8 x i16> @llvm.aarch64.neon.smull.v8i16(<8 x i8> %shuffle.i.i, <8 x i8> %shuffle.i3.i)
2029 …= tail call <8 x i16> @llvm.aarch64.neon.umull.v8i16(<8 x i8> %shuffle.i.i, <8 x i8> %shuffle.i3.i)
2131 …= tail call <8 x i16> @llvm.aarch64.neon.smull.v8i16(<8 x i8> %shuffle.i.i, <8 x i8> %shuffle.i3.i)
2170 …= tail call <8 x i16> @llvm.aarch64.neon.umull.v8i16(<8 x i8> %shuffle.i.i, <8 x i8> %shuffle.i3.i)
2275 …= tail call <8 x i16> @llvm.aarch64.neon.smull.v8i16(<8 x i8> %shuffle.i.i, <8 x i8> %shuffle.i3.i)
2314 …= tail call <8 x i16> @llvm.aarch64.neon.umull.v8i16(<8 x i8> %shuffle.i.i, <8 x i8> %shuffle.i3.i)
[all …]
H A Darm64-vcombine.ll11 %shuffle.i = shufflevector <2 x i64> %0, <2 x i64> undef, <1 x i32> zeroinitializer
13 %shuffle.i4 = shufflevector <2 x i64> %1, <2 x i64> undef, <1 x i32> zeroinitializer
14 %shuffle.i3 = shufflevector <1 x i64> %shuffle.i, <1 x i64> %shuffle.i4, <2 x i32> <i32 0, i32 1>
15 %2 = bitcast <2 x i64> %shuffle.i3 to <16 x i8>
H A Dconcat_vector-truncate-combine.ll17 %shuffle = shufflevector <2 x i16> %at, <2 x i16> %bt, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
18 ret <4 x i16> %shuffle
29 %shuffle = shufflevector <2 x i32> %at, <2 x i32> %bt, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
30 ret <4 x i32> %shuffle
41 %shuffle = shufflevector <2 x i16> %at, <2 x i16> %bt, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
42 ret <4 x i16> %shuffle
54 …%shuffle = shufflevector <4 x i8> %at, <4 x i8> %bt, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4,…
55 ret <8 x i8> %shuffle
67 ret <8 x i16> %shuffle
79 ret <8 x i8> %shuffle
[all …]
H A Darm64-neon-2velem-high.ll40 %shuffle.i.i = shufflevector <4 x i32> %a, <4 x i32> undef, <2 x i32> <i32 2, i32 3>
54 %shuffle.i.i = shufflevector <4 x i32> %a, <4 x i32> undef, <2 x i32> <i32 2, i32 3>
94 %shuffle.i.i = shufflevector <4 x i32> %a, <4 x i32> undef, <2 x i32> <i32 2, i32 3>
108 %shuffle.i.i = shufflevector <4 x i32> %a, <4 x i32> undef, <2 x i32> <i32 2, i32 3>
148 %shuffle.i.i = shufflevector <4 x i32> %a, <4 x i32> undef, <2 x i32> <i32 2, i32 3>
162 %shuffle.i.i = shufflevector <4 x i32> %a, <4 x i32> undef, <2 x i32> <i32 2, i32 3>
204 %shuffle.i.i = shufflevector <4 x i32> %b, <4 x i32> undef, <2 x i32> <i32 2, i32 3>
219 %shuffle.i.i = shufflevector <4 x i32> %b, <4 x i32> undef, <2 x i32> <i32 2, i32 3>
262 %shuffle.i.i = shufflevector <4 x i32> %b, <4 x i32> undef, <2 x i32> <i32 2, i32 3>
277 %shuffle.i.i = shufflevector <4 x i32> %b, <4 x i32> undef, <2 x i32> <i32 2, i32 3>
[all …]
H A Dneon-scalar-copy.ll85 ret <1 x i8> %shuffle.i
92 %shuffle.i = shufflevector <8 x i8> %v1, <8 x i8> undef, <1 x i32> <i32 7>
93 ret <1 x i8> %shuffle.i
100 %shuffle.i = shufflevector <8 x i16> %v1, <8 x i16> undef, <1 x i32> <i32 7>
101 ret <1 x i16> %shuffle.i
109 ret <1 x i16> %shuffle.i
116 %shuffle = shufflevector <4 x i32> %v1, <4 x i32> undef, <1 x i32> <i32 3>
117 ret <1 x i32> %shuffle
124 %shuffle = shufflevector <2 x i32> %v1, <2 x i32> undef, <1 x i32> <i32 1>
125 ret <1 x i32> %shuffle
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dvector-shuffle-sse1.ll10 ret <4 x float> %shuffle
19 ret <4 x float> %shuffle
28 ret <4 x float> %shuffle
37 ret <4 x float> %shuffle
46 ret <4 x float> %shuffle
55 ret <4 x float> %shuffle
64 ret <4 x float> %shuffle
73 ret <4 x float> %shuffle
82 ret <4 x float> %shuffle
91 ret <4 x float> %shuffle
[all …]
H A Dvector-shuffle-512-v8.ll11 ret <8 x double> %shuffle
21 ret <8 x double> %shuffle
31 ret <8 x double> %shuffle
43 ret <8 x double> %shuffle
59 ret <8 x double> %shuffle
75 ret <8 x double> %shuffle
91 ret <8 x double> %shuffle
107 ret <8 x double> %shuffle
841 ret <8 x i64> %shuffle
851 ret <8 x i64> %shuffle
[all …]
H A Davx-unpack.ll10 ret <8 x float> %shuffle.i
19 ret <4 x double> %shuffle.i
28 ret <8 x float> %shuffle.i
48 ret <8 x float> %shuffle.i
94 ret <8 x i32> %shuffle.i
106 ret <8 x i32> %shuffle.i
115 ret <4 x i64> %shuffle.i
127 ret <4 x i64> %shuffle.i
136 ret <8 x i32> %shuffle.i
148 ret <8 x i32> %shuffle.i
[all …]
H A Dvector-shuffle-128-v2.ll31 ret <2 x i64> %shuffle
44 ret <2 x i64> %shuffle
57 ret <2 x i64> %shuffle
80 ret <2 x i64> %shuffle
93 ret <2 x i64> %shuffle
106 ret <2 x i64> %shuffle
332 ret <2 x i64> %shuffle
346 ret <2 x i64> %shuffle
374 ret <2 x i64> %shuffle
406 ret <2 x i64> %shuffle
[all …]
H A Dvector-shuffle-masked.ll1027 %shuffle.cast = bitcast <4 x i64> %shuffle to <8 x i32>
1040 %shuffle.cast = bitcast <4 x i64> %shuffle to <8 x i32>
1054 %shuffle.cast = bitcast <4 x i64> %shuffle to <8 x i32>
1067 %shuffle.cast = bitcast <4 x i64> %shuffle to <8 x i32>
1134 %shuffle.cast = bitcast <2 x i64> %shuffle to <4 x i32>
1149 %shuffle.cast = bitcast <2 x i64> %shuffle to <4 x i32>
1165 %shuffle.cast = bitcast <2 x i64> %shuffle to <4 x i32>
1180 %shuffle.cast = bitcast <2 x i64> %shuffle to <4 x i32>
1255 %shuffle.cast = bitcast <8 x i32> %shuffle to <4 x i64>
1269 %shuffle.cast = bitcast <8 x i32> %shuffle to <4 x i64>
[all …]
H A Dvector-shuffle-256-v4.ll27 ret <4 x double> %shuffle
47 ret <4 x double> %shuffle
67 ret <4 x double> %shuffle
88 ret <4 x double> %shuffle
108 ret <4 x double> %shuffle
801 ret <4 x i64> %shuffle
821 ret <4 x i64> %shuffle
841 ret <4 x i64> %shuffle
861 ret <4 x i64> %shuffle
882 ret <4 x i64> %shuffle
[all …]
H A Davx-cast.ll15 ret <8 x float> %shuffle.i
23 …%shuffle.i = shufflevector <2 x double> %m, <2 x double> zeroinitializer, <4 x i32> <i32 0, i32 1,…
24 ret <4 x double> %shuffle.i
34 …%shuffle.i = shufflevector <2 x i64> %m, <2 x i64> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2…
35 ret <4 x i64> %shuffle.i
47 %shuffle.i = shufflevector <8 x float> %m, <8 x float> %m, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
48 ret <4 x float> %shuffle.i
57 %shuffle.i = shufflevector <4 x i64> %m, <4 x i64> %m, <2 x i32> <i32 0, i32 1>
58 ret <2 x i64> %shuffle.i
67 %shuffle.i = shufflevector <4 x double> %m, <4 x double> %m, <2 x i32> <i32 0, i32 1>
[all …]
H A Dvector-shuffle-256-v8.ll22 ret <8 x float> %shuffle
69 ret <8 x float> %shuffle
116 ret <8 x float> %shuffle
163 ret <8 x float> %shuffle
181 ret <8 x float> %shuffle
198 ret <8 x float> %shuffle
215 ret <8 x float> %shuffle
232 ret <8 x float> %shuffle
241 ret <8 x float> %shuffle
258 ret <8 x float> %shuffle
[all …]
H A Davx-vperm2x128.ll17 ret <8 x float> %shuffle
34 ret <8 x float> %shuffle
44 ret <8 x float> %shuffle
59 ret <8 x float> %shuffle
71 ret <8 x float> %shuffle
86 ret <8 x float> %shuffle
113 ret <32 x i8> %shuffle
135 ret <32 x i8> %shuffle
145 ret <4 x i64> %shuffle
166 ret <4 x i64> %shuffle
[all …]
H A Dvector-shuffle-128-v4.ll24 ret <4 x i32> %shuffle
37 ret <4 x i32> %shuffle
50 ret <4 x i32> %shuffle
63 ret <4 x i32> %shuffle
76 ret <4 x i32> %shuffle
89 ret <4 x i32> %shuffle
102 ret <4 x i32> %shuffle
115 ret <4 x i32> %shuffle
129 ret <4 x i32> %shuffle
377 ret <4 x i32> %shuffle
[all …]
/llvm-project-15.0.7/mlir/test/Dialect/Vector/
H A Dvector-transpose-lowering.mlir55 // AVX2-NEXT: vector.shuffle {{.*}} [0, 8, 1, 9, 4, 12, 5, 13] : vector<8xf32>, vector<8xf32>
57 // AVX2-NEXT: vector.shuffle {{.*}} [0, 8, 1, 9, 4, 12, 5, 13] : vector<8xf32>, vector<8xf32>
59 // AVX2-NEXT: vector.shuffle {{.*}} [0, 1, 8, 9, 4, 5, 12, 13] : vector<8xf32>, vector<8xf32>
556 // AVX2-NOT: vector.shuffle
566 // AVX2-NOT: vector.shuffle
576 // AVX2-NOT: vector.shuffle
603 // AVX2-NOT: vector.shuffle
630 // AVX2-NOT: vector.shuffle
644 // AVX2-NOT: vector.shuffle
655 // AVX2-NOT: vector.shuffle
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dcombine-vmovdrr.ll4 declare <8 x i8> @llvm.arm.neon.vtbl2(<8 x i8> %shuffle.i.i307, <8 x i8> %shuffle.i27.i308, <8 x i8…
18 %shuffle.i.bc.i309 = load <2 x i64>, <2 x i64>* %addr
20 %shuffle.i.extract.i310 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 0
21 %shuffle.i27.extract.i311 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 1
22 %tmp45 = bitcast i64 %shuffle.i.extract.i310 to <8 x i8>
61 %shuffle.i.bc.i309 = load <2 x i64>, <2 x i64>* %addr
63 %shuffle.i.extract.i310 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 %index
64 %shuffle.i27.extract.i311 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 1
86 %shuffle.i.extract.i310 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 0
87 %shuffle.i27.extract.i311 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 1
[all …]
H A D2012-01-24-RegSequenceLiveRange.ll46 %shuffle.i39.i.i1035 = shufflevector <2 x i64> undef, <2 x i64> undef, <1 x i32> zeroinitializer
47 …%shuffle.i38.i.i1036 = shufflevector <2 x i64> zeroinitializer, <2 x i64> undef, <1 x i32> zeroini…
48 …%shuffle.i37.i.i1037 = shufflevector <1 x i64> %shuffle.i39.i.i1035, <1 x i64> %shuffle.i38.i.i103…
49 %0 = bitcast <2 x i64> %shuffle.i37.i.i1037 to <4 x float>
51 %shuffle.i36.i.i = shufflevector <2 x i64> %1, <2 x i64> undef, <1 x i32> zeroinitializer
52 %shuffle.i35.i.i = shufflevector <2 x i64> undef, <2 x i64> undef, <1 x i32> zeroinitializer
53 …%shuffle.i34.i.i = shufflevector <1 x i64> %shuffle.i36.i.i, <1 x i64> %shuffle.i35.i.i, <2 x i32>…
54 %2 = bitcast <2 x i64> %shuffle.i34.i.i to <4 x float>
/llvm-project-15.0.7/lld/test/ELF/
H A Dshuffle-sections.s9 ## --shuffle-sections= shuffles input sections.
10 # RUN: ld.lld --shuffle-sections='*=1' %t.o -o %t1.out
15 ## Test that --shuffle-sections= can be used with --symbol-ordering-file
30 # RUN: ld.lld --shuffle-sections '*=-1' %t.o -o %t-1.out
36 # RUN: ld.lld --shuffle-sections '.text.*=-1' %t.o -o %t4.out
42 # RUN: ld.lld --shuffle-sections '.text.*=-1' --shuffle-sections '.text.*=-1' %t.o -o %t.out
46 # RUN: not ld.lld --shuffle-sections= 2>&1 | FileCheck %s --check-prefix=USAGE -DV=
49 # RUN: not ld.lld --shuffle-sections=a 2>&1 | FileCheck %s --check-prefix=USAGE -DV=a
51 # USAGE: error: --shuffle-sections=: expected <section_glob>=<seed>, but got '[[V]]'
53 # RUN: not ld.lld --shuffle-sections='['=0 2>&1 | FileCheck %s --check-prefix=INVALID
[all …]
/llvm-project-15.0.7/libcxx/test/std/algorithms/alg.modifying.operations/alg.random.shuffle/
H A Dranges_shuffle.pass.cpp94 std::ranges::shuffle(std::forward<Range>(range), std::forward<Gen>(gen));
140 std::same_as<Iter> decltype(auto) result = std::ranges::shuffle(range, gen); in test_one()
197 std::ranges::shuffle(begin, end, g); in test_generator()
198 std::ranges::shuffle(in, g); in test_generator()
203 std::ranges::shuffle(begin, end, g); in test_generator()
204 std::ranges::shuffle(in, g); in test_generator()
208 std::ranges::shuffle(begin, end, Gen()); in test_generator()
209 std::ranges::shuffle(in, Gen()); in test_generator()
214 std::ranges::shuffle(begin, end, std::move(g1)); in test_generator()
215 std::ranges::shuffle(in, std::move(g2)); in test_generator()
[all …]
/llvm-project-15.0.7/mlir/test/Dialect/GPU/
H A Dall-reduce.mlir44 …// CHECK: [[VAL_34:%.*]], [[VAL_35:%.*]] = gpu.shuffle xor [[VAL_0]], [[VAL_6]], [[VAL_32]] : f32
52 …// CHECK: [[VAL_38:%.*]], [[VAL_39:%.*]] = gpu.shuffle xor [[VAL_37]], [[VAL_7]], [[VAL_32]] : f…
60 …// CHECK: [[VAL_42:%.*]], [[VAL_43:%.*]] = gpu.shuffle xor [[VAL_41]], [[VAL_8]], [[VAL_32]] : f…
68 …// CHECK: [[VAL_46:%.*]], [[VAL_47:%.*]] = gpu.shuffle xor [[VAL_45]], [[VAL_9]], [[VAL_32]] : f…
76 …// CHECK: [[VAL_50:%.*]], [[VAL_51:%.*]] = gpu.shuffle xor [[VAL_49]], [[VAL_10]], [[VAL_32]] : …
86 … // CHECK: [[VAL_54:%.*]], [[VAL_55:%.*]] = gpu.shuffle xor [[VAL_0]], [[VAL_6]], [[VAL_5]] : f32
88 …// CHECK: [[VAL_57:%.*]], [[VAL_58:%.*]] = gpu.shuffle xor [[VAL_56]], [[VAL_7]], [[VAL_5]] : f32
90 …// CHECK: [[VAL_60:%.*]], [[VAL_61:%.*]] = gpu.shuffle xor [[VAL_59]], [[VAL_8]], [[VAL_5]] : f32
92 …// CHECK: [[VAL_63:%.*]], [[VAL_64:%.*]] = gpu.shuffle xor [[VAL_62]], [[VAL_9]], [[VAL_5]] : f32
94 …// CHECK: [[VAL_66:%.*]], [[VAL_67:%.*]] = gpu.shuffle xor [[VAL_65]], [[VAL_10]], [[VAL_5]] : f…
[all …]

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