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Searched refs:shift_type (Results 1 – 3 of 3) sorted by relevance

/llvm-project-15.0.7/lldb/source/Plugins/Instruction/ARM/
H A DEmulateInstructionARM.h445 ARM_ShifterType shift_type);
449 ARM_ShifterType shift_type);
H A DEmulateInstructionARM.cpp3744 ARM_ShifterType shift_type) { in EmulateShiftImm() argument
3763 if (shift_type == SRType_ROR && use_encoding == eEncodingT1) { in EmulateShiftImm()
3773 if (shift_type == SRType_ROR) in EmulateShiftImm()
3784 if (shift_type == SRType_RRX) in EmulateShiftImm()
3805 if (shift_type == SRType_ROR && imm5 == 0) in EmulateShiftImm()
3806 shift_type = SRType_RRX; in EmulateShiftImm()
3815 (shift_type == SRType_RRX ? 1 : DecodeImmShift(shift_type, imm5)); in EmulateShiftImm()
3817 uint32_t result = Shift_C(value, shift_type, amt, APSR_C, carry, &success); in EmulateShiftImm()
3834 ARM_ShifterType shift_type) { in EmulateShiftReg() argument
3888 uint32_t result = Shift_C(value, shift_type, amt, APSR_C, carry, &success); in EmulateShiftReg()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64InstrFormats.td2218 class BaseShift<bits<2> shift_type, RegisterClass regtype, string asm,
2222 let Inst{11-10} = shift_type;
2225 multiclass Shift<bits<2> shift_type, string asm, SDNode OpNode> {
2226 def Wr : BaseShift<shift_type, GPR32, asm> {
2230 def Xr : BaseShift<shift_type, GPR64, asm, OpNode> {