| /llvm-project-15.0.7/compiler-rt/test/ubsan/TestCases/Integer/ |
| H A D | unsigned-shift.cpp | 4 #define shift(val, amount) ({ \ macro
13 shift(0b00000000'00000000'00000000'00000000, 31); in main()
14 shift(0b00000000'00000000'00000000'00000001, 31); in main()
15 …shift(0b00000000'00000000'00000000'00000010, 31); // CHECK: unsigned-shift.cpp:[[@LINE]]:3: runtim… in main()
16 …shift(0b00000000'00000000'00000000'00000100, 31); // CHECK: unsigned-shift.cpp:[[@LINE]]:3: runtim… in main()
17 …shift(0b00000000'00000000'00000000'00001000, 31); // CHECK: unsigned-shift.cpp:[[@LINE]]:3: runtim… in main()
18 …shift(0b00000000'00000000'00000000'00010000, 31); // CHECK: unsigned-shift.cpp:[[@LINE]]:3: runtim… in main()
19 …shift(0b00000000'00000000'00000000'00100000, 31); // CHECK: unsigned-shift.cpp:[[@LINE]]:3: runtim… in main()
47 shift(0b10000000'00000000'00000000'00000000, 00); in main()
50 shift(0xffff'ffff, 0); in main()
[all …]
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| /llvm-project-15.0.7/clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/ |
| H A D | vsll.c | 13 return vsll(op1, shift, vl); in test_vsll_vv_i8mf8()
22 return vsll(op1, shift, vl); in test_vsll_vx_i8mf8()
31 return vsll(op1, shift, vl); in test_vsll_vv_i8mf4()
40 return vsll(op1, shift, vl); in test_vsll_vx_i8mf4()
49 return vsll(op1, shift, vl); in test_vsll_vv_i8mf2()
58 return vsll(op1, shift, vl); in test_vsll_vx_i8mf2()
67 return vsll(op1, shift, vl); in test_vsll_vv_i8m1()
76 return vsll(op1, shift, vl); in test_vsll_vx_i8m1()
85 return vsll(op1, shift, vl); in test_vsll_vv_i8m2()
94 return vsll(op1, shift, vl); in test_vsll_vx_i8m2()
[all …]
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| H A D | vnclip.c | 13 return vnclip(op1, shift, vl); in test_vnclip_wv_i8mf8()
22 return vnclip(op1, shift, vl); in test_vnclip_wx_i8mf8()
31 return vnclip(op1, shift, vl); in test_vnclip_wv_i8mf4()
40 return vnclip(op1, shift, vl); in test_vnclip_wx_i8mf4()
49 return vnclip(op1, shift, vl); in test_vnclip_wv_i8mf2()
58 return vnclip(op1, shift, vl); in test_vnclip_wx_i8mf2()
67 return vnclip(op1, shift, vl); in test_vnclip_wv_i8m1()
76 return vnclip(op1, shift, vl); in test_vnclip_wx_i8m1()
85 return vnclip(op1, shift, vl); in test_vnclip_wv_i8m2()
94 return vnclip(op1, shift, vl); in test_vnclip_wx_i8m2()
[all …]
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| H A D | vsra.c | 13 return vsra(op1, shift, vl); in test_vsra_vv_i8mf8()
22 return vsra(op1, shift, vl); in test_vsra_vx_i8mf8()
31 return vsra(op1, shift, vl); in test_vsra_vv_i8mf4()
40 return vsra(op1, shift, vl); in test_vsra_vx_i8mf4()
49 return vsra(op1, shift, vl); in test_vsra_vv_i8mf2()
58 return vsra(op1, shift, vl); in test_vsra_vx_i8mf2()
67 return vsra(op1, shift, vl); in test_vsra_vv_i8m1()
76 return vsra(op1, shift, vl); in test_vsra_vx_i8m1()
85 return vsra(op1, shift, vl); in test_vsra_vv_i8m2()
94 return vsra(op1, shift, vl); in test_vsra_vx_i8m2()
[all …]
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| H A D | vsrl.c | 13 return vsrl(op1, shift, vl); in test_vsrl_vv_u8mf8()
22 return vsrl(op1, shift, vl); in test_vsrl_vx_u8mf8()
31 return vsrl(op1, shift, vl); in test_vsrl_vv_u8mf4()
40 return vsrl(op1, shift, vl); in test_vsrl_vx_u8mf4()
49 return vsrl(op1, shift, vl); in test_vsrl_vv_u8mf2()
58 return vsrl(op1, shift, vl); in test_vsrl_vx_u8mf2()
67 return vsrl(op1, shift, vl); in test_vsrl_vv_u8m1()
76 return vsrl(op1, shift, vl); in test_vsrl_vx_u8m1()
85 return vsrl(op1, shift, vl); in test_vsrl_vv_u8m2()
94 return vsrl(op1, shift, vl); in test_vsrl_vx_u8m2()
[all …]
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| H A D | vssrl.c | 13 return vssrl(op1, shift, vl); in test_vssrl_vv_u8mf8()
22 return vssrl(op1, shift, vl); in test_vssrl_vx_u8mf8()
31 return vssrl(op1, shift, vl); in test_vssrl_vv_u8mf4()
40 return vssrl(op1, shift, vl); in test_vssrl_vx_u8mf4()
49 return vssrl(op1, shift, vl); in test_vssrl_vv_u8mf2()
58 return vssrl(op1, shift, vl); in test_vssrl_vx_u8mf2()
67 return vssrl(op1, shift, vl); in test_vssrl_vv_u8m1()
76 return vssrl(op1, shift, vl); in test_vssrl_vx_u8m1()
85 return vssrl(op1, shift, vl); in test_vssrl_vv_u8m2()
94 return vssrl(op1, shift, vl); in test_vssrl_vx_u8m2()
[all …]
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| H A D | vssra.c | 13 return vssra(op1, shift, vl); in test_vssra_vv_i8mf8()
22 return vssra(op1, shift, vl); in test_vssra_vx_i8mf8()
31 return vssra(op1, shift, vl); in test_vssra_vv_i8mf4()
40 return vssra(op1, shift, vl); in test_vssra_vx_i8mf4()
49 return vssra(op1, shift, vl); in test_vssra_vv_i8mf2()
58 return vssra(op1, shift, vl); in test_vssra_vx_i8mf2()
67 return vssra(op1, shift, vl); in test_vssra_vv_i8m1()
76 return vssra(op1, shift, vl); in test_vssra_vx_i8m1()
85 return vssra(op1, shift, vl); in test_vssra_vv_i8m2()
94 return vssra(op1, shift, vl); in test_vssra_vx_i8m2()
[all …]
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| H A D | vnsrl.c | 13 return vnsrl(op1, shift, vl); in test_vnsrl_wv_u8mf8()
22 return vnsrl(op1, shift, vl); in test_vnsrl_wx_u8mf8()
31 return vnsrl(op1, shift, vl); in test_vnsrl_wv_u8mf4()
40 return vnsrl(op1, shift, vl); in test_vnsrl_wx_u8mf4()
49 return vnsrl(op1, shift, vl); in test_vnsrl_wv_u8mf2()
58 return vnsrl(op1, shift, vl); in test_vnsrl_wx_u8mf2()
67 return vnsrl(op1, shift, vl); in test_vnsrl_wv_u8m1()
76 return vnsrl(op1, shift, vl); in test_vnsrl_wx_u8m1()
85 return vnsrl(op1, shift, vl); in test_vnsrl_wv_u8m2()
94 return vnsrl(op1, shift, vl); in test_vnsrl_wx_u8m2()
[all …]
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| H A D | vnsra.c | 13 return vnsra(op1, shift, vl); in test_vnsra_wv_i8mf8()
22 return vnsra(op1, shift, vl); in test_vnsra_wx_i8mf8()
31 return vnsra(op1, shift, vl); in test_vnsra_wv_i8mf4()
40 return vnsra(op1, shift, vl); in test_vnsra_wx_i8mf4()
49 return vnsra(op1, shift, vl); in test_vnsra_wv_i8mf2()
58 return vnsra(op1, shift, vl); in test_vnsra_wx_i8mf2()
67 return vnsra(op1, shift, vl); in test_vnsra_wv_i8m1()
76 return vnsra(op1, shift, vl); in test_vnsra_wx_i8m1()
85 return vnsra(op1, shift, vl); in test_vnsra_wv_i8m2()
94 return vnsra(op1, shift, vl); in test_vnsra_wx_i8m2()
[all …]
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| /llvm-project-15.0.7/clang/test/CodeGen/RISCV/rvv-intrinsics/ |
| H A D | vsll.c | 13 return vsll_vv_i8mf8(op1, shift, vl); in test_vsll_vv_i8mf8()
22 return vsll_vx_i8mf8(op1, shift, vl); in test_vsll_vx_i8mf8()
31 return vsll_vv_i8mf4(op1, shift, vl); in test_vsll_vv_i8mf4()
40 return vsll_vx_i8mf4(op1, shift, vl); in test_vsll_vx_i8mf4()
49 return vsll_vv_i8mf2(op1, shift, vl); in test_vsll_vv_i8mf2()
58 return vsll_vx_i8mf2(op1, shift, vl); in test_vsll_vx_i8mf2()
67 return vsll_vv_i8m1(op1, shift, vl); in test_vsll_vv_i8m1()
76 return vsll_vx_i8m1(op1, shift, vl); in test_vsll_vx_i8m1()
85 return vsll_vv_i8m2(op1, shift, vl); in test_vsll_vv_i8m2()
94 return vsll_vx_i8m2(op1, shift, vl); in test_vsll_vx_i8m2()
[all …]
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| H A D | vnclip.c | 13 return vnclip_wv_i8mf8(op1, shift, vl); in test_vnclip_wv_i8mf8()
22 return vnclip_wx_i8mf8(op1, shift, vl); in test_vnclip_wx_i8mf8()
31 return vnclip_wv_i8mf4(op1, shift, vl); in test_vnclip_wv_i8mf4()
40 return vnclip_wx_i8mf4(op1, shift, vl); in test_vnclip_wx_i8mf4()
49 return vnclip_wv_i8mf2(op1, shift, vl); in test_vnclip_wv_i8mf2()
58 return vnclip_wx_i8mf2(op1, shift, vl); in test_vnclip_wx_i8mf2()
67 return vnclip_wv_i8m1(op1, shift, vl); in test_vnclip_wv_i8m1()
76 return vnclip_wx_i8m1(op1, shift, vl); in test_vnclip_wx_i8m1()
85 return vnclip_wv_i8m2(op1, shift, vl); in test_vnclip_wv_i8m2()
94 return vnclip_wx_i8m2(op1, shift, vl); in test_vnclip_wx_i8m2()
[all …]
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| H A D | vsra.c | 13 return vsra_vv_i8mf8(op1, shift, vl); in test_vsra_vv_i8mf8()
22 return vsra_vx_i8mf8(op1, shift, vl); in test_vsra_vx_i8mf8()
31 return vsra_vv_i8mf4(op1, shift, vl); in test_vsra_vv_i8mf4()
40 return vsra_vx_i8mf4(op1, shift, vl); in test_vsra_vx_i8mf4()
49 return vsra_vv_i8mf2(op1, shift, vl); in test_vsra_vv_i8mf2()
58 return vsra_vx_i8mf2(op1, shift, vl); in test_vsra_vx_i8mf2()
67 return vsra_vv_i8m1(op1, shift, vl); in test_vsra_vv_i8m1()
76 return vsra_vx_i8m1(op1, shift, vl); in test_vsra_vx_i8m1()
85 return vsra_vv_i8m2(op1, shift, vl); in test_vsra_vv_i8m2()
94 return vsra_vx_i8m2(op1, shift, vl); in test_vsra_vx_i8m2()
[all …]
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| H A D | vssra.c | 13 return vssra_vv_i8mf8(op1, shift, vl); in test_vssra_vv_i8mf8()
22 return vssra_vx_i8mf8(op1, shift, vl); in test_vssra_vx_i8mf8()
31 return vssra_vv_i8mf4(op1, shift, vl); in test_vssra_vv_i8mf4()
40 return vssra_vx_i8mf4(op1, shift, vl); in test_vssra_vx_i8mf4()
49 return vssra_vv_i8mf2(op1, shift, vl); in test_vssra_vv_i8mf2()
58 return vssra_vx_i8mf2(op1, shift, vl); in test_vssra_vx_i8mf2()
67 return vssra_vv_i8m1(op1, shift, vl); in test_vssra_vv_i8m1()
76 return vssra_vx_i8m1(op1, shift, vl); in test_vssra_vx_i8m1()
85 return vssra_vv_i8m2(op1, shift, vl); in test_vssra_vv_i8m2()
94 return vssra_vx_i8m2(op1, shift, vl); in test_vssra_vx_i8m2()
[all …]
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| H A D | vssrl.c | 13 return vssrl_vv_u8mf8(op1, shift, vl); in test_vssrl_vv_u8mf8()
22 return vssrl_vx_u8mf8(op1, shift, vl); in test_vssrl_vx_u8mf8()
31 return vssrl_vv_u8mf4(op1, shift, vl); in test_vssrl_vv_u8mf4()
40 return vssrl_vx_u8mf4(op1, shift, vl); in test_vssrl_vx_u8mf4()
49 return vssrl_vv_u8mf2(op1, shift, vl); in test_vssrl_vv_u8mf2()
58 return vssrl_vx_u8mf2(op1, shift, vl); in test_vssrl_vx_u8mf2()
67 return vssrl_vv_u8m1(op1, shift, vl); in test_vssrl_vv_u8m1()
76 return vssrl_vx_u8m1(op1, shift, vl); in test_vssrl_vx_u8m1()
85 return vssrl_vv_u8m2(op1, shift, vl); in test_vssrl_vv_u8m2()
94 return vssrl_vx_u8m2(op1, shift, vl); in test_vssrl_vx_u8m2()
[all …]
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| H A D | vsrl.c | 13 return vsrl_vv_u8mf8(op1, shift, vl); in test_vsrl_vv_u8mf8()
22 return vsrl_vx_u8mf8(op1, shift, vl); in test_vsrl_vx_u8mf8()
31 return vsrl_vv_u8mf4(op1, shift, vl); in test_vsrl_vv_u8mf4()
40 return vsrl_vx_u8mf4(op1, shift, vl); in test_vsrl_vx_u8mf4()
49 return vsrl_vv_u8mf2(op1, shift, vl); in test_vsrl_vv_u8mf2()
58 return vsrl_vx_u8mf2(op1, shift, vl); in test_vsrl_vx_u8mf2()
67 return vsrl_vv_u8m1(op1, shift, vl); in test_vsrl_vv_u8m1()
76 return vsrl_vx_u8m1(op1, shift, vl); in test_vsrl_vx_u8m1()
85 return vsrl_vv_u8m2(op1, shift, vl); in test_vsrl_vv_u8m2()
94 return vsrl_vx_u8m2(op1, shift, vl); in test_vsrl_vx_u8m2()
[all …]
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| H A D | vnsra.c | 13 return vnsra_wv_i8mf8(op1, shift, vl); in test_vnsra_wv_i8mf8()
22 return vnsra_wx_i8mf8(op1, shift, vl); in test_vnsra_wx_i8mf8()
31 return vnsra_wv_i8mf4(op1, shift, vl); in test_vnsra_wv_i8mf4()
40 return vnsra_wx_i8mf4(op1, shift, vl); in test_vnsra_wx_i8mf4()
49 return vnsra_wv_i8mf2(op1, shift, vl); in test_vnsra_wv_i8mf2()
58 return vnsra_wx_i8mf2(op1, shift, vl); in test_vnsra_wx_i8mf2()
67 return vnsra_wv_i8m1(op1, shift, vl); in test_vnsra_wv_i8m1()
76 return vnsra_wx_i8m1(op1, shift, vl); in test_vnsra_wx_i8m1()
85 return vnsra_wv_i8m2(op1, shift, vl); in test_vnsra_wv_i8m2()
94 return vnsra_wx_i8m2(op1, shift, vl); in test_vnsra_wx_i8m2()
[all …]
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| H A D | vnsrl.c | 13 return vnsrl_wv_u8mf8(op1, shift, vl); in test_vnsrl_wv_u8mf8()
22 return vnsrl_wx_u8mf8(op1, shift, vl); in test_vnsrl_wx_u8mf8()
31 return vnsrl_wv_u8mf4(op1, shift, vl); in test_vnsrl_wv_u8mf4()
40 return vnsrl_wx_u8mf4(op1, shift, vl); in test_vnsrl_wx_u8mf4()
49 return vnsrl_wv_u8mf2(op1, shift, vl); in test_vnsrl_wv_u8mf2()
58 return vnsrl_wx_u8mf2(op1, shift, vl); in test_vnsrl_wx_u8mf2()
67 return vnsrl_wv_u8m1(op1, shift, vl); in test_vnsrl_wv_u8m1()
76 return vnsrl_wx_u8m1(op1, shift, vl); in test_vnsrl_wx_u8m1()
85 return vnsrl_wv_u8m2(op1, shift, vl); in test_vnsrl_wv_u8m2()
94 return vnsrl_wx_u8m2(op1, shift, vl); in test_vnsrl_wx_u8m2()
[all …]
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| /llvm-project-15.0.7/clang/test/CodeGen/X86/ |
| H A D | rot-intrinsics.c | 21 return __rolb(value, shift); in test__rolb()
28 return __rolw(value, shift); in test__rolw()
35 return __rold(value, shift); in test__rold()
43 return __rolq(value, shift); in test__rolq()
51 return __rorb(value, shift); in test__rorb()
58 return __rorw(value, shift); in test__rorw()
65 return __rord(value, shift); in test__rord()
73 return __rorq(value, shift); in test__rorq()
81 return _rotwl(value, shift); in test_rotwl()
88 return _rotl(value, shift); in test_rotl()
[all …]
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| /llvm-project-15.0.7/clang/test/CodeGen/ |
| H A D | ms-intrinsics-rotations.c | 23 return _rotl8(value, shift); in test_rotl8()
30 return _rotl16(value, shift); in test_rotl16()
36 unsigned int test_rotl(unsigned int value, int shift) { in test_rotl() argument
37 return _rotl(value, shift); in test_rotl()
44 return _lrotl(value, shift); in test_lrotl()
54 return _rotl64(value, shift); in test_rotl64()
63 return _rotr8(value, shift); in test_rotr8()
70 return _rotr16(value, shift); in test_rotr16()
77 return _rotr(value, shift); in test_rotr()
84 return _lrotr(value, shift); in test_lrotr()
[all …]
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| /llvm-project-15.0.7/flang/test/Lower/Intrinsics/ |
| H A D | ishftc.f90 | 53 integer :: i, shift local
54 print *, ishftc(i, shift, size)
79 integer :: i(:), shift(:) local
95 print *, ishftc(i, shift, size)
104 integer :: i(:), shift(:) local
122 print *, ishftc(i, shift, size)
128 integer :: shift(4) = [2, 1, -1, -2] variable
130 call dyn_optional_scalar(i(1), shift(1))
133 call dyn_optional_array_scalar(i, shift)
136 call dyn_optional_array(i, shift)
[all …]
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| /llvm-project-15.0.7/clang/test/CodeGen/arm-mve-intrinsics/ |
| H A D | scalar-shifts.c | 22 int64_t test_asrl(int64_t value, int32_t shift) in test_asrl() argument
24 return asrl(value, shift); in test_asrl()
41 uint64_t test_lsll(uint64_t value, int32_t shift) in test_lsll() argument
43 return lsll(value, shift); in test_lsll()
51 int32_t test_sqrshr(int32_t value, int32_t shift) in test_sqrshr() argument
53 return sqrshr(value, shift); in test_sqrshr()
72 return sqrshrl(value, shift); in test_sqrshrl()
91 return sqrshrl_sat48(value, shift); in test_sqrshrl_sat48()
159 return uqrshl(value, shift); in test_uqrshl()
178 return uqrshll(value, shift); in test_uqrshll()
[all …]
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| /llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/ |
| H A D | shift-05.ll | 13 ret i64 %shift
23 ret i64 %shift
32 ret i64 %shift
42 ret i64 %shift
53 ret i64 %shift
65 ret i64 %shift
77 ret i64 %shift
89 ret i64 %shift
102 ret i64 %shift
113 ret i64 %shift
[all …]
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| H A D | shift-07.ll | 13 ret i64 %shift
23 ret i64 %shift
32 ret i64 %shift
42 ret i64 %shift
53 ret i64 %shift
65 ret i64 %shift
77 ret i64 %shift
89 ret i64 %shift
102 ret i64 %shift
113 ret i64 %shift
[all …]
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| H A D | shift-06.ll | 13 ret i64 %shift
23 ret i64 %shift
32 ret i64 %shift
42 ret i64 %shift
53 ret i64 %shift
65 ret i64 %shift
77 ret i64 %shift
89 ret i64 %shift
102 ret i64 %shift
113 ret i64 %shift
[all …]
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| H A D | shift-11.ll | 6 ; Test logical shift right.
14 %shift = lshr i32 %a, %and
15 ret i32 %shift
27 ret i32 %shift
30 ; Test shift left.
39 ret i32 %shift
51 ret i64 %shift
63 ret i64 %shift
75 ret i64 %shift
88 ret i32 %shift
[all …]
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