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/llvm-project-15.0.7/llvm/utils/
H A Drevert_checker.py81 def _resolve_sha(git_dir: str, sha: str) -> str:
82 if len(sha) == 40:
83 return sha
86 ['git', '-C', git_dir, 'rev-parse', sha],
122 sha = next(stdout_stream, None)
123 assert sha is not None, 'git died?'
124 sha = sha.rstrip()
136 yield _LogEntry(sha, '\n'.join(commit_message).rstrip())
213 'by sha %s)', reverted_sha, sha)
217 all_reverts.append(Revert(sha, reverted_sha))
[all …]
H A Drevert_checker_test.py109 sha='4e0fe038f438ae1679eae9e156e1f248595b2373',
112 sha='9f981e9adf9c8d29bb80306daf08d2770263ade6',
/llvm-project-15.0.7/llvm/test/MC/Lanai/
H A Dv11.s349 ld [%r17 sha %r18], %r21
483 sha %r17, -31, %r21 label
485 sha %r17, -5, %r21 label
487 sha %r17, 2, %r21 label
489 sha %r17, 31, %r21 label
491 sha.f %r17, -31, %r21
493 sha.f %r17, -5, %r21
495 sha.f %r17, 2, %r21
497 sha.f %r17, 31, %r21
499 sha %r17, %r18, %r21 label
[all …]
/llvm-project-15.0.7/llvm/utils/git/
H A Dpre-push.py173 for sha in revs:
174 print(' - ' + git('show', '--oneline', '--quiet', sha))
181 for sha in revs:
182 msg = git('log', '--format=%B', '-n1', sha)
188 …int('Please remove arcanist tags from the commit message (found "%s" tag in %s)' % (tag, sha[:12]))
/llvm-project-15.0.7/clang/docs/tools/
H A Dgenerate_formatted_state.py83 sha = get_git_revision_short_hash() variable
86 sha=sha).encode("utf-8")))
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Lanai/
H A Dv11.txt296 # CHECK: ld [%r17 sha %r18], %r21
422 # CHECK: sha %r17, -0x1f, %r21
424 # CHECK: sha %r17, -0x5, %r21
426 # CHECK: sha %r17, 0x2, %r21
428 # CHECK: sha %r17, 0x1f, %r21
430 # CHECK: sha.f %r17, -0x1f, %r21
432 # CHECK: sha.f %r17, -0x5, %r21
434 # CHECK: sha.f %r17, 0x2, %r21
436 # CHECK: sha.f %r17, 0x1f, %r21
438 # CHECK: sha %r17, %r18, %r21
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dcrc32-target-feature.ll28 …tersect,-avx512vpopcntdq,-avxvnni,-f16c,-fma,-fma4,-gfni,-kl,-mmx,-pclmul,-sha,-sse,-sse2,-sse3,-s…
29 …tersect,-avx512vpopcntdq,-avxvnni,-f16c,-fma,-fma4,-gfni,-kl,-mmx,-pclmul,-sha,-sse,-sse2,-sse3,-s…
H A Dsha.ll2 ; RUN: llc < %s -mattr=+sha -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=CHECK --c…
3 ; RUN: llc < %s -mattr=+sha,+avx2 -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=CHE…
188 ; Make sure we don't forget that sha instructions have no VEX equivalents and thus don't zero YMM/Z…
H A DunfoldMemoryOperand.mir27 …vp2intersect,-avx512vpopcntdq,-avxvnni,-f16c,-fma,-fma4,-gfni,-kl,-pclmul,-sha,-sse,-sse2,-sse3,-s…
H A Dstack-folding-sha.ll2 ; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+sha < %s | FileCheck %s
/llvm-project-15.0.7/polly/test/ScopInfo/
H A Ddo-not-model-error-block-accesses.ll27 …cd,-avx512dq,-avx512er,-avx512f,-avx512pf,-avx512vl,-fma4,-prfchw,-rdseed,-sha,-sse4a,-tbm,-xop,-x…
28 …cd,-avx512dq,-avx512er,-avx512f,-avx512pf,-avx512vl,-fma4,-prfchw,-rdseed,-sha,-sse4a,-tbm,-xop,-x…
/llvm-project-15.0.7/llvm/test/CodeGen/Lanai/
H A Dshift.ll11 ; CHECK: sha %r6, -0xd, %rv
H A Di32.ll104 ; CHECK: sha %r{{[0-9]+}}, %r{{[0-9]+}}, %rv
/llvm-project-15.0.7/.github/workflows/
H A Dlibclang-abi-tests.yml98 ref: ${{ github.sha }}
164 name: compat-report-${{ github.sha }}
H A Dllvm-tests.yml103 ref: ${{ github.sha }}
194 name: compat-report-${{ github.sha }}
/llvm-project-15.0.7/polly/test/CodeGen/
H A Derror_block_contains_invalid_memory_access.ll76 …cd,-avx512dq,-avx512er,-avx512f,-avx512pf,-avx512vl,-fma4,-prfchw,-rdseed,-sha,-sse4a,-tbm,-xop,-x…
77 …cd,-avx512dq,-avx512er,-avx512f,-avx512pf,-avx512vl,-fma4,-prfchw,-rdseed,-sha,-sse4a,-tbm,-xop,-x…
H A Ddead_invariant_load_instruction_referenced_by_parameter_2.ll184 …cd,-avx512dq,-avx512er,-avx512f,-avx512pf,-avx512vl,-fma4,-prfchw,-rdseed,-sha,-sse4a,-tbm,-xop,-x…
185 …cd,-avx512dq,-avx512er,-avx512f,-avx512pf,-avx512vl,-fma4,-prfchw,-rdseed,-sha,-sse4a,-tbm,-xop,-x…
/llvm-project-15.0.7/llvm/test/Transforms/LoopStrengthReduce/X86/
H A Dpr40514.ll57 …et-cpu"="broadwell" "target-features"="+sse2,+cx16,+sahf,-tbm,-avx512ifma,-sha,-gfni,-fma4,-vpclmu…
/llvm-project-15.0.7/polly/test/ScheduleOptimizer/
H A Dpattern-matching-based-opts-after-delicm.ll66 …wb,-clzero,-fma4,-lwp,-mwaitx,-pku,-prefetchwt1,-prfchw,-rdseed,-rtm,-sgx,-sha,-sse4a,-tbm,-xop,-x…
/llvm-project-15.0.7/llvm/lib/Target/Lanai/
H A DLanaiInstrInfo.td430 def SA_I : ShiftRI<"sha", []>;
439 def SA_F_I : ShiftRI<"sha.f", []>;
455 def SRA_R : ShiftRR<"sha$DDDI\t$Rs1, $Rs2, $Rd", []>;
466 def SRA_F_R : ShiftRR<"sha.f$DDDI\t$Rs1, $Rs2, $Rd", []>;
/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/X86/
H A Dpr23997.ll104 …rget-cpu"="skylake" "target-features"="+sse2,+cx16,+sahf,-tbm,-avx512ifma,-sha,-gfni,-fma4,-vpclmu…
H A Dpr54634.ll140 …,+ssse3,+pclmul,+sse3,-rdrnd,-rtm,-rdseed,-avx512ifma,-avx512pf,-avx512er,-sha,-prefetchwt1,-avx51…
/llvm-project-15.0.7/llvm/include/llvm/Support/
H A DX86TargetParser.def188 X86_FEATURE (SHA, "sha")
/llvm-project-15.0.7/clang/include/clang/Basic/
H A DBuiltinsX86.def713 TARGET_BUILTIN(__builtin_ia32_sha1rnds4, "V4iV4iV4iIc", "ncV:128:", "sha")
714 TARGET_BUILTIN(__builtin_ia32_sha1nexte, "V4iV4iV4i", "ncV:128:", "sha")
715 TARGET_BUILTIN(__builtin_ia32_sha1msg1, "V4iV4iV4i", "ncV:128:", "sha")
716 TARGET_BUILTIN(__builtin_ia32_sha1msg2, "V4iV4iV4i", "ncV:128:", "sha")
717 TARGET_BUILTIN(__builtin_ia32_sha256rnds2, "V4iV4iV4iV4i", "ncV:128:", "sha")
718 TARGET_BUILTIN(__builtin_ia32_sha256msg1, "V4iV4iV4i", "ncV:128:", "sha")
719 TARGET_BUILTIN(__builtin_ia32_sha256msg2, "V4iV4iV4i", "ncV:128:", "sha")
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86.td228 def FeatureSHA : SubtargetFeature<"sha", "HasSHA", "true",

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