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/llvm-project-15.0.7/llvm/test/CodeGen/ARM/ParallelDSP/
H A Dsext-acc.ll13 %sext.a.0 = sext i16 %ld.a.0 to i32
15 %sext.b.0 = sext i16 %ld.b.0 to i32
16 %mul.0 = mul i32 %sext.a.0, %sext.b.0
20 %sext.a.1 = sext i16 %ld.a.1 to i32
22 %sext.b.1 = sext i16 %ld.b.1 to i32
23 %mul.1 = mul i32 %sext.a.1, %sext.b.1
24 %sext.mul.0 = sext i32 %mul.0 to i64
25 %sext.mul.1 = sext i32 %mul.1 to i64
27 %sext.acc = sext i32 %acc to i64
47 %sext.a.0 = sext i16 %ld.a.0 to i32
[all …]
H A Dblocks.ll12 %sext.a.0 = sext i16 %ld.a.0 to i32
14 %sext.b.0 = sext i16 %ld.b.0 to i32
15 %mul.0 = mul i32 %sext.a.0, %sext.b.0
19 %sext.a.1 = sext i16 %ld.a.1 to i32
21 %sext.b.1 = sext i16 %ld.b.1 to i32
22 %mul.1 = mul i32 %sext.a.1, %sext.b.1
37 %sext.a.0 = sext i16 %ld.a.0 to i32
39 %sext.b.0 = sext i16 %ld.b.0 to i32
44 %sext.a.1 = sext i16 %ld.a.1 to i32
46 %sext.b.1 = sext i16 %ld.b.1 to i32
[all …]
H A Dexchange.ll14 %sext.a.0 = sext i16 %ld.a.0 to i32
18 %sext.a.1 = sext i16 %ld.a.1 to i32
19 %sext.b.1 = sext i16 %ld.b.1 to i32
20 %sext.b.0 = sext i16 %ld.b.0 to i32
21 %mul.0 = mul i32 %sext.a.0, %sext.b.1
22 %mul.1 = mul i32 %sext.a.1, %sext.b.0
39 %sext.a.0 = sext i16 %ld.a.0 to i32
43 %sext.a.1 = sext i16 %ld.a.1 to i32
44 %sext.b.1 = sext i16 %ld.b.1 to i32
45 %sext.b.0 = sext i16 %ld.b.0 to i32
[all …]
H A Doverlapping.ll22 %sext.a.0 = sext i16 %ld.a.0 to i32
26 %sext.a.1 = sext i16 %ld.a.1 to i32
27 %sext.b.1 = sext i16 %ld.b.1 to i32
28 %sext.b.0 = sext i16 %ld.b.0 to i32
29 %mul.0 = mul i32 %sext.a.0, %sext.b.0
30 %mul.1 = mul i32 %sext.a.1, %sext.b.1
35 %sext.a.2 = sext i16 %ld.a.2 to i32
36 %sext.b.2 = sext i16 %ld.b.2 to i32
37 %mul.2 = mul i32 %sext.a.2, %sext.b.2
66 %sext.a.0 = sext i16 %ld.a.0 to i32
[all …]
H A Dsquaring.ll91 %sext.a.0 = sext i16 %ld.a.0 to i32
95 %sext.a.1 = sext i16 %ld.a.1 to i32
96 %sext.b.1 = sext i16 %ld.b.1 to i32
97 %sext.b.0 = sext i16 %ld.b.0 to i32
104 %sext.a.2 = sext i16 %ld.a.2 to i32
105 %sext.b.2 = sext i16 %ld.b.2 to i32
145 %sext.a.0 = sext i16 %ld.a.0 to i32
149 %sext.a.1 = sext i16 %ld.a.1 to i32
150 %sext.b.1 = sext i16 %ld.b.1 to i32
151 %sext.b.0 = sext i16 %ld.b.0 to i32
[all …]
H A Dpr43073.ll30 %conv = sext i16 %0 to i32
32 %conv2 = sext i16 %1 to i32
36 %conv4 = sext i16 %2 to i32
39 %conv6 = sext i16 %3 to i32
176 %sext.0 = sext i32 %call to i64
184 %sext.1 = sext i32 %mul to i64
185 %add = add i64 %sext.0, %sext.1
193 %sext.2 = sext i32 %mul11 to i64
202 %sext.3 = sext i32 %mul17 to i64
211 %sext.4 = sext i32 %mul23 to i64
[all …]
H A Dsmlaldx-1.ll51 %conv.epil = sext i16 %2 to i32
56 %sext.mul.epil = sext i32 %mul.epil to i64
103 %sext.mul = sext i32 %mul to i64
104 %sext.mul.1 = sext i32 %mul.1 to i64
105 %sext.mul.2 = sext i32 %mul.2 to i64
106 %sext.mul.3 = sext i32 %mul.3 to i64
161 %sext.mul.epil = sext i32 %mul.epil to i64
234 %sext.mul = sext i32 %mul to i64
237 %sext.mul.1 = sext i32 %mul.1 to i64
240 %sext.mul.2 = sext i32 %mul.2 to i64
[all …]
H A Dsmlaldx-2.ll51 %conv.epil = sext i16 %2 to i32
56 %sext.mul.epil = sext i32 %mul.epil to i64
103 %sext.mul = sext i32 %mul to i64
104 %sext.mul.1 = sext i32 %mul.1 to i64
105 %sext.mul.2 = sext i32 %mul.2 to i64
106 %sext.mul.3 = sext i32 %mul.3 to i64
161 %sext.mul.epil = sext i32 %mul.epil to i64
234 %sext.mul = sext i32 %mul to i64
237 %sext.mul.1 = sext i32 %mul.1 to i64
240 %sext.mul.2 = sext i32 %mul.2 to i64
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Dvec_cmp.ll14 %sext = sext <2 x i1> %cmp to <2 x i8>
23 %sext = sext <4 x i1> %cmp to <4 x i8>
32 %sext = sext <8 x i1> %cmp to <8 x i8>
43 %sext = sext <16 x i1> %cmp to <16 x i8>
52 %sext = sext <16 x i1> %cmp to <16 x i8>
62 %sext = sext <16 x i1> %cmp to <16 x i8>
72 %sext = sext <16 x i1> %cmp to <16 x i8>
82 %sext = sext <16 x i1> %cmp to <16 x i8>
91 %sext = sext <16 x i1> %cmp to <16 x i8>
100 %sext = sext <16 x i1> %cmp to <16 x i8>
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/InstSimplify/
H A Dcmp_ext.ll11 %sext = sext i32 %x to i64
21 %sext = sext i32 %x to i64
34 %sext = sext i32 %x to i64
44 %sext = sext i32 %x to i64
54 %sext = sext i32 %x to i64
67 %sext = sext i32 %x to i64
77 %sext = sext i32 %x to i64
90 %sext = sext i32 %x to i64
100 %sext = sext i32 %x to i64
113 %sext = sext i32 %x to i64
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dbinop-cast.ll21 %sext = sext i1 %y to i32
31 %sext = sext <2 x i1> %y to <2 x i32>
43 %sext = sext <2 x i1> %y to <2 x i32>
55 %sext = sext i1 %y to i32
68 %sext = sext i1 %y to i32
79 %sext = sext i1 %y to i32
113 %sext = sext i1 %y to i32
126 %sext = sext i1 %y to i32
138 %sext = sext i1 %y to i32
174 %sext = sext i1 %y to i32
[all …]
H A Dnarrow-math.ll193 %sext = sext i32 %ashr to i64
209 %sext = sext i32 %ashr to i64
223 %sext = sext <2 x i32> %ashr to <2 x i64>
236 %sext = sext <2 x i32> %ashr to <2 x i64>
249 %sext = sext i32 %ashr to i64
262 %sext = sext <2 x i32> %ashr to <2 x i64>
275 %sext = sext <2 x i32> %ashr to <2 x i64>
288 %sext = sext <2 x i32> %ashr to <2 x i64>
340 %sext = sext i32 %ashr to i64
392 %sext = sext i32 %ashr to i64
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/ScalarEvolution/
H A Dumin-umax-folds.ll9 ; CHECK-NEXT: %len.sext = sext i32 %len to i64
26 %len.sext = sext i32 %len to i64
44 ; CHECK-NEXT: %len.sext = sext i32 %len to i64
61 %len.sext = sext i32 %len to i64
96 %len.sext = sext i32 %len to i64
131 %len.sext = sext i32 %len to i64
166 %len.sext = sext i32 %len to i64
201 %len.sext = sext i32 %len to i64
236 %len.sext = sext i32 %len to i64
271 %len.sext = sext i32 %len to i64
[all …]
H A Dinfer-prestart-no-wrap.ll3 define void @infer.sext.0(i1* %c, i32 %start, i32* %buf) {
12 %idx.inc.sext = sext i32 %idx.inc to i64
13 ; CHECK: %idx.inc.sext = sext i32 %idx.inc to i64
36 %idx.inc.sext = zext i32 %idx.inc to i64
37 ; CHECK: %idx.inc.sext = zext i32 %idx.inc to i64
51 define void @infer.sext.1(i32 %start, i1* %c) {
60 %idx.sext = sext i32 %idx to i64
61 ; CHECK: %idx.sext = sext i32 %idx to i64
71 define void @infer.sext.2(i1* %c, i8 %start) {
80 %idx.sext = sext i8 %idx to i16
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/BasicAA/
H A Dq.bad.ll8 %sext.1 = sext i8 255 to i16
9 %sext.zext.1 = zext i16 %sext.1 to i64
10 %sext.2 = sext i8 255 to i32
11 %sext.zext.2 = zext i32 %sext.2 to i64
24 %sext.1 = sext i8 %num to i16
25 %sext.zext.1 = zext i16 %sext.1 to i64
26 %sext.2 = sext i8 %num to i32
27 %sext.zext.2 = zext i32 %sext.2 to i64
86 %sext.255 = sext i8 255 to i16 ; 0xFFFF
103 %sext.num = sext i8 %num to i16
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dllvm.amdgcn.class.ll19 %sext = sext i1 %result to i32
35 %sext = sext i1 %result to i32
51 %sext = sext i1 %result to i32
68 %sext = sext i1 %result to i32
81 %sext = sext i1 %result to i32
94 %sext = sext i1 %result to i32
109 %sext = sext i1 %result to i32
351 %sext = sext i1 %or to i32
429 %sext = sext i1 %or to i32
449 %sext = sext i1 %or to i32
[all …]
H A Dfcmp.f16.ll22 %r.val.sext = sext i1 %r.val to i32
50 %r.val.sext = sext i1 %r.val to i32
73 %r.val.sext = sext i1 %r.val to i32
96 %r.val.sext = sext i1 %r.val to i32
119 %r.val.sext = sext i1 %r.val to i32
142 %r.val.sext = sext i1 %r.val to i32
165 %r.val.sext = sext i1 %r.val to i32
188 %r.val.sext = sext i1 %r.val to i32
211 %r.val.sext = sext i1 %r.val to i32
234 %r.val.sext = sext i1 %r.val to i32
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dneon-abd.ll15 %a.sext = sext <8 x i8> %a to <8 x i16>
16 %b.sext = sext <8 x i8> %b to <8 x i16>
17 %sub = sub <8 x i16> %a.sext, %b.sext
28 %a.sext = sext <16 x i8> %a to <16 x i16>
29 %b.sext = sext <16 x i8> %b to <16 x i16>
30 %sub = sub <16 x i16> %a.sext, %b.sext
41 %a.sext = sext <4 x i16> %a to <4 x i32>
42 %b.sext = sext <4 x i16> %b to <4 x i32>
43 %sub = sub <4 x i32> %a.sext, %b.sext
60 %sub = sub <4 x i16> %a.sext, %b.sext
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/X86/
H A Dsext.ll39 %x0 = sext i8 %i0 to i64
40 %x1 = sext i8 %i1 to i64
66 %x0 = sext i8 %i0 to i32
67 %x1 = sext i8 %i1 to i32
68 %x2 = sext i8 %i2 to i32
69 %x3 = sext i8 %i3 to i32
97 %x0 = sext i8 %i0 to i64
98 %x1 = sext i8 %i1 to i64
99 %x2 = sext i8 %i2 to i64
100 %x3 = sext i8 %i3 to i64
[all …]
H A Dsext-inseltpoison.ll39 %x0 = sext i8 %i0 to i64
40 %x1 = sext i8 %i1 to i64
66 %x0 = sext i8 %i0 to i32
67 %x1 = sext i8 %i1 to i32
68 %x2 = sext i8 %i2 to i32
69 %x3 = sext i8 %i3 to i32
97 %x0 = sext i8 %i0 to i64
98 %x1 = sext i8 %i1 to i64
99 %x2 = sext i8 %i2 to i64
100 %x3 = sext i8 %i3 to i64
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/
H A Dsext-zext.ll4 ;; fold (sext (not x)) -> (add (zext x) -1)
12 %sext = sext i1 %xor to i32
13 ret i32 %sext
16 ;; fold (sext (not (setcc a, b, cc))) -> (sext (setcc a, b, !cc))
27 %sext = sext i1 %xor to i32
28 ret i32 %sext
31 ;; fold (sext (not (setcc a, b, cc))) -> (sext (setcc a, b, !cc))
44 %sext = sext i1 %xor to i32
45 ret i32 %sext
50 ;; TODO: fold (add (zext (setcc a, b, cc)), -1) -> (sext (setcc a, b, !cc))
/llvm-project-15.0.7/llvm/test/Analysis/Delinearization/
H A Dhimeno_2.ll29 …sext i32 %a.deps to i64) * (1 + (sext i32 %a.cols to i64))) + %a.base),+,(4 * (sext i32 %a.deps to…
31 ; CHECK: ArrayDecl[UnknownSize][(sext i32 %a.cols to i64)][(sext i32 %a.deps to i64)] with elements…
41 %p.rows.sext = sext i32 %p.rows.sub to i64
45 %p.cols.sext = sext i32 %p.cols.sub to i64
49 %p.deps.sext = sext i32 %p.deps.sub to i64
52 %a.cols.sext = sext i32 %a.cols to i64
55 %a.deps.sext = sext i32 %a.deps to i64
70 %tmp1 = mul nsw i64 %a.cols.sext, %i
72 %tmp3 = mul i64 %tmp2, %a.deps.sext
77 %k.exitcond = icmp eq i64 %k.inc, %p.deps.sext
[all …]
H A Dhimeno_1.ll29 …sext i32 %a.deps to i64) * (1 + (sext i32 %a.cols to i64))) + %a.base),+,(4 * (sext i32 %a.deps to…
31 ; CHECK: ArrayDecl[UnknownSize][(sext i32 %a.cols to i64)][(sext i32 %a.deps to i64)] with elements…
41 %p.rows.sext = sext i32 %p.rows.sub to i64
45 %p.cols.sext = sext i32 %p.cols.sub to i64
49 %p.deps.sext = sext i32 %p.deps.sub to i64
64 %a.cols.sext = sext i32 %a.cols to i64
65 %a.deps.sext = sext i32 %a.deps to i64
70 %tmp1 = mul nsw i64 %a.cols.sext, %i
72 %tmp3 = mul i64 %tmp2, %a.deps.sext
77 %k.exitcond = icmp eq i64 %k.inc, %p.deps.sext
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/SCCP/
H A Dip-ranges-sext.ll19 %ext.1 = sext i32 %x to i64
23 %ext.2 = sext i32 %x to i64
42 %ext.1 = sext i32 %x to i64
46 %ext.2 = sext i32 %x to i64
66 %ext.1 = sext i32 %x to i64
70 %ext.2 = sext i32 %x to i64
101 %ext = sext i32 %p to i64
112 %ext = sext i32 %p to i64
116 ; sext is constant folded before sext -> zext conversion.
121 %ext = sext i32 10 to i64
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/ARM/
H A Dmve-known-trip-count.ll52 %conv = sext i16 %0 to i32
55 %conv2 = sext i16 %1 to i32
61 %conv6 = sext i16 %2 to i32
64 %conv9 = sext i16 %3 to i32
70 %conv15 = sext i16 %4 to i32
73 %conv18 = sext i16 %5 to i32
79 %conv24 = sext i16 %6 to i32
82 %conv27 = sext i16 %7 to i32
88 %conv33 = sext i16 %8 to i32
91 %conv36 = sext i16 %9 to i32
[all …]

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