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/llvm-project-15.0.7/llvm/test/Analysis/CostModel/AArch64/
H A Dfptoi_sat.ll388 declare i1 @llvm.fptosi.sat.i1.f32(float)
389 declare i1 @llvm.fptoui.sat.i1.f32(float)
390 declare i8 @llvm.fptosi.sat.i8.f32(float)
391 declare i8 @llvm.fptoui.sat.i8.f32(float)
399 declare i1 @llvm.fptosi.sat.i1.f64(double)
400 declare i1 @llvm.fptoui.sat.i1.f64(double)
401 declare i8 @llvm.fptosi.sat.i8.f64(double)
498 declare i1 @llvm.fptosi.sat.i1.f16(half)
499 declare i1 @llvm.fptoui.sat.i1.f16(half)
500 declare i8 @llvm.fptosi.sat.i8.f16(half)
[all …]
H A Darith-usat.ll5 declare i64 @llvm.uadd.sat.i64(i64, i64)
6 declare <2 x i64> @llvm.uadd.sat.v2i64(<2 x i64>, <2 x i64>)
7 declare <4 x i64> @llvm.uadd.sat.v4i64(<4 x i64>, <4 x i64>)
10 declare i32 @llvm.uadd.sat.i32(i32, i32)
16 declare i16 @llvm.uadd.sat.i16(i16, i16)
23 declare i8 @llvm.uadd.sat.i8(i8, i8)
100 %I8 = call i8 @llvm.uadd.sat.i8(i8 undef, i8 undef)
111 declare i64 @llvm.usub.sat.i64(i64, i64)
116 declare i32 @llvm.usub.sat.i32(i32, i32)
122 declare i16 @llvm.usub.sat.i16(i16, i16)
[all …]
H A Darith-ssat.ll5 declare i64 @llvm.sadd.sat.i64(i64, i64)
6 declare <2 x i64> @llvm.sadd.sat.v2i64(<2 x i64>, <2 x i64>)
7 declare <4 x i64> @llvm.sadd.sat.v4i64(<4 x i64>, <4 x i64>)
10 declare i32 @llvm.sadd.sat.i32(i32, i32)
17 declare i16 @llvm.sadd.sat.i16(i16, i16)
24 declare i8 @llvm.sadd.sat.i8(i8, i8)
104 %I8 = call i8 @llvm.sadd.sat.i8(i8 undef, i8 undef)
115 declare i64 @llvm.ssub.sat.i64(i64, i64)
120 declare i32 @llvm.ssub.sat.i32(i32, i32)
126 declare i16 @llvm.ssub.sat.i16(i16, i16)
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/ARM/
H A Dfptoi_sat.ll491 declare i1 @llvm.fptosi.sat.i1.f32(float)
492 declare i1 @llvm.fptoui.sat.i1.f32(float)
493 declare i8 @llvm.fptosi.sat.i8.f32(float)
494 declare i8 @llvm.fptoui.sat.i8.f32(float)
502 declare i1 @llvm.fptosi.sat.i1.f64(double)
503 declare i1 @llvm.fptoui.sat.i1.f64(double)
504 declare i8 @llvm.fptosi.sat.i8.f64(double)
601 declare i1 @llvm.fptosi.sat.i1.f16(half)
602 declare i1 @llvm.fptoui.sat.i1.f16(half)
603 declare i8 @llvm.fptosi.sat.i8.f16(half)
[all …]
H A Darith-ssat.ll11 declare i64 @llvm.sadd.sat.i64(i64, i64)
16 declare i32 @llvm.sadd.sat.i32(i32, i32)
22 declare i16 @llvm.sadd.sat.i16(i16, i16)
29 declare i8 @llvm.sadd.sat.i8(i8, i8)
30 declare <2 x i8> @llvm.sadd.sat.v2i8(<2 x i8>, <2 x i8>)
31 declare <4 x i8> @llvm.sadd.sat.v4i8(<4 x i8>, <4 x i8>)
32 declare <8 x i8> @llvm.sadd.sat.v8i8(<8 x i8>, <8 x i8>)
217 declare i64 @llvm.ssub.sat.i64(i64, i64)
222 declare i32 @llvm.ssub.sat.i32(i32, i32)
228 declare i16 @llvm.ssub.sat.i16(i16, i16)
[all …]
H A Darith-usat.ll11 declare i64 @llvm.uadd.sat.i64(i64, i64)
16 declare i32 @llvm.uadd.sat.i32(i32, i32)
22 declare i16 @llvm.uadd.sat.i16(i16, i16)
29 declare i8 @llvm.uadd.sat.i8(i8, i8)
30 declare <2 x i8> @llvm.uadd.sat.v2i8(<2 x i8>, <2 x i8>)
31 declare <4 x i8> @llvm.uadd.sat.v4i8(<4 x i8>, <4 x i8>)
32 declare <8 x i8> @llvm.uadd.sat.v8i8(<8 x i8>, <8 x i8>)
217 declare i64 @llvm.usub.sat.i64(i64, i64)
222 declare i32 @llvm.usub.sat.i32(i32, i32)
228 declare i16 @llvm.usub.sat.i16(i16, i16)
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/X86/
H A Dfptoi_sat.ll1226 declare i1 @llvm.fptosi.sat.i1.f32(float)
1227 declare i1 @llvm.fptoui.sat.i1.f32(float)
1228 declare i8 @llvm.fptosi.sat.i8.f32(float)
1229 declare i8 @llvm.fptoui.sat.i8.f32(float)
1237 declare i1 @llvm.fptosi.sat.i1.f64(double)
1238 declare i1 @llvm.fptoui.sat.i1.f64(double)
1239 declare i8 @llvm.fptosi.sat.i8.f64(double)
1336 declare i1 @llvm.fptosi.sat.i1.f16(half)
1337 declare i1 @llvm.fptoui.sat.i1.f16(half)
1338 declare i8 @llvm.fptosi.sat.i8.f16(half)
[all …]
H A Darith-ssat.ll17 declare i64 @llvm.sadd.sat.i64(i64, i64)
18 declare <2 x i64> @llvm.sadd.sat.v2i64(<2 x i64>, <2 x i64>)
22 declare i32 @llvm.sadd.sat.i32(i32, i32)
27 declare i16 @llvm.sadd.sat.i16(i16, i16)
32 declare i8 @llvm.sadd.sat.i8(i8, i8)
243 %I8 = call i8 @llvm.sadd.sat.i8(i8 undef, i8 undef)
251 declare i64 @llvm.ssub.sat.i64(i64, i64)
256 declare i32 @llvm.ssub.sat.i32(i32, i32)
261 declare i16 @llvm.ssub.sat.i16(i16, i16)
266 declare i8 @llvm.ssub.sat.i8(i8, i8)
[all …]
H A Darith-usat.ll18 declare i64 @llvm.uadd.sat.i64(i64, i64)
19 declare <2 x i64> @llvm.uadd.sat.v2i64(<2 x i64>, <2 x i64>)
23 declare i32 @llvm.uadd.sat.i32(i32, i32)
28 declare i16 @llvm.uadd.sat.i16(i16, i16)
33 declare i8 @llvm.uadd.sat.i8(i8, i8)
244 %I8 = call i8 @llvm.uadd.sat.i8(i8 undef, i8 undef)
252 declare i64 @llvm.usub.sat.i64(i64, i64)
257 declare i32 @llvm.usub.sat.i32(i32, i32)
262 declare i16 @llvm.usub.sat.i16(i16, i16)
267 declare i8 @llvm.usub.sat.i8(i8, i8)
[all …]
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Hexagon/
H A Dxtype_complex.txt22 # CHECK: r17:16 = cmpy(r21,r31):sat
24 # CHECK: r17:16 = cmpy(r21,r31):<<1:sat
26 # CHECK: r17:16 = cmpy(r21,r31*):sat
28 # CHECK: r17:16 = cmpy(r21,r31*):<<1:sat
30 # CHECK: r17:16 += cmpy(r21,r31):sat
34 # CHECK: r17:16 -= cmpy(r21,r31):sat
38 # CHECK: r17:16 += cmpy(r21,r31*):sat
42 # CHECK: r17:16 -= cmpy(r21,r31*):sat
58 # CHECK: r17 = cmpy(r21,r31):rnd:sat
62 # CHECK: r17 = cmpy(r21,r31*):rnd:sat
[all …]
H A Dxtype_mpy.txt138 # CHECK: r17 = mpy(r21.l,r31.l):<<1:sat
140 # CHECK: r17 = mpy(r21.l,r31.h):<<1:sat
142 # CHECK: r17 = mpy(r21.h,r31.l):<<1:sat
278 # CHECK: r17 = mpy(r21,r31.h):<<1:sat
280 # CHECK: r17 = mpy(r21,r31.l):<<1:sat
284 # CHECK: r17 = mpy(r21,r31):<<1:sat
290 # CHECK: r17 += mpy(r21,r31):<<1:sat
292 # CHECK: r17 -= mpy(r21,r31):<<1:sat
354 # CHECK: r17:16 = vmpyh(r21,r31):sat
360 # CHECK: r17:16 += vmpyh(r21,r31):sat
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/AMDGPU/
H A Darith-ssat.ll12 declare i64 @llvm.sadd.sat.i64(i64, i64)
18 declare i32 @llvm.sadd.sat.i32(i32, i32)
25 declare i16 @llvm.sadd.sat.i16(i16, i16)
33 declare i8 @llvm.sadd.sat.i8(i8, i8)
34 declare <2 x i8> @llvm.sadd.sat.v2i8(<2 x i8>, <2 x i8>)
35 declare <4 x i8> @llvm.sadd.sat.v4i8(<4 x i8>, <4 x i8>)
180 %I8 = call i8 @llvm.sadd.sat.i8(i8 undef, i8 undef)
192 declare i64 @llvm.ssub.sat.i64(i64, i64)
198 declare i32 @llvm.ssub.sat.i32(i32, i32)
205 declare i16 @llvm.ssub.sat.i16(i16, i16)
[all …]
H A Darith-usat.ll12 declare i64 @llvm.uadd.sat.i64(i64, i64)
18 declare i32 @llvm.uadd.sat.i32(i32, i32)
25 declare i16 @llvm.uadd.sat.i16(i16, i16)
33 declare i8 @llvm.uadd.sat.i8(i8, i8)
34 declare <2 x i8> @llvm.uadd.sat.v2i8(<2 x i8>, <2 x i8>)
35 declare <4 x i8> @llvm.uadd.sat.v4i8(<4 x i8>, <4 x i8>)
180 %I8 = call i8 @llvm.uadd.sat.i8(i8 undef, i8 undef)
192 declare i64 @llvm.usub.sat.i64(i64, i64)
198 declare i32 @llvm.usub.sat.i32(i32, i32)
205 declare i16 @llvm.usub.sat.i16(i16, i16)
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/InstSimplify/
H A Dfptoi-sat.ll4 declare i32 @llvm.fptosi.sat.i32.f64(double)
5 declare i32 @llvm.fptoui.sat.i32.f64(double)
6 declare i32 @llvm.fptosi.sat.i32.f32(float)
7 declare i32 @llvm.fptoui.sat.i32.f32(float)
24 %r = call i32 @llvm.fptosi.sat.i32.f64(double poison)
32 %r = call i32 @llvm.fptosi.sat.i32.f64(double undef)
40 %r = call i32 @llvm.fptosi.sat.i32.f64(double 0.0)
48 %r = call i32 @llvm.fptosi.sat.i32.f64(double -0.0)
56 %r = call i32 @llvm.fptosi.sat.i32.f64(double 42.0)
64 %r = call i32 @llvm.fptosi.sat.i32.f64(double 42.9)
[all …]
H A Dsaturating-add-sub.ll6 declare i3 @llvm.uadd.sat.i3(i3, i3)
7 declare i8 @llvm.uadd.sat.i8(i8, i8)
11 declare i8 @llvm.sadd.sat.i8(i8, i8)
14 declare i8 @llvm.usub.sat.i8(i8, i8)
15 declare i8 @llvm.ssub.sat.i8(i8, i8)
23 %x1 = call i8 @llvm.uadd.sat.i8(i8 %a, i8 0)
39 %x2 = call i3 @llvm.uadd.sat.i3(i3 0, i3 %a)
55 %x3 = call i8 @llvm.uadd.sat.i8(i8 %a, i8 255)
71 %x4 = call i3 @llvm.uadd.sat.i3(i3 7, i3 %a)
151 %y1 = call i8 @llvm.sadd.sat.i8(i8 %a, i8 0)
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/InstSimplify/ConstProp/
H A Dsaturating-add-sub.ll4 declare i8 @llvm.uadd.sat.i8(i8, i8)
5 declare i8 @llvm.sadd.sat.i8(i8, i8)
9 declare i8 @llvm.usub.sat.i8(i8, i8)
10 declare i8 @llvm.ssub.sat.i8(i8, i8)
18 %x = call i8 @llvm.uadd.sat.i8(i8 10, i8 20)
26 %x = call i8 @llvm.uadd.sat.i8(i8 250, i8 100)
34 %x = call i8 @llvm.sadd.sat.i8(i8 10, i8 -20)
42 %x = call i8 @llvm.sadd.sat.i8(i8 120, i8 10)
50 %x = call i8 @llvm.sadd.sat.i8(i8 -120, i8 -10)
98 %x = call i8 @llvm.usub.sat.i8(i8 20, i8 10)
[all …]
/llvm-project-15.0.7/llvm/test/MC/Hexagon/extensions/
H A Dv67t_audio.s72 r0=cmpyiw(r1:0,r1:0):<<1:sat
73 # CHECK-NEXT: e920c000 { r0 = cmpyiw(r1:0,r1:0):<<1:sat }
77 r0=cmpyiw(r1:0,r1:0):<<1:rnd:sat
82 r0=cmpyiw(r1:0,r1:0*):<<1:sat
83 # CHECK-NEXT: e900c080 { r0 = cmpyiw(r1:0,r1:0*):<<1:sat }
87 r0=cmpyiw(r1:0,r1:0*):<<1:rnd:sat
92 r0=cmpyrw(r1:0,r1:0):<<1:sat
93 # CHECK-NEXT: e940c000 { r0 = cmpyrw(r1:0,r1:0):<<1:sat }
97 r0=cmpyrw(r1:0,r1:0):<<1:rnd:sat
102 r0=cmpyrw(r1:0,r1:0*):<<1:sat
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dsaturating-add-sub.ll1050 %sat = call i8 @llvm.usub.sat.i8(i8 %a, i8 %b)
1062 %sat = call i8 @llvm.usub.sat.i8(i8 %a, i8 %b)
1073 %sat = call i8 @llvm.usub.sat.i8(i8 %a, i8 %b)
1084 %sat = call i8 @llvm.usub.sat.i8(i8 %b, i8 %a)
1094 %sat = call i8 @llvm.usub.sat.i8(i8 %a, i8 42)
1104 %sat = call i8 @llvm.usub.sat.i8(i8 %a, i8 %b)
1116 %sat = call i8 @llvm.usub.sat.i8(i8 %a, i8 %b)
1138 %sat = call i8 @llvm.usub.sat.i8(i8 %a, i8 %b)
1149 %sat = call i8 @llvm.usub.sat.i8(i8 %a, i8 %b)
1160 %sat = call i8 @llvm.uadd.sat.i8(i8 %a, i8 %b)
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/Scalarizer/
H A Dintrinsics.ll142 ; CHECK: %sat.i0 = call i32 @llvm.fptosi.sat.i32.f32(float %x.i0)
143 ; CHECK: %sat.i1 = call i32 @llvm.fptosi.sat.i32.f32(float %x.i1)
144 ; CHECK: %sat.upto0 = insertelement <2 x i32> poison, i32 %sat.i0, i32 0
145 ; CHECK: %sat = insertelement <2 x i32> %sat.upto0, i32 %sat.i1, i32 1
148 %sat = call <2 x i32> @llvm.fptosi.sat.v2i32.v2f32(<2 x float> %x)
149 ret <2 x i32> %sat
153 ; CHECK: %sat.i0 = call i32 @llvm.fptoui.sat.i32.f32(float %x.i0)
154 ; CHECK: %sat.i1 = call i32 @llvm.fptoui.sat.i32.f32(float %x.i1)
156 ; CHECK: %sat = insertelement <2 x i32> %sat.upto0, i32 %sat.i1, i32 1
159 %sat = call <2 x i32> @llvm.fptoui.sat.v2i32.v2f32(<2 x float> %x)
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/ScalarEvolution/
H A Dsaturating-intrinsics.ll4 declare i32 @llvm.uadd.sat.i32(i32, i32)
5 declare i32 @llvm.sadd.sat.i32(i32, i32)
6 declare i32 @llvm.usub.sat.i32(i32, i32)
7 declare i32 @llvm.ssub.sat.i32(i32, i32)
8 declare i32 @llvm.ushl.sat.i32(i32, i32)
9 declare i32 @llvm.sshl.sat.i32(i32, i32)
18 %z = call i32 @llvm.uadd.sat.i32(i32 %x, i32 %y)
29 %z = call i32 @llvm.sadd.sat.i32(i32 %x, i32 %y)
40 %z = call i32 @llvm.usub.sat.i32(i32 %x, i32 %y)
51 %z = call i32 @llvm.ssub.sat.i32(i32 %x, i32 %y)
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Dsaturating-intrinsics.ll124 declare <16 x i8> @llvm.sadd.sat.v16i8(<16 x i8>, <16 x i8>)
125 declare <16 x i8> @llvm.ssub.sat.v16i8(<16 x i8>, <16 x i8>)
126 declare <16 x i8> @llvm.uadd.sat.v16i8(<16 x i8>, <16 x i8>)
127 declare <16 x i8> @llvm.usub.sat.v16i8(<16 x i8>, <16 x i8>)
128 declare <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16>, <8 x i16>)
129 declare <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16>, <8 x i16>)
130 declare <8 x i16> @llvm.uadd.sat.v8i16(<8 x i16>, <8 x i16>)
131 declare <8 x i16> @llvm.usub.sat.v8i16(<8 x i16>, <8 x i16>)
132 declare <4 x i32> @llvm.sadd.sat.v4i32(<4 x i32>, <4 x i32>)
133 declare <4 x i32> @llvm.ssub.sat.v4i32(<4 x i32>, <4 x i32>)
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dvqsub.ll8 %tmp3 = call <8 x i8> @llvm.ssub.sat.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
17 %tmp3 = call <4 x i16> @llvm.ssub.sat.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
26 %tmp3 = call <2 x i32> @llvm.ssub.sat.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
35 %tmp3 = call <1 x i64> @llvm.ssub.sat.v1i64(<1 x i64> %tmp1, <1 x i64> %tmp2)
44 %tmp3 = call <8 x i8> @llvm.usub.sat.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
53 %tmp3 = call <4 x i16> @llvm.usub.sat.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
62 %tmp3 = call <2 x i32> @llvm.usub.sat.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
71 %tmp3 = call <1 x i64> @llvm.usub.sat.v1i64(<1 x i64> %tmp1, <1 x i64> %tmp2)
80 %tmp3 = call <16 x i8> @llvm.ssub.sat.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
147 declare <8 x i8> @llvm.ssub.sat.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
[all …]
H A Dvqadd.ll8 %tmp3 = call <8 x i8> @llvm.sadd.sat.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
17 %tmp3 = call <4 x i16> @llvm.sadd.sat.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
26 %tmp3 = call <2 x i32> @llvm.sadd.sat.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
35 %tmp3 = call <1 x i64> @llvm.sadd.sat.v1i64(<1 x i64> %tmp1, <1 x i64> %tmp2)
44 %tmp3 = call <8 x i8> @llvm.uadd.sat.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
53 %tmp3 = call <4 x i16> @llvm.uadd.sat.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
62 %tmp3 = call <2 x i32> @llvm.uadd.sat.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
71 %tmp3 = call <1 x i64> @llvm.uadd.sat.v1i64(<1 x i64> %tmp1, <1 x i64> %tmp2)
80 %tmp3 = call <16 x i8> @llvm.sadd.sat.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
147 declare <8 x i8> @llvm.sadd.sat.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
[all …]
/llvm-project-15.0.7/llvm/test/Verifier/
H A Dsat-intrinsics.ll5 %r = call i32 @llvm.sadd.sat.i32(float %x, i32 %y)
11 %r = call i37 @llvm.uadd.sat.i37(i37 %y, half %x)
17 %r = call <4 x i32> @llvm.ssub.sat.v4i32(<5 x i32> %x, <4 x i32> %y)
23 %r = call <3 x i37> @llvm.usub.sat.v3i37(<3 x i37> %x, <3 x i32> %y)
29 %r = call float @llvm.ushl.sat.i32(i32 %x, i32 %y)
39 declare i32 @llvm.sadd.sat.i32(float, i32)
40 declare i37 @llvm.uadd.sat.i37(i37, half)
41 declare <4 x i32> @llvm.ssub.sat.v4i32(<5 x i32>, <4 x i32>)
42 declare <3 x i37> @llvm.usub.sat.v3i37(<3 x i37>, <3 x i32>)
43 declare float @llvm.ushl.sat.i32(i32, i32)
[all …]
/llvm-project-15.0.7/llvm/test/MC/Hexagon/
H A Dv60-alu.s51 v16.h=vsub(v3.h,v25.h):sat
54 v4.w=vsub(v19.w,v31.w):sat
57 v22.ub=vsub(v24.ub,v7.ub):sat
60 v15.uh=vsub(v28.uh,v29.uh):sat
69 v11.w=vadd(v7.w,v13.w):sat
135 v13.ub=vadd(v2.ub,v3.ub):sat
150 v7.h=vadd(v7.h,v26.h):sat
165 v0.ub=vround(v4.h,v9.h):sat
168 v5.h=vround(v4.w,v18.w):sat
291 v16.w=vabs(v31.w):sat
[all …]

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