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Searched refs:sadd (Results 1 – 25 of 160) sorted by relevance

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/llvm-project-15.0.7/llvm/test/Analysis/CostModel/AArch64/
H A Darith-ssat.ll5 declare i64 @llvm.sadd.sat.i64(i64, i64)
6 declare <2 x i64> @llvm.sadd.sat.v2i64(<2 x i64>, <2 x i64>)
7 declare <4 x i64> @llvm.sadd.sat.v4i64(<4 x i64>, <4 x i64>)
8 declare <8 x i64> @llvm.sadd.sat.v8i64(<8 x i64>, <8 x i64>)
10 declare i32 @llvm.sadd.sat.i32(i32, i32)
17 declare i16 @llvm.sadd.sat.i16(i16, i16)
24 declare i8 @llvm.sadd.sat.i8(i8, i8)
25 declare <2 x i8> @llvm.sadd.sat.v2i8(<2 x i8>, <2 x i8>)
26 declare <4 x i8> @llvm.sadd.sat.v4i8(<4 x i8>, <4 x i8>)
27 declare <8 x i8> @llvm.sadd.sat.v8i8(<8 x i8>, <8 x i8>)
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dsadd-with-overflow.ll4 declare { <2 x i32>, <2 x i1> } @llvm.sadd.with.overflow.v2i32(<2 x i32>, <2 x i32>)
6 declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32)
8 declare { i8, i1 } @llvm.sadd.with.overflow.i8(i8, i8)
16 %b = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %a, i32 13)
27 %b = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %a, i32 -7)
37 %b = tail call { i8, i1 } @llvm.sadd.with.overflow.i8(i8 %a, i8 27)
48 %b = tail call { i8, i1 } @llvm.sadd.with.overflow.i8(i8 %a, i8 28)
90 %b = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %a, i32 30)
101 %b = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %a, i32 30)
112 %b = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 30, i32 %a)
[all …]
H A Dsaddo.ll4 declare { i64, i1 } @llvm.sadd.with.overflow.i64(i64, i64)
5 declare { i8, i1 } @llvm.sadd.with.overflow.i8(i8, i8)
13 %res = tail call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %a, i64 %b)
22 %res = tail call { i8, i1 } @llvm.sadd.with.overflow.i8(i8 %a, i8 0)
32 %res = tail call { i8, i1 } @llvm.sadd.with.overflow.i8(i8 %a, i8 1)
42 %res = tail call { i8, i1 } @llvm.sadd.with.overflow.i8(i8 %a, i8 2)
52 %res = tail call { i8, i1 } @llvm.sadd.with.overflow.i8(i8 %a, i8 3)
62 %res = tail call { i8, i1 } @llvm.sadd.with.overflow.i8(i8 %a, i8 4)
72 %res = tail call { i8, i1 } @llvm.sadd.with.overflow.i8(i8 %a, i8 127)
82 %res = tail call { i8, i1 } @llvm.sadd.with.overflow.i8(i8 %a, i8 128)
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/X86/
H A Darith-ssat.ll17 declare i64 @llvm.sadd.sat.i64(i64, i64)
18 declare <2 x i64> @llvm.sadd.sat.v2i64(<2 x i64>, <2 x i64>)
19 declare <4 x i64> @llvm.sadd.sat.v4i64(<4 x i64>, <4 x i64>)
20 declare <8 x i64> @llvm.sadd.sat.v8i64(<8 x i64>, <8 x i64>)
22 declare i32 @llvm.sadd.sat.i32(i32, i32)
23 declare <4 x i32> @llvm.sadd.sat.v4i32(<4 x i32>, <4 x i32>)
24 declare <8 x i32> @llvm.sadd.sat.v8i32(<8 x i32>, <8 x i32>)
27 declare i16 @llvm.sadd.sat.i16(i16, i16)
28 declare <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16>, <8 x i16>)
32 declare i8 @llvm.sadd.sat.i8(i8, i8)
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/AMDGPU/
H A Darith-ssat.ll12 declare i64 @llvm.sadd.sat.i64(i64, i64)
13 declare <2 x i64> @llvm.sadd.sat.v2i64(<2 x i64>, <2 x i64>)
14 declare <4 x i64> @llvm.sadd.sat.v4i64(<4 x i64>, <4 x i64>)
15 declare <5 x i64> @llvm.sadd.sat.v5i64(<5 x i64>, <5 x i64>)
18 declare i32 @llvm.sadd.sat.i32(i32, i32)
25 declare i16 @llvm.sadd.sat.i16(i16, i16)
33 declare i8 @llvm.sadd.sat.i8(i8, i8)
34 declare <2 x i8> @llvm.sadd.sat.v2i8(<2 x i8>, <2 x i8>)
35 declare <4 x i8> @llvm.sadd.sat.v4i8(<4 x i8>, <4 x i8>)
36 declare <8 x i8> @llvm.sadd.sat.v8i8(<8 x i8>, <8 x i8>)
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/ARM/
H A Darith-ssat.ll11 declare i64 @llvm.sadd.sat.i64(i64, i64)
12 declare <2 x i64> @llvm.sadd.sat.v2i64(<2 x i64>, <2 x i64>)
13 declare <4 x i64> @llvm.sadd.sat.v4i64(<4 x i64>, <4 x i64>)
14 declare <8 x i64> @llvm.sadd.sat.v8i64(<8 x i64>, <8 x i64>)
16 declare i32 @llvm.sadd.sat.i32(i32, i32)
22 declare i16 @llvm.sadd.sat.i16(i16, i16)
29 declare i8 @llvm.sadd.sat.i8(i8, i8)
30 declare <2 x i8> @llvm.sadd.sat.v2i8(<2 x i8>, <2 x i8>)
31 declare <4 x i8> @llvm.sadd.sat.v4i8(<4 x i8>, <4 x i8>)
32 declare <8 x i8> @llvm.sadd.sat.v8i8(<8 x i8>, <8 x i8>)
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dsadd_sat_vec.ll4 declare <1 x i8> @llvm.sadd.sat.v1i8(<1 x i8>, <1 x i8>)
5 declare <2 x i8> @llvm.sadd.sat.v2i8(<2 x i8>, <2 x i8>)
6 declare <4 x i8> @llvm.sadd.sat.v4i8(<4 x i8>, <4 x i8>)
7 declare <8 x i8> @llvm.sadd.sat.v8i8(<8 x i8>, <8 x i8>)
8 declare <12 x i8> @llvm.sadd.sat.v12i8(<12 x i8>, <12 x i8>)
9 declare <16 x i8> @llvm.sadd.sat.v16i8(<16 x i8>, <16 x i8>)
10 declare <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8>, <32 x i8>)
11 declare <64 x i8> @llvm.sadd.sat.v64i8(<64 x i8>, <64 x i8>)
13 declare <1 x i16> @llvm.sadd.sat.v1i16(<1 x i16>, <1 x i16>)
14 declare <2 x i16> @llvm.sadd.sat.v2i16(<2 x i16>, <2 x i16>)
[all …]
H A Dsadd_sat.ll4 declare i4 @llvm.sadd.sat.i4(i4, i4)
5 declare i8 @llvm.sadd.sat.i8(i8, i8)
6 declare i16 @llvm.sadd.sat.i16(i16, i16)
7 declare i32 @llvm.sadd.sat.i32(i32, i32)
8 declare i64 @llvm.sadd.sat.i64(i64, i64)
9 declare <4 x i32> @llvm.sadd.sat.v4i32(<4 x i32>, <4 x i32>)
19 %tmp = call i32 @llvm.sadd.sat.i32(i32 %x, i32 %y);
31 %tmp = call i64 @llvm.sadd.sat.i64(i64 %x, i64 %y);
47 %tmp = call i16 @llvm.sadd.sat.i16(i16 %x, i16 %y);
63 %tmp = call i8 @llvm.sadd.sat.i8(i8 %x, i8 %y);
[all …]
H A Dsadd_sat_plus.ll4 declare i4 @llvm.sadd.sat.i4(i4, i4)
5 declare i8 @llvm.sadd.sat.i8(i8, i8)
6 declare i16 @llvm.sadd.sat.i16(i16, i16)
7 declare i32 @llvm.sadd.sat.i32(i32, i32)
8 declare i64 @llvm.sadd.sat.i64(i64, i64)
20 %tmp = call i32 @llvm.sadd.sat.i32(i32 %x, i32 %a)
33 %tmp = call i64 @llvm.sadd.sat.i64(i64 %x, i64 %z)
51 %tmp = call i16 @llvm.sadd.sat.i16(i16 %x, i16 %a)
69 %tmp = call i8 @llvm.sadd.sat.i8(i8 %x, i8 %a)
88 %tmp = call i4 @llvm.sadd.sat.i4(i4 %x, i4 %a)
/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/rvv/
H A Dfixed-vectors-vsadd.ll7 declare <2 x i8> @llvm.sadd.sat.v2i8(<2 x i8>, <2 x i8>)
15 %v = call <2 x i8> @llvm.sadd.sat.v2i8(<2 x i8> %va, <2 x i8> %b)
43 declare <4 x i8> @llvm.sadd.sat.v4i8(<4 x i8>, <4 x i8>)
79 declare <8 x i8> @llvm.sadd.sat.v8i8(<8 x i8>, <8 x i8>)
115 declare <16 x i8> @llvm.sadd.sat.v16i8(<16 x i8>, <16 x i8>)
151 declare <2 x i16> @llvm.sadd.sat.v2i16(<2 x i16>, <2 x i16>)
187 declare <4 x i16> @llvm.sadd.sat.v4i16(<4 x i16>, <4 x i16>)
223 declare <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16>, <8 x i16>)
295 declare <2 x i32> @llvm.sadd.sat.v2i32(<2 x i32>, <2 x i32>)
343 declare <4 x i32> @llvm.sadd.sat.v4i32(<4 x i32>, <4 x i32>)
[all …]
H A Dvsadd-sdnode.ll7 declare <vscale x 1 x i8> @llvm.sadd.sat.nxv1i8(<vscale x 1 x i8>, <vscale x 1 x i8>)
15 %v = call <vscale x 1 x i8> @llvm.sadd.sat.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b)
43 declare <vscale x 2 x i8> @llvm.sadd.sat.nxv2i8(<vscale x 2 x i8>, <vscale x 2 x i8>)
79 declare <vscale x 4 x i8> @llvm.sadd.sat.nxv4i8(<vscale x 4 x i8>, <vscale x 4 x i8>)
115 declare <vscale x 8 x i8> @llvm.sadd.sat.nxv8i8(<vscale x 8 x i8>, <vscale x 8 x i8>)
151 declare <vscale x 16 x i8> @llvm.sadd.sat.nxv16i8(<vscale x 16 x i8>, <vscale x 16 x i8>)
187 declare <vscale x 32 x i8> @llvm.sadd.sat.nxv32i8(<vscale x 32 x i8>, <vscale x 32 x i8>)
223 declare <vscale x 64 x i8> @llvm.sadd.sat.nxv64i8(<vscale x 64 x i8>, <vscale x 64 x i8>)
259 declare <vscale x 1 x i16> @llvm.sadd.sat.nxv1i16(<vscale x 1 x i16>, <vscale x 1 x i16>)
295 declare <vscale x 2 x i16> @llvm.sadd.sat.nxv2i16(<vscale x 2 x i16>, <vscale x 2 x i16>)
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/
H A Dint-sadd-09.ll16 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 1)
32 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 127)
50 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 128)
66 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 -128)
84 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 -129)
101 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 1)
120 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 1)
137 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 1)
156 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 1)
176 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 1)
[all …]
H A Dint-sadd-08.ll16 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 1)
32 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 127)
50 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 128)
66 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 -128)
84 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 -129)
101 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 1)
120 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 1)
137 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 1)
156 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 1)
176 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 1)
[all …]
H A Dint-sadd-03.ll16 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 %b)
30 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 %b)
51 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 %b)
75 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 %b)
93 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 %b)
113 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 %b)
131 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 %b)
149 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 %b)
169 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 %b)
189 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 %b)
[all …]
H A Dint-sadd-01.ll16 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
30 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
51 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
75 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
93 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
111 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
129 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
149 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
167 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
185 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
[all …]
H A Dint-sadd-04.ll17 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 %bext)
32 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 %bext)
54 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 %bext)
79 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 %bext)
98 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 %bext)
119 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 %bext)
138 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 %bext)
157 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 %bext)
178 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 %bext)
199 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 %bext)
[all …]
H A Dint-sadd-07.ll17 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 1)
34 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 32767)
50 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 32768)
66 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 2147483647)
83 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 2147483648)
99 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 -1)
115 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 -32768)
131 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 -32769)
147 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 -2147483648)
229 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 1)
[all …]
H A Dint-sadd-06.ll17 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 1)
33 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 32767)
49 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 32768)
65 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 2147483647)
81 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 2147483648)
97 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 -1)
113 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 -32768)
129 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 -32769)
175 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 1)
196 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 1)
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/X86/
H A Darith-add-ssat.ll23 declare i64 @llvm.sadd.sat.i64(i64, i64)
24 declare i32 @llvm.sadd.sat.i32(i32, i32)
25 declare i16 @llvm.sadd.sat.i16(i16, i16)
26 declare i8 @llvm.sadd.sat.i8 (i8 , i8 )
162 %r0 = call i64 @llvm.sadd.sat.i64(i64 %a0, i64 %b0)
163 %r1 = call i64 @llvm.sadd.sat.i64(i64 %a1, i64 %b1)
164 %r2 = call i64 @llvm.sadd.sat.i64(i64 %a2, i64 %b2)
165 %r3 = call i64 @llvm.sadd.sat.i64(i64 %a3, i64 %b3)
166 %r4 = call i64 @llvm.sadd.sat.i64(i64 %a4, i64 %b4)
167 %r5 = call i64 @llvm.sadd.sat.i64(i64 %a5, i64 %b5)
[all …]
H A Darith-add-saddo.ll23 declare {i64, i1} @llvm.sadd.with.overflow.i64(i64, i64)
24 declare {i32, i1} @llvm.sadd.with.overflow.i32(i32, i32)
25 declare {i16, i1} @llvm.sadd.with.overflow.i16(i16, i16)
26 declare {i8 , i1} @llvm.sadd.with.overflow.i8 (i8 , i8 )
88 %c0 = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a0, i64 %b0)
89 %c1 = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a1, i64 %b1)
90 %c2 = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a2, i64 %b2)
91 %c3 = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a3, i64 %b3)
92 %c4 = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a4, i64 %b4)
93 %c5 = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a5, i64 %b5)
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Generic/
H A Doverflow.ll8 %sadd = tail call { i8, i1 } @llvm.sadd.with.overflow.i8(i8 %a, i8 %b)
9 %cmp = extractvalue { i8, i1 } %sadd, 1
10 %sadd.result = extractvalue { i8, i1 } %sadd, 0
11 %X = select i1 %cmp, i8 %sadd.result, i8 42
19 %sadd = tail call { i16, i1 } @llvm.sadd.with.overflow.i16(i16 %a, i16 %b)
20 %cmp = extractvalue { i16, i1 } %sadd, 1
21 %sadd.result = extractvalue { i16, i1 } %sadd, 0
22 %X = select i1 %cmp, i16 %sadd.result, i16 42
30 %sadd = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
31 %cmp = extractvalue { i32, i1 } %sadd, 1
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dintrinsics-overflow.ll6 %sadd = tail call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)
7 %1 = extractvalue { i32, i1 } %sadd, 1
29 %sadd = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
30 %1 = extractvalue { i32, i1 } %sadd, 1
51 %sadd = tail call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
52 %1 = extractvalue { i32, i1 } %sadd, 1
80 %sadd = tail call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %a, i32 %b)
81 %1 = extractvalue { i32, i1 } %sadd, 1
102 declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) #2
H A Dunschedule-first-call.ll20 %13 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 undef, i64 undef)
22 %15 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %14, i64 1)
29 %22 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %21, i64 0)
33 %26 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %25, i64 0)
41 %34 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 0, i64 undef)
43 %36 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %35, i64 1)
50 %43 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %42, i64 0)
55 %48 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %47, i64 0)
73 %66 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %63, i64 %65)
78 %71 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %70, i64 0)
[all …]
H A Dvqadd.ll8 %tmp3 = call <8 x i8> @llvm.sadd.sat.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
17 %tmp3 = call <4 x i16> @llvm.sadd.sat.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
26 %tmp3 = call <2 x i32> @llvm.sadd.sat.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
35 %tmp3 = call <1 x i64> @llvm.sadd.sat.v1i64(<1 x i64> %tmp1, <1 x i64> %tmp2)
80 %tmp3 = call <16 x i8> @llvm.sadd.sat.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
89 %tmp3 = call <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
98 %tmp3 = call <4 x i32> @llvm.sadd.sat.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
107 %tmp3 = call <2 x i64> @llvm.sadd.sat.v2i64(<2 x i64> %tmp1, <2 x i64> %tmp2)
147 declare <8 x i8> @llvm.sadd.sat.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
148 declare <4 x i16> @llvm.sadd.sat.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dcombine-add-ssat.ll10 declare i32 @llvm.sadd.sat.i32 (i32, i32)
11 declare i64 @llvm.sadd.sat.i64 (i64, i64)
12 declare <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16>, <8 x i16>)
20 %res = call i32 @llvm.sadd.sat.i32(i32 %a0, i32 undef)
34 %res = call <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16> undef, <8 x i16> %a0)
44 %res = call i32 @llvm.sadd.sat.i32(i32 2147483647, i32 100)
87 %res = call i32 @llvm.sadd.sat.i32(i32 1, i32 %a0)
111 %1 = call i32 @llvm.sadd.sat.i32(i32 %a0, i32 0)
139 %3 = call i32 @llvm.sadd.sat.i32(i32 %1, i32 %2)
159 %3 = call <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16> %1, <8 x i16> %2)
[all …]

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