s8 (reference) in projects: llvm-project-15.0.7

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/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/
H A D	legalize-build-vector.mir	66 …s8>) = G_BUILD_VECTOR [[DEF]](s8), [[DEF1]](s8), [[DEF]](s8), [[DEF1]](s8), [[DEF]](s8), [[DEF1]](… 69 %0:_(s8) = G_IMPLICIT_DEF 70 %1:_(s8) = G_IMPLICIT_DEF 71 … x s8>) = G_BUILD_VECTOR %0(s8), %1(s8), %0(s8), %1(s8), %0(s8), %1(s8), %0(s8), %1(s8), %0(s8), %… 72 $q0 = COPY %2(<16 x s8>) 82 …9]+]]:_(<8 x s8>) = G_BUILD_VECTOR [[DEF]](s8), [[DEF1]](s8), [[DEF]](s8), [[DEF1]](s8), [[DEF]](s… 85 %0:_(s8) = G_IMPLICIT_DEF 87 %2:_(<8 x s8>) = G_BUILD_VECTOR %0(s8), %1(s8), %0(s8), %1(s8), %0(s8), %1(s8), %0(s8), %1(s8) 88 $d0 = COPY %2(<8 x s8>) 98 …s8>) = G_BUILD_VECTOR [[DEF]](s8), [[DEF1]](s8), [[DEF]](s8), [[DEF1]](s8), [[DEF]](s8), [[DEF1]](… [all …]
H A D	regbankselect-build-vector.mir	`55 …s8>) = G_BUILD_VECTOR [[C]](s8), [[C1]](s8), [[C2]](s8), [[C3]](s8), [[C4]](s8), [[C]](s8), [[C1]]… 58 %1:_(s8) = G_CONSTANT i8 4 59 %2:_(s8) = G_CONSTANT i8 10 60 %3:_(s8) = G_CONSTANT i8 3 61 %4:_(s8) = G_CONSTANT i8 11 62 %5:_(s8) = G_CONSTANT i8 15 63 %6:_(s8) = G_CONSTANT i8 44 64 %7:_(s8) = G_CONSTANT i8 22 65 %8:_(s8) = G_CONSTANT i8 19 67 … x s8>) = G_BUILD_VECTOR %1(s8), %2(s8), %3(s8), %4(s8), %5(s8), %1(s8), %2(s8), %6(s8), %7(s8), %… [all …]`
H A D	prelegalizercombiner-extending-loads-cornercases.mir	78 %2:_(s8) = G_LOAD %0 :: (load (s8) from %ir.addr) 102 %8:_(s8) = G_PHI %6:_(s8), %bb.1, %7:_(s8), %bb.2 103 ; CHECK: [[T5:%[0-9]+]]:_(s8) = G_PHI [[T2]](s8), %bb.1, [[T4]](s8) 143 %2:_(s8) = G_LOAD %0 :: (load (s8) from %ir.addr) 160 %8:_(s8) = G_PHI %6:_(s8), %bb.1, %2:_(s8), %bb.0 161 ; CHECK: [[T5:%[0-9]+]]:_(s8) = G_PHI [[T2]](s8), %bb.1, [[T4]](s8) 181 %2:_(s8) = G_LOAD %0 :: (load (s8) from %ir.addr) 204 %9:_(s8) = G_PHI %6:_(s8), %bb.1, %8:_(s8), %bb.2 205 ; CHECK: [[T5:%[0-9]+]]:_(s8) = G_PHI [[T2]](s8), %bb.1, [[T4]](s8) 266 %8:_(s8) = G_PHI %6:_(s8), %bb.1, %2:_(s8), %bb.3 [all …]
H A D	legalize-min-max.mir	56 …s8>) = G_BUILD_VECTOR [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8)… 57 …s8>) = G_BUILD_VECTOR [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8)… 58 …s8>) = G_BUILD_VECTOR [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8)… 59 …s8>) = G_BUILD_VECTOR [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8)… 339 …s8>) = G_BUILD_VECTOR [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8)… 340 …s8>) = G_BUILD_VECTOR [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8)… 341 …s8>) = G_BUILD_VECTOR [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8)… 342 …s8>) = G_BUILD_VECTOR [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8)… 643 …s8>) = G_BUILD_VECTOR [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8)… 644 …s8>) = G_BUILD_VECTOR [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8)… [all …]
H A D	legalize-reduce-or.mir	102 …s8), [[UV1:%[0-9]+]]:_(s8), [[UV2:%[0-9]+]]:_(s8), [[UV3:%[0-9]+]]:_(s8), [[UV4:%[0-9]+]]:_(s8), [… 146 …s8), [[UV1:%[0-9]+]]:_(s8), [[UV2:%[0-9]+]]:_(s8), [[UV3:%[0-9]+]]:_(s8), [[UV4:%[0-9]+]]:_(s8), [… 210 %9:_(s8) = G_VECREDUCE_OR %0(s8) 242 %5:_(s8) = G_VECREDUCE_OR %0(<3 x s8>) 273 %2:_(s8) = G_VECREDUCE_OR %0(<4 x s8>) 292 …s8), [[UV1:%[0-9]+]]:_(s8), [[UV2:%[0-9]+]]:_(s8), [[UV3:%[0-9]+]]:_(s8), [[UV4:%[0-9]+]]:_(s8), [… 311 %1:_(s8) = G_VECREDUCE_OR %0(<8 x s8>) 332 …s8), [[UV3:%[0-9]+]]:_(s8), [[UV4:%[0-9]+]]:_(s8), [[UV5:%[0-9]+]]:_(s8), [[UV6:%[0-9]+]]:_(s8), [… 351 %1:_(s8) = G_VECREDUCE_OR %0(<16 x s8>) 375 …s8), [[UV3:%[0-9]+]]:_(s8), [[UV4:%[0-9]+]]:_(s8), [[UV5:%[0-9]+]]:_(s8), [[UV6:%[0-9]+]]:_(s8), [… [all …]
H A D	postlegalizer-lowering-trn.mir	`24 %0:_(<8 x s8>) = COPY $d0 25 %1:_(<8 x s8>) = COPY $d1 26 %2:_(<8 x s8>) = G_SHUFFLE_VECTOR %0(<8 x s8>), %1, shufflemask(0, 8, 2, 10, 4, 12, 6, 14) 27 $d0 = COPY %2(<8 x s8>) 46 %0:_(<8 x s8>) = COPY $d0 47 %1:_(<8 x s8>) = COPY $d1 49 $d0 = COPY %2(<8 x s8>) 71 $q0 = COPY %2(<16 x s8>) 93 $q0 = COPY %2(<16 x s8>) 209 $d0 = COPY %2(<8 x s8>) [all …]`
H A D	prelegalizercombiner-extending-loads.mir	`13 %1:_(s8) = G_LOAD %0 :: (load (s8)) 28 %1:_(s8) = G_LOAD %0 :: (load (s8)) 44 %1:_(s8) = G_LOAD %0 :: (load (s8)) 59 %1:_(s8) = G_LOAD %0 :: (load (s8)) 75 %1:_(s8) = G_LOAD %0 :: (load (s8)) 93 %1:_(s8) = G_LOAD %0 :: (load (s8)) 115 %1:_(s8) = G_LOAD %0 :: (load (s8)) 135 %1:_(s8) = G_LOAD %0 :: (load (s8)) 155 %1:_(s8) = G_LOAD %0 :: (load (s8)) 174 %1:_(s8) = G_LOAD %0 :: (load (s8)) [all …]`
H A D	legalize-reduce-xor.mir	106 …s8), [[UV1:%[0-9]+]]:_(s8), [[UV2:%[0-9]+]]:_(s8), [[UV3:%[0-9]+]]:_(s8), [[UV4:%[0-9]+]]:_(s8), [… 151 …s8), [[UV1:%[0-9]+]]:_(s8), [[UV2:%[0-9]+]]:_(s8), [[UV3:%[0-9]+]]:_(s8), [[UV4:%[0-9]+]]:_(s8), [… 216 %9:_(s8) = G_VECREDUCE_XOR %0(s8) 249 %5:_(s8) = G_VECREDUCE_XOR %0(<3 x s8>) 281 %2:_(s8) = G_VECREDUCE_XOR %0(<4 x s8>) 301 …s8), [[UV1:%[0-9]+]]:_(s8), [[UV2:%[0-9]+]]:_(s8), [[UV3:%[0-9]+]]:_(s8), [[UV4:%[0-9]+]]:_(s8), [… 320 %1:_(s8) = G_VECREDUCE_XOR %0(<8 x s8>) 342 …s8), [[UV3:%[0-9]+]]:_(s8), [[UV4:%[0-9]+]]:_(s8), [[UV5:%[0-9]+]]:_(s8), [[UV6:%[0-9]+]]:_(s8), [… 361 %1:_(s8) = G_VECREDUCE_XOR %0(<16 x s8>) 386 …s8), [[UV3:%[0-9]+]]:_(s8), [[UV4:%[0-9]+]]:_(s8), [[UV5:%[0-9]+]]:_(s8), [[UV6:%[0-9]+]]:_(s8), [… [all …]
H A D	legalize-reduce-and.mir	106 …s8), [[UV1:%[0-9]+]]:_(s8), [[UV2:%[0-9]+]]:_(s8), [[UV3:%[0-9]+]]:_(s8), [[UV4:%[0-9]+]]:_(s8), [… 151 …s8), [[UV1:%[0-9]+]]:_(s8), [[UV2:%[0-9]+]]:_(s8), [[UV3:%[0-9]+]]:_(s8), [[UV4:%[0-9]+]]:_(s8), [… 216 %9:_(s8) = G_VECREDUCE_AND %0(s8) 249 %5:_(s8) = G_VECREDUCE_AND %0(<3 x s8>) 281 %2:_(s8) = G_VECREDUCE_AND %0(<4 x s8>) 301 …s8), [[UV1:%[0-9]+]]:_(s8), [[UV2:%[0-9]+]]:_(s8), [[UV3:%[0-9]+]]:_(s8), [[UV4:%[0-9]+]]:_(s8), [… 320 %1:_(s8) = G_VECREDUCE_AND %0(<8 x s8>) 342 …s8), [[UV3:%[0-9]+]]:_(s8), [[UV4:%[0-9]+]]:_(s8), [[UV5:%[0-9]+]]:_(s8), [[UV6:%[0-9]+]]:_(s8), [… 361 %1:_(s8) = G_VECREDUCE_AND %0(<16 x s8>) 386 …s8), [[UV3:%[0-9]+]]:_(s8), [[UV4:%[0-9]+]]:_(s8), [[UV5:%[0-9]+]]:_(s8), [[UV6:%[0-9]+]]:_(s8), [… [all …]
H A D	postlegalizer-lowering-ext.mir	`23 %v1:_(<8 x s8>) = COPY $d0 24 %v2:_(<8 x s8>) = COPY $d1 25 %shuf:_(<8 x s8>) = G_SHUFFLE_VECTOR %v1(<8 x s8>), %v2, shufflemask(3, 4, 5, 6, 7, 8, 9, 10) 26 $d0 = COPY %shuf(<8 x s8>) 45 %v1:_(<8 x s8>) = COPY $d0 46 %v2:_(<8 x s8>) = COPY $d1 48 $d0 = COPY %shuf(<8 x s8>) 67 %v1:_(<16 x s8>) = COPY $q0 68 %v2:_(<16 x s8>) = COPY $q1 70 $q0 = COPY %shuf(<16 x s8>) [all …]`
H A D	legalize-ctpop.mir	13 ; CHECK: %ctpop:_(<8 x s8>) = G_CTPOP %copy(<8 x s8>) 17 %ctpop:_(<8 x s8>) = G_CTPOP %copy(<8 x s8>) 31 ; CHECK: %ctpop:_(<16 x s8>) = G_CTPOP %copy(<16 x s8>) 35 %ctpop:_(<16 x s8>) = G_CTPOP %copy(<16 x s8>) 51 ; CHECK: [[CTPOP:%[0-9]+]]:_(<8 x s8>) = G_CTPOP [[BITCAST]](<8 x s8>) 71 ; CHECK: [[CTPOP:%[0-9]+]]:_(<8 x s8>) = G_CTPOP [[BITCAST]](<8 x s8>) 92 ; CHECK: [[CTPOP:%[0-9]+]]:_(<16 x s8>) = G_CTPOP [[BITCAST]](<16 x s8>) 120 ; CHECK: [[CTPOP:%[0-9]+]]:_(<8 x s8>) = G_CTPOP [[BITCAST]](<8 x s8>) 147 ; CHECK: [[CTPOP:%[0-9]+]]:_(<8 x s8>) = G_CTPOP [[BITCAST]](<8 x s8>) 154 %ctpop:_(s8) = G_CTPOP %trunc(s8) [all …]
H A D	legalize-select.mir	94 …s8>) = G_BUILD_VECTOR [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8),… 95 …; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<16 x s8>) = G_ICMP intpred(sgt), [[COPY]](<16 x s8>), [[BUILD_VE… 97 …s8>) = G_BUILD_VECTOR [[C1]](s8), [[C1]](s8), [[C1]](s8), [[C1]](s8), [[C1]](s8), [[C1]](s8), [[C1… 98 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(<16 x s8>) = G_SHL [[ICMP]], [[BUILD_VECTOR1]](<16 x s8>) 99 ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(<16 x s8>) = G_ASHR [[SHL]], [[BUILD_VECTOR1]](<16 x s8>) 101 …s8>) = G_BUILD_VECTOR [[C2]](s8), [[C2]](s8), [[C2]](s8), [[C2]](s8), [[C2]](s8), [[C2]](s8), [[C2… 108 %0:_(<16 x s8>) = COPY $q0 109 %1:_(<16 x s8>) = COPY $q1 110 %3:_(s8) = G_CONSTANT i8 0 111 … x s8>) = G_BUILD_VECTOR %3(s8), %3(s8), %3(s8), %3(s8), %3(s8), %3(s8), %3(s8), %3(s8), %3(s8), %… [all …]
H A D	combine-udiv.mir	267 …s8>) = G_BUILD_VECTOR [[C]](s8), [[C1]](s8), [[C1]](s8), [[C1]](s8), [[C1]](s8), [[C1]](s8), [[C1]… 271 …s8>) = G_BUILD_VECTOR [[C3]](s8), [[C2]](s8), [[C2]](s8), [[C2]](s8), [[C2]](s8), [[C2]](s8), [[C2… 272 …s8>) = G_BUILD_VECTOR [[C4]](s8), [[C2]](s8), [[C2]](s8), [[C2]](s8), [[C2]](s8), [[C2]](s8), [[C2… 274 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(<16 x s8>) = G_LSHR [[UMULH]], [[BUILD_VECTOR2]](<16 x s8>) 275 …s8>) = G_BUILD_VECTOR [[C1]](s8), [[C1]](s8), [[C1]](s8), [[C1]](s8), [[C1]](s8), [[C1]](s8), [[C1… 280 %0:_(<16 x s8>) = COPY $q0 281 %2:_(s8) = G_CONSTANT i8 -64 282 %3:_(s8) = G_CONSTANT i8 1 283 … x s8>) = G_BUILD_VECTOR %2(s8), %3(s8), %3(s8), %3(s8), %3(s8), %3(s8), %3(s8), %3(s8), %3(s8), %… 284 %4:_(<16 x s8>) = G_UDIV %0, %1 [all …]
H A D	merge-stores-truncating.mir	`29 G_STORE %3(s8), %1(p0) :: (store (s8)) 32 G_STORE %6(s8), %8(p0) :: (store (s8)) 66 G_STORE %2(s8), %1(p0) :: (store (s8)) 69 G_STORE %5(s8), %13(p0) :: (store (s8)) 72 G_STORE %8(s8), %15(p0) :: (store (s8)) 75 G_STORE %11(s8), %17(p0) :: (store (s8)) 218 G_STORE %2(s8), %1(p0) :: (store (s8)) 221 G_STORE %5(s8), %25(p0) :: (store (s8)) 224 G_STORE %8(s8), %27(p0) :: (store (s8)) 227 G_STORE %11(s8), %29(p0) :: (store (s8)) [all …]`
H A D	postlegalizer-lowering-build-vector-to-dup.mir	14 ; LOWER: %r:_(s8) = G_IMPLICIT_DEF 15 ; LOWER: %build_vector:_(<8 x s8>) = G_DUP %r(s8) 24 %r:_(s8) = G_IMPLICIT_DEF 26 $d0 = COPY %build_vector(<8 x s8>) 73 ; LOWER: %r:_(s8) = G_CONSTANT i8 0 74 …; LOWER: %build_vector:_(<8 x s8>) = G_BUILD_VECTOR %r(s8), %r(s8), %r(s8), %r(s8), %r(s8), %r(s8)… 83 %r:_(s8) = G_CONSTANT i8 0 85 $d0 = COPY %build_vector(<8 x s8>) 102 …; LOWER: %build_vector:_(<8 x s8>) = G_BUILD_VECTOR %r(s8), %r(s8), %r(s8), %r(s8), %r(s8), %r(s8)… 111 %r:_(s8) = G_CONSTANT i8 -1 [all …]
H A D	legalize-vector-cmp.mir	`118 $d0 = COPY %3(<8 x s8>) 176 $q0 = COPY %3(<16 x s8>) 201 %0:_(<8 x s8>) = COPY $d0 202 %1:_(<8 x s8>) = COPY $d1 205 $d0 = COPY %3(<8 x s8>) 324 $d0 = COPY %3(<8 x s8>) 382 $q0 = COPY %3(<16 x s8>) 411 $d0 = COPY %3(<8 x s8>) 530 $d0 = COPY %3(<8 x s8>) 617 $d0 = COPY %3(<8 x s8>) [all …]`
H A D	legalize-bitreverse.mir	`49 ; CHECK: $x0 = COPY %bitreverse(<8 x s8>) 51 %vec:_(<8 x s8>) = G_IMPLICIT_DEF 68 %vec:_(<16 x s8>) = G_IMPLICIT_DEF 81 ; CHECK: %copy:_(s8) = COPY $b0 87 ; CHECK: $b0 = COPY %bitreverse(s8) 89 %copy:_(s8) = COPY $b0 90 %bitreverse:_(s8) = G_BITREVERSE %copy 102 ; CHECK: %copy:_(s8) = COPY $b0 108 ; CHECK: $b0 = COPY %ext(s8) 110 %copy:_(s8) = COPY $b0 [all …]`
H A D	legalize-load-store.mir	11 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s8) = G_LOAD [[COPY]](p0) :: (load (s8)) 37 %3:_(s8) = G_LOAD %0(p0) :: (load (s8)) 88 G_STORE %3(s8), %0(p0) :: (store (s8)) 183 G_STORE %0(<16 x s8>), %1(p0) :: (store (<16 x s8>)) 270 %1:_(<16 x s8>) = G_LOAD %0(p0) :: (load (<16 x s8>)) 291 %1:_(<8 x s8>) = G_LOAD %0(p0) :: (load (<8 x s8>)) 313 G_STORE %1(<8 x s8>), %0(p0) :: (store (<8 x s8>)) 328 …s8>) = G_BUILD_VECTOR [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8)… 329 …s8>) = G_BUILD_VECTOR [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8)… 338 G_STORE %val(<32 x s8>), %ptr(p0) :: (store (<32 x s8>)) [all …]
H A D	combine-unmerge.mir	`229 …1:_(s8),%2:_(s8),%3:_(s8),%4:_(s8),%5:_(s8),%6:_(s8),%7:_(s8),%8:_(s8),%9:_(s8),%10:_(s8),%11:_(s8… 230 $b0 = COPY %1(s8) 231 $b1 = COPY %2(s8) 232 $b2 = COPY %3(s8) 233 $b3 = COPY %4(s8) 234 $b4 = COPY %5(s8) 235 $b5 = COPY %6(s8) 236 $b6 = COPY %7(s8) 237 $b7 = COPY %8(s8) 238 $b8 = COPY %9(s8) [all …]`
/llvm-project-15.0.7/llvm/test/CodeGen/X86/GlobalISel/
H A D	legalize-add-v512.mir	47 …]]:_(<16 x s8>), [[UV1:%[0-9]+]]:_(<16 x s8>), [[UV2:%[0-9]+]]:_(<16 x s8>), [[UV3:%[0-9]+]]:_(<16… 48 …]]:_(<16 x s8>), [[UV5:%[0-9]+]]:_(<16 x s8>), [[UV6:%[0-9]+]]:_(<16 x s8>), [[UV7:%[0-9]+]]:_(<16… 53 …ECTORS:%[0-9]+]]:_(<64 x s8>) = G_CONCAT_VECTORS [[ADD]](<16 x s8>), [[ADD1]](<16 x s8>), [[ADD2]]… 59 …; AVX512F: [[UV:%[0-9]+]]:_(<32 x s8>), [[UV1:%[0-9]+]]:_(<32 x s8>) = G_UNMERGE_VALUES [[DEF]](<6… 60 …; AVX512F: [[UV2:%[0-9]+]]:_(<32 x s8>), [[UV3:%[0-9]+]]:_(<32 x s8>) = G_UNMERGE_VALUES [[DEF1]](… 63 …; AVX512F: [[CONCAT_VECTORS:%[0-9]+]]:_(<64 x s8>) = G_CONCAT_VECTORS [[ADD]](<32 x s8>), [[ADD1]]… 237 …; AVX1: [[UV:%[0-9]+]]:_(<16 x s8>), [[UV1:%[0-9]+]]:_(<16 x s8>) = G_UNMERGE_VALUES [[COPY]](<32 … 238 …; AVX1: [[UV2:%[0-9]+]]:_(<16 x s8>), [[UV3:%[0-9]+]]:_(<16 x s8>) = G_UNMERGE_VALUES [[COPY1]](<3… 276 %0(<64 x s8>) = G_CONCAT_VECTORS %2(<32 x s8>), %3(<32 x s8>) 277 %1(<64 x s8>) = G_CONCAT_VECTORS %4(<32 x s8>), %5(<32 x s8>) [all …]
H A D	regbankselect-X86_64.mir	`1439 %5:_(s8) = COPY %6(s8) 1480 %5:_(s8) = COPY %6(s8) 1515 %3:_(s8) = COPY %4(s8) 1550 %3:_(s8) = COPY %4(s8) 2551 %5:_(s8) = COPY %6(s8) 2598 %5:_(s8) = COPY %6(s8) 2645 %5:_(s8) = COPY %6(s8) 2692 %5:_(s8) = COPY %6(s8) 2739 %5:_(s8) = COPY %6(s8) 2786 %5:_(s8) = COPY %6(s8) [all …]`
H A D	legalize-ext.mir	`123 $al = COPY %2(s8) 187 %0(s8) = COPY $dil 216 %0(s8) = COPY $dil 244 %0(s8) = COPY $dil 300 $al = COPY %1(s8) 379 %0(s8) = COPY $dil 407 %0(s8) = COPY $dil 467 $al = COPY %2(s8) 524 %0(s8) = COPY $dil 553 %0(s8) = COPY $dil [all …]`
H A D	legalize-trunc.mir	22 ; X32: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 1 23 ; X32: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[DEF]](s32) 24 ; X32: [[AND:%[0-9]+]]:_(s8) = G_AND [[TRUNC]], [[C]] 26 ; X32: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[DEF]](s32) 27 ; X32: G_STORE [[TRUNC1]](s8), [[DEF1]](p0) :: (store (s8)) 34 ; X64: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 1 35 ; X64: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[DEF]](s32) 36 ; X64: [[AND:%[0-9]+]]:_(s8) = G_AND [[TRUNC]], [[C]] 39 ; X64: G_STORE [[TRUNC1]](s8), [[DEF1]](p0) :: (store (s8)) 48 %2(s8) = G_TRUNC %0(s32) [all …]
H A D	x86_64-select-fcmp.mir	`182 %5:gpr(s8) = COPY %6(s8) 220 %5:gpr(s8) = COPY %6(s8) 258 %5:gpr(s8) = COPY %6(s8) 296 %5:gpr(s8) = COPY %6(s8) 334 %5:gpr(s8) = COPY %6(s8) 372 %5:gpr(s8) = COPY %6(s8) 410 %5:gpr(s8) = COPY %6(s8) 448 %5:gpr(s8) = COPY %6(s8) 486 %5:gpr(s8) = COPY %6(s8) 524 %5:gpr(s8) = COPY %6(s8) [all …]`
/llvm-project-15.0.7/llvm/test/MC/ARM/
H A D	armv8.6a-matmul-error.s	`14 vummla.s8 q0, q1, q2 27 vsmmla.s8 d0, q1, q2 37 vusmmla.s8 q0, q1, d2 54 vusdot.s8 q0, d1, d2 56 vusdot.s8 d0, q1, d2 58 vusdot.s8 d0, d1, q2 71 vsudot.s8 d0, d1, d2[0] 78 vusdot.s8 q0, d1, d2[0] 88 vusdot.s8 d0, q1, d2[0] 98 vusdot.s8 q0, q1, q2[0] [all …]`

12 3 4 5 6 7 8 9 10 >>...55

TaskScheduler
dpdk
expo
f-stack
freebsd-12.1
freebsd-13.1
freebsd-14.2
iperf
leveldb-1.20
libedit-20250104-3.1
libev
libevent-2.1.12
libpciaccess
libtiff-4.0.7
lighttpd1.4
linux-6.15
llvm-project-15.0.7
mOS-networking-stack
memcached-1.4.29
memcached-1.6.32
oneTBB
pciutils
potrace-1.14
redis-3.2.3
rocksdb-6.9
rust-libc-0.2.174
sqlite-3.40.0
tonic
vim-8.2.3635
wasmtime-44.0.1
webrtc
xiu
xnu-11215