| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/ |
| H A D | artifact-find-value.mir | 21 ; CHECK: %v2s64_val:_(<2 x s64>) = G_BUILD_VECTOR [[COPY5]](s64), [[COPY6]](s64) 22 ; CHECK: %v2s64_val2:_(<2 x s64>) = G_BUILD_VECTOR [[COPY6]](s64), [[COPY8]](s64) 42 …%bigconcat:_(<24 x s64>) = G_CONCAT_VECTORS %concat1:_(<8 x s64>), %v8s64_undef:_(<8 x s64>), %v8s… 44 …%unmerge1:_(<6 x s64>), %deaddef1:_(<6 x s64>), %deaddef2:_(<6 x s64>), %deaddef3:_(<6 x s64>) = G… 45 …%val1:_(<2 x s64>), %val2:_(<2 x s64>), %val3:_(<2 x s64>) = G_UNMERGE_VALUES %unmerge1:_(<6 x s64… 72 ; CHECK: %v2s64_val:_(<2 x s64>) = G_BUILD_VECTOR [[COPY5]](s64), [[COPY6]](s64) 95 …%deaddef1:_(<6 x s64>), %deaddef2:_(<6 x s64>), %deaddef3:_(<6 x s64>), %unmerge1:_(<6 x s64>) = G… 96 …%val1:_(<2 x s64>), %val2:_(<2 x s64>), %val3:_(<2 x s64>) = G_UNMERGE_VALUES %unmerge1:_(<6 x s64… 141 …%val1:_(<2 x s64>), %val2:_(<2 x s64>), %val3:_(<2 x s64>), %val4:_(<2 x s64>) = G_UNMERGE_VALUES … 187 …%val1:_(<2 x s64>), %val2:_(<2 x s64>), %val3:_(<2 x s64>), %val4:_(<2 x s64>) = G_UNMERGE_VALUES … [all …]
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| H A D | lower-neon-vector-fcmp.mir | 37 ; CHECK: %zero_vec:_(<2 x s64>) = G_BUILD_VECTOR %zero(s64), %zero(s64) 80 ; CHECK: %zero_vec:_(<2 x s64>) = G_BUILD_VECTOR %zero(s64), %zero(s64) 125 ; CHECK: %zero_vec:_(<2 x s64>) = G_BUILD_VECTOR %zero(s64), %zero(s64) 168 ; CHECK: %zero_vec:_(<2 x s64>) = G_BUILD_VECTOR %zero(s64), %zero(s64) 210 ; CHECK: %zero_vec:_(<2 x s64>) = G_BUILD_VECTOR %zero(s64), %zero(s64) 260 ; CHECK: %zero_vec:_(<2 x s64>) = G_BUILD_VECTOR %zero(s64), %zero(s64) 315 ; CHECK: %zero_vec:_(<2 x s64>) = G_BUILD_VECTOR %zero(s64), %zero(s64) 370 ; CHECK: %zero_vec:_(<2 x s64>) = G_BUILD_VECTOR %zero(s64), %zero(s64) 423 ; CHECK: %zero_vec:_(<2 x s64>) = G_BUILD_VECTOR %zero(s64), %zero(s64) 477 ; CHECK: %zero_vec:_(<2 x s64>) = G_BUILD_VECTOR %zero(s64), %zero(s64) [all …]
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| H A D | prelegalizer-combiner-narrow-binop-feeding-add.mir | 26 $x0 = COPY %and(s64) 50 $x0 = COPY %and(s64) 74 $x0 = COPY %and(s64) 98 $x0 = COPY %and(s64) 121 $x0 = COPY %and(s64) 145 $x0 = COPY %and(s64) 170 $x0 = COPY %and(s64) 193 $x0 = COPY %and(s64) 216 $x0 = COPY %and(s64) 264 $x0 = COPY %or(s64) [all …]
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| H A D | legalize-add.mir | 22 %4:_(s128) = G_MERGE_VALUES %0(s64), %1(s64) 23 %5:_(s128) = G_MERGE_VALUES %2(s64), %3(s64) 25 %7:_(s64), %8:_(s64) = G_UNMERGE_VALUES %6(s128) 52 %4:_(s192) = G_MERGE_VALUES %0(s64), %1(s64), %2(s64) 53 %5:_(s192) = G_MERGE_VALUES %1(s64), %2(s64), %3(s64) 55 %7:_(s64), %8:_(s64), %9:_(s64) = G_UNMERGE_VALUES %6(s192) 101 %4:_(s128) = G_MERGE_VALUES %0(s64), %1(s64) 162 %7:_(<2 x s64>), %8:_(<2 x s64>) = G_UNMERGE_VALUES %6(<4 x s64>) 186 %4:_(<6 x s64>) = G_CONCAT_VECTORS %0(<2 x s64>), %1(<2 x s64>), %2(<2 x s64>) 187 %5:_(<6 x s64>) = G_CONCAT_VECTORS %1(<2 x s64>), %2(<2 x s64>), %3(<2 x s64>) [all …]
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| H A D | postlegalizercombiner-extractvec-faddp.mir | 18 ; CHECK: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[COPY]](<2 x s64>), [[C]](s64) 20 ; CHECK: [[EVEC1:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[COPY]](<2 x s64>), [[C1]](s64) 29 %4:_(s64) = G_EXTRACT_VECTOR_ELT %3(<2 x s64>), %5(s64) 30 $d0 = COPY %4(s64) 49 ; CHECK: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[COPY]](<2 x s64>), [[C]](s64) 51 ; CHECK: [[EVEC1:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[COPY]](<2 x s64>), [[C1]](s64) 60 %4:_(s64) = G_EXTRACT_VECTOR_ELT %3(<2 x s64>), %5(s64) 145 ; CHECK: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[FADD]](<2 x s64>), [[C]](s64) 153 %4:_(s64) = G_EXTRACT_VECTOR_ELT %3(<2 x s64>), %5(s64) 176 ; CHECK: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[FADD]](<2 x s64>), [[C]](s64) [all …]
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| H A D | combine-build-vector.mir | 29 %bv:_(<2 x s64>) = G_BUILD_VECTOR %arg1(s64), %arg2(s64) 30 %extract:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %zero(s32) 31 %extract2:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %one(s32) 58 ; CHECK: %bv:_(<2 x s64>) = G_BUILD_VECTOR %arg1(s64), %arg2(s64) 69 %bv:_(<2 x s64>) = G_BUILD_VECTOR %arg1(s64), %arg2(s64) 70 %extract:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %zero(s32) 71 %extract2:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %one(s32) 105 %bv:_(<2 x s64>) = G_BUILD_VECTOR %arg1(s64), %arg2(s64) 106 %extract:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %zero(s32) 136 ; CHECK: %bv:_(<2 x s64>) = G_BUILD_VECTOR %arg1(s64), %arg2(s64) [all …]
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| H A D | legalize-shuffle-vector.mir | 170 %0:_(<4 x s64>) = G_CONCAT_VECTORS %3(<2 x s64>), %4(<2 x s64>) 173 %1:_(<4 x s64>) = G_CONCAT_VECTORS %5(<2 x s64>), %6(<2 x s64>) 176 G_STORE %7(<4 x s64>), %2(p0) :: (store (<4 x s64>)) 254 …; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[COPY2]](s64), [[COPY3]](s64) 256 …; CHECK-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[COPY]](s64), [[COPY1]](s64) 257 …; CHECK-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[COPY]](s64), [[COPY1]](s64) 259 …; CHECK-NEXT: [[BUILD_VECTOR5:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[LOAD]](s64), [[LOAD1]](s64) 267 … ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[SHUF]](<2 x s64>) 270 ; CHECK-NEXT: [[BUILD_VECTOR8:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[UV]](s64), [[UV1]](s64) 285 %0:_(<6 x s64>) = G_BUILD_VECTOR %3(s64), %4(s64), %5(s64), %6(s64), %7(s64), %8(s64) [all …]
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| H A D | call-lowering-sret-demotion.ll | 12 ; CHECK-NEXT: G_STORE [[C]](s64), [[COPY]](p0) :: (store (s64)) 15 ; CHECK-NEXT: G_STORE [[C]](s64), [[PTR_ADD]](p0) :: (store (s64)) 18 ; CHECK-NEXT: G_STORE [[C]](s64), [[PTR_ADD1]](p0) :: (store (s64)) 21 ; CHECK-NEXT: G_STORE [[C]](s64), [[PTR_ADD2]](p0) :: (store (s64)) 24 ; CHECK-NEXT: G_STORE [[C]](s64), [[PTR_ADD3]](p0) :: (store (s64)) 27 ; CHECK-NEXT: G_STORE [[C]](s64), [[PTR_ADD4]](p0) :: (store (s64)) 30 ; CHECK-NEXT: G_STORE [[C]](s64), [[PTR_ADD5]](p0) :: (store (s64)) 33 ; CHECK-NEXT: G_STORE [[C]](s64), [[PTR_ADD6]](p0) :: (store (s64)) 36 ; CHECK-NEXT: G_STORE [[C]](s64), [[PTR_ADD7]](p0) :: (store (s64)) 52 ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p0) :: (load (s64) from %stack.0) [all …]
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| H A D | prelegalizercombiner-hoist-same-hands.mir | 308 %hand1:_(s64) = G_AND %x(s64), %z 309 %hand2:_(s64) = G_AND %y(s64), %z 335 %hand1:_(s64) = G_ASHR %x(s64), %z 336 %hand2:_(s64) = G_ASHR %y(s64), %z 389 %hand1:_(s64) = G_SHL %x(s64), %z 390 %hand2:_(s64) = G_SHL %y(s64), %z 416 %hand1:_(s64) = G_AND %x(s64), %z 417 %hand2:_(s64) = G_AND %y(s64), %z 497 %hand1:_(s64) = G_SHL %x(s64), %z 498 %hand2:_(s64) = G_SHL %y(s64), %z [all …]
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| H A D | legalize-sub.mir | 19 %0:_(s64) = COPY $x0 20 %1:_(s64) = COPY $x1 21 %2:_(s64) = COPY $x2 23 %4:_(s128) = G_MERGE_VALUES %0(s64), %1(s64) 24 %5:_(s128) = G_MERGE_VALUES %2(s64), %3(s64) 26 %7:_(s64), %8:_(s64) = G_UNMERGE_VALUES %6(s128) 27 $x0 = COPY %7(s64) 28 $x1 = COPY %8(s64) 53 %4:_(s192) = G_MERGE_VALUES %0(s64), %1(s64), %2(s64) 54 %5:_(s192) = G_MERGE_VALUES %1(s64), %2(s64), %3(s64) [all …]
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| H A D | legalize-xor.mir | 15 %0:_(s64) = COPY $x0 16 %1:_(s64) = COPY $x1 17 %2:_(s8) = G_TRUNC %0(s64) 18 %3:_(s8) = G_TRUNC %1(s64) 20 %5:_(s64) = G_ANYEXT %4(s8) 21 $x0 = COPY %5(s64) 47 ; CHECK-NEXT: G_STORE [[AND]](s64), %ptr(p0) :: (store (s64), align 64) 91 ; CHECK-NEXT: G_STORE [[AND]](s64), %ptr(p0) :: (store (s64), align 64) 131 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[AND]](s64) 132 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY [[AND1]](s64) [all …]
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| H A D | combine-extract-vec-elt.mir | 26 %bv:_(<2 x s64>) = G_BUILD_VECTOR %arg1(s64), %arg2(s64) 27 %extract:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %zero(s32) 55 %bv:_(<2 x s64>) = G_BUILD_VECTOR %arg1(s64), %arg2(s64) 56 %extract:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %one(s32) 81 ; CHECK: %bv:_(<2 x s64>) = G_BUILD_VECTOR %arg1(s64), %arg2(s64) 88 %bv:_(<2 x s64>) = G_BUILD_VECTOR %arg1(s64), %arg2(s64) 89 %extract:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %idx(s32) 118 %bv:_(<2 x s32>) = G_BUILD_VECTOR_TRUNC %arg1(s64), %arg2(s64) 144 ; CHECK: %bv:_(<2 x s64>) = G_BUILD_VECTOR %arg1(s64), %arg2(s64) 152 %bv:_(<2 x s64>) = G_BUILD_VECTOR %arg1(s64), %arg2(s64) [all …]
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| H A D | legalize-and.mir | 15 %0:_(s64) = COPY $x0 16 %1:_(s64) = COPY $x1 17 %2:_(s8) = G_TRUNC %0(s64) 23 $x0 = COPY %5(s64) 32 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD %ptr(p0) :: (load (s64), align 16) 44 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[MV]], [[C3]](s64) 54 ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[MV1]], [[C3]](s64) 60 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY [[AND]](s64) 62 ; CHECK-NEXT: G_STORE [[COPY2]](s64), %ptr(p0) :: (store (s64), align 16) 97 ; CHECK-NEXT: G_STORE [[AND5]](s64), %ptr(p0) :: (store (s64), align 64) [all …]
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| H A D | legalize-cmpxchg-128.mir | 22 ; CHECK: [[COPY5:%[0-9]+]]:gpr64(s64) = COPY [[COPY1]](s64) 23 ; CHECK: [[COPY6:%[0-9]+]]:gpr64(s64) = COPY [[COPY2]](s64) 24 ; CHECK: [[COPY7:%[0-9]+]]:gpr64(s64) = COPY [[COPY3]](s64) 25 ; CHECK: [[COPY8:%[0-9]+]]:gpr64(s64) = COPY [[COPY4]](s64) 26 …s64), early-clobber %14:gpr64(s64), early-clobber %16:gpr32common = CMP_SWAP_128_ACQUIRE [[COPY]](… 28 ; CHECK: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES %13(s64), %14(s64) 39 ; CHECK-NOLSE-NEXT: [[COPY5:%[0-9]+]]:gpr64(s64) = COPY [[COPY1]](s64) 40 ; CHECK-NOLSE-NEXT: [[COPY6:%[0-9]+]]:gpr64(s64) = COPY [[COPY2]](s64) 43 …s64), early-clobber %14:gpr64common(s64), early-clobber %16:gpr32common = CMP_SWAP_128_ACQUIRE [[C… 67 %1:_(s128) = G_MERGE_VALUES %3(s64), %4(s64) [all …]
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| H A D | legalize-extract-vector-elt.mir | 12 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[COPY]](<2 x s64>), [[C]](s64) 17 %2:_(s64) = G_EXTRACT_VECTOR_ELT %0(<2 x s64>), %1(s32) 18 $x0 = COPY %2(s64) 31 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[ICMP]](<2 x s64>), [[COPY2]](s64) 40 $x0 = COPY %5(s64) 63 $x0 = COPY %5(s64) 137 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[COPY]](<2 x s64>), [[C]](s64) 142 %concat:_(<4 x s64>) = G_CONCAT_VECTORS %0(<2 x s64>), %1(<2 x s64>) 145 %3:_(s64) = G_EXTRACT_VECTOR_ELT %concat:_(<4 x s64>), %idxprom:_(s64) 173 %concat:_(<4 x s64>) = G_CONCAT_VECTORS %0(<2 x s64>), %1(<2 x s64>) [all …]
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| H A D | legalize-or.mir | 17 %0:_(s64) = COPY $x0 18 %1:_(s64) = COPY $x1 22 %5:_(s64) = G_ANYEXT %4 45 %0:_(s64) = COPY $x0 46 %1:_(s64) = COPY $x1 47 %2:_(s64) = COPY $x2 48 %3:_(s64) = COPY $x3 52 %7:_(s64), %8:_(s64) = G_UNMERGE_VALUES %6 81 ; CHECK-NEXT: G_STORE [[AND]](s64), %ptr(p0) :: (store (s64), align 64) 84 ; CHECK-NEXT: G_STORE [[AND1]](s64), [[PTR_ADD]](p0) :: (store (s64) into unknown-address + 8) [all …]
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| H A D | combine-copy.mir | 13 %0:_(s64) = COPY $x0 14 %1:_(s64) = COPY %0(s64) 15 $x0 = COPY %1(s64) 25 %1:_(s64) = COPY %0(s64) 26 $x0 = COPY %1(s64) 34 ; CHECK: [[COPY1:%[0-9]+]]:gpr(s64) = COPY [[COPY]](s64) 37 %1:gpr(s64) = COPY %0(s64) 38 $x0 = COPY %1(s64) 46 ; CHECK: [[COPY1:%[0-9]+]]:gpr(s64) = COPY [[COPY]](s64) 49 %1:gpr(s64) = COPY %0(s64) [all …]
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| H A D | combine-ptradd-reassociation.mir | 27 %4:_(s64) = G_CONSTANT i64 6 145 %1:_(s64) = COPY $x1 147 %3:_(s64) = G_ADD %1, %2 172 ; CHECK: G_STORE %ptr_to_int(s64), [[PTR_ADD]](p0) :: (store (s64)) 207 ; CHECK: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64) 215 %3:_(s64) = COPY $x3 246 ; CHECK: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64) 254 %3:_(s64) = COPY $x3 288 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64) 294 %2:_(s64) = COPY $x2 [all …]
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| H A D | legalize-non-pow2-load-store.mir | 55 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[C]], [[C1]](s64) 92 ; CHECK-NEXT: G_STORE [[AND]](s64), %ptr(p0) :: (store (s64)) 95 ; CHECK-NEXT: G_STORE [[AND1]](s64), [[PTR_ADD]](p0) :: (store (s64) into unknown-address + 8) 98 ; CHECK-NEXT: G_STORE [[AND2]](s64), [[PTR_ADD1]](p0) :: (store (s64) into unknown-address + 16) 101 ; CHECK-NEXT: G_STORE [[AND3]](s64), [[PTR_ADD2]](p0) :: (store (s64) into unknown-address + 24) 128 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[AND]](s64) 129 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY [[AND1]](s64) 131 ; CHECK-NEXT: G_STORE [[COPY]](s64), %ptr(p0) :: (store (s64)) 161 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[AND]](s64) 162 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY [[AND1]](s64) [all …]
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| H A D | legalizer-combiner.mir | 56 %2:_(<4 x s64>) = G_CONCAT_VECTORS %0(<2 x s64>), %1(<2 x s64>) 77 ; CHECK: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>) 78 ; CHECK: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<2 x s64>) 85 %2:_(<4 x s64>) = G_CONCAT_VECTORS %0(<2 x s64>), %1(<2 x s64>) 86 %3:_(s64), %4:_(s64), %5:_(s64), %6:_(s64) = G_UNMERGE_VALUES %2(<4 x s64>) 87 $x0 = COPY %3(s64) 88 $x1 = COPY %4(s64) 89 $x2 = COPY %5(s64) 90 $x3 = COPY %6(s64) 101 ; CHECK: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p0) :: (load (s64)) [all …]
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| H A D | legalize-constant.mir | 19 ; CHECK: $x0 = COPY [[C3]](s64) 21 ; CHECK: $x0 = COPY [[C4]](s64) 33 %4:_(s64) = G_CONSTANT i64 1 35 %5:_(s64) = G_CONSTANT i64 0 98 ; CHECK-NEXT: G_STORE [[AND]](s64), %ptr(p0) :: (store (s64), align 64) 134 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[AND]](s64) 135 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY [[AND1]](s64) 137 ; CHECK-NEXT: G_STORE [[COPY]](s64), %ptr(p0) :: (store (s64), align 32) 168 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[AND]](s64) 169 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY [[AND1]](s64) [all …]
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| H A D | legalize-usubo.mir | 21 %0:_(s64) = COPY $x0 22 %1:_(s64) = COPY $x1 23 %2:_(s64) = COPY $x2 24 %3:_(s64) = COPY $x3 28 %sub0:_(s64), %sub1:_(s64) = G_UNMERGE_VALUES %sub 55 %0:_(s64) = COPY $x0 56 %1:_(s64) = COPY $x1 57 %2:_(s64) = COPY $x2 62 %sub0:_(s64), %sub1:_(s64), %sub2:_(s64) = G_UNMERGE_VALUES %sub 96 $x0 = COPY %6(s64) [all …]
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| /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
| H A D | legalize-fmad.s64.mir | 27 %0:_(s64) = COPY $vgpr0_vgpr1 28 %1:_(s64) = COPY $vgpr2_vgpr3 29 %2:_(s64) = COPY $vgpr4_vgpr5 51 … ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>) 52 …; CHECK-NEXT: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<2 x s64… 53 …; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY2]](<2 x s64… 58 … ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[FADD]](s64), [[FADD1]](s64) 111 … ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>) 112 …; CHECK-NEXT: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<2 x s64… 113 …; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY2]](<2 x s64… [all …]
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| H A D | inst-select-fract.f64.mir | 37 %10:sgpr(s64), %13:sgpr(s64) = G_UNMERGE_VALUES %9(<2 x s64>) 39 %18:sgpr(s64) = G_LOAD %15(p1) :: (load (s64), addrspace 1) 41 %24:sgpr(s64) = G_FNEG %18 42 %25:vgpr(s64) = COPY %19(s64) 43 %26:vgpr(s64) = COPY %24(s64) 50 G_STORE %22(s64), %27(p1) :: (store (s64), addrspace 1) 87 %10:sgpr(s64), %13:sgpr(s64) = G_UNMERGE_VALUES %9(<2 x s64>) 89 %18:sgpr(s64) = G_LOAD %15(p1) :: (load (s64), addrspace 1) 93 %26:vgpr(s64) = COPY %20(s64) 94 %27:vgpr(s64) = COPY %25(s64) [all …]
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| /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/GlobalISel/ |
| H A D | irtranslator-args-lowering.ll | 17 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x3 27 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x3 36 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x3 37 ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $x4 38 ; CHECK: [[COPY2:%[0-9]+]]:_(s64) = COPY $x5 39 ; CHECK: [[COPY3:%[0-9]+]]:_(s64) = COPY $x6 40 ; CHECK: [[COPY4:%[0-9]+]]:_(s64) = COPY $x7 43 …+]]:_(<7 x s64>) = G_BUILD_VECTOR [[COPY]](s64), [[COPY1]](s64), [[COPY2]](s64), [[COPY3]](s64), [… 55 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x3 62 …+]]:_(<7 x s64>) = G_BUILD_VECTOR [[COPY]](s64), [[COPY1]](s64), [[COPY2]](s64), [[COPY3]](s64), [… [all …]
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