Home
last modified time | relevance | path

Searched refs:rtn (Results 1 – 25 of 29) sorted by relevance

12

/llvm-project-15.0.7/clang/test/CodeGenOpenCL/
H A Dbuiltins-fp-atomics-gfx90a.cl16 double *rtn;
25 half2 *rtn;
34 double *rtn;
43 double *rtn;
52 double *rtn;
61 double *rtn;
70 double *rtn;
79 double *rtn;
88 double *rtn;
97 double *rtn;
[all …]
H A Dbuiltins-amdgcn-fp-atomics-gfx908-err.cl12 double *rtn;
15 …*rtn = __builtin_amdgcn_global_atomic_fadd_f64(addr, x); // expected-error{{'__builtin_amdgcn_glob…
16 …*rtn = __builtin_amdgcn_global_atomic_fmax_f64(addr, x); // expected-error{{'__builtin_amdgcn_glob…
17 …*rtn = __builtin_amdgcn_global_atomic_fmin_f64(addr, x); // expected-error{{'__builtin_amdgcn_glob…
18 …*rtn = __builtin_amdgcn_flat_atomic_fadd_f64(addr, x); // expected-error{{'__builtin_amdgcn_flat_a…
19 …*rtn = __builtin_amdgcn_flat_atomic_fmin_f64(addr, x); // expected-error{{'__builtin_amdgcn_flat_a…
20 …*rtn = __builtin_amdgcn_flat_atomic_fmax_f64(addr, x); // expected-error{{'__builtin_amdgcn_flat_a…
H A Dbuiltins-fp-atomics-gfx1030.cl12 float *rtn;
13 *rtn = __builtin_amdgcn_ds_atomic_fadd_f32(addr, x);
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dglobal-saddr-atomics.ll149 %cast.rtn = bitcast i32 %rtn to float
190 %cast.rtn = bitcast i32 %rtn to float
227 %cast.rtn = bitcast i32 %rtn to float
287 %cast.rtn = bitcast i32 %rtn to float
342 %cast.rtn = bitcast i32 %rtn to float
641 %cast.rtn = bitcast i32 %rtn to float
678 %cast.rtn = bitcast i32 %rtn to float
933 %cast.rtn = bitcast i32 %rtn to float
970 %cast.rtn = bitcast i32 %rtn to float
1225 %cast.rtn = bitcast i32 %rtn to float
[all …]
H A Dglobal-saddr-atomics.gfx1030.ll17 %rtn = call i32 @llvm.amdgcn.global.atomic.csub.p1i32(i32 addrspace(1)* %cast.gep0, i32 %data)
18 %cast.rtn = bitcast i32 %rtn to float
19 ret float %cast.rtn
32 %rtn = call i32 @llvm.amdgcn.global.atomic.csub.p1i32(i32 addrspace(1)* %cast.gep1, i32 %data)
33 %cast.rtn = bitcast i32 %rtn to float
34 ret float %cast.rtn
H A Dllvm.amdgcn.ds.add.gs.reg.rtn.ll5 declare i32 @llvm.amdgcn.ds.add.gs.reg.rtn.i32(i32, i32 immarg)
6 declare i64 @llvm.amdgcn.ds.add.gs.reg.rtn.i64(i32, i32 immarg)
19 %unused = call i32 @llvm.amdgcn.ds.add.gs.reg.rtn.i32(i32 %arg, i32 16)
36 %res = call i32 @llvm.amdgcn.ds.add.gs.reg.rtn.i32(i32 %arg, i32 16)
52 %unused = call i64 @llvm.amdgcn.ds.add.gs.reg.rtn.i64(i32 %arg, i32 32)
69 %res = call i64 @llvm.amdgcn.ds.add.gs.reg.rtn.i64(i32 %arg, i32 32)
H A Dllvm.amdgcn.ds.sub.gs.reg.rtn.ll5 declare i32 @llvm.amdgcn.ds.sub.gs.reg.rtn.i32(i32, i32 immarg)
6 declare i64 @llvm.amdgcn.ds.sub.gs.reg.rtn.i64(i32, i32 immarg)
19 %unused = call i32 @llvm.amdgcn.ds.sub.gs.reg.rtn.i32(i32 %arg, i32 16)
36 %res = call i32 @llvm.amdgcn.ds.sub.gs.reg.rtn.i32(i32 %arg, i32 16)
52 %unused = call i64 @llvm.amdgcn.ds.sub.gs.reg.rtn.i64(i32 %arg, i32 32)
69 %res = call i64 @llvm.amdgcn.ds.sub.gs.reg.rtn.i64(i32 %arg, i32 32)
H A Dllvm.amdgcn.sendmsg.rtn.ll25 %ret = call i32 @llvm.amdgcn.s.sendmsg.rtn.i32(i32 128)
50 %ret = call i32 @llvm.amdgcn.s.sendmsg.rtn.i32(i32 129)
66 %ret = call i64 @llvm.amdgcn.s.sendmsg.rtn.i64(i32 130)
82 %ret = call i64 @llvm.amdgcn.s.sendmsg.rtn.i64(i32 131)
107 %ret = call i32 @llvm.amdgcn.s.sendmsg.rtn.i32(i32 132)
123 %ret = call i64 @llvm.amdgcn.s.sendmsg.rtn.i64(i32 133)
148 %ret = call i32 @llvm.amdgcn.s.sendmsg.rtn.i32(i32 0)
164 %ret = call i64 @llvm.amdgcn.s.sendmsg.rtn.i64(i32 99999)
169 declare i32 @llvm.amdgcn.s.sendmsg.rtn.i32(i32)
170 declare i64 @llvm.amdgcn.s.sendmsg.rtn.i64(i32)
H A Dglobal-atomics-fp-wrong-subtarget.ll26 …math-f32"="preserve-sign,preserve-sign" "target-features"="+atomic-fadd-no-rtn-insts" "amdgpu-unsa…
H A Dllvm.amdgcn.atomic.fadd.rtn_no-rtn.ll4 ; no-rtn
51 ; rtn
H A Dllvm.amdgcn.atomic.fadd.ll102 attributes #0 = { "target-cpu"="gfx803" "target-features"="+atomic-fadd-no-rtn-insts"}
/llvm-project-15.0.7/clang/test/SemaCUDA/
H A Dbuiltins-unsafe-atomics-gfx90a.cu10 float *rtn; in test_ds_atomic_add_f32() local
11 *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0); in test_ds_atomic_add_f32()
/llvm-project-15.0.7/clang/test/CodeGenCUDA/
H A Dbuiltins-unsafe-atomics-gfx90a.cu18 float *rtn; in test_ds_atomic_add_f32() local
19 *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0); in test_ds_atomic_add_f32()
/llvm-project-15.0.7/lld/test/wasm/
H A Dwrap.ll21 %rtn = call i32 @__real_foo()
22 ret i32 %rtn
/llvm-project-15.0.7/openmp/runtime/test/tasking/
H A Dkmp_taskwait_nowait.c39 size_t sz, size_t shar, entry_t rtn);
H A Dkmp_detach_tasks_t1.c60 size_t sz, size_t shar, task_entry_t rtn);
H A Dkmp_detach_tasks_t2.c61 size_t sz, size_t shar, task_entry_t rtn);
H A Dbug_taskwait_detach.cpp62 size_t shar, task_entry_t rtn);
H A Dkmp_detach_tasks_t3.c69 size_t sz, size_t shar, task_entry_t rtn);
H A Domp50_task_depend_mtx2.c75 size_t sz, size_t shar, entry_t rtn);
H A Domp50_task_depend_mtx.c75 size_t sz, size_t shar, entry_t rtn);
H A Domp51_task_dep_inoutset.c107 size_t sz, size_t shar, entry_t rtn);
H A Dkmp_task_depend_all.c117 size_t sz, size_t shar, entry_t rtn);
H A Dkmp_taskwait_depend_all.c123 size_t sz, size_t shar, entry_t rtn);
/llvm-project-15.0.7/lld/wasm/
H A DSymbolTable.cpp229 auto *rtn = replaceSymbol<DefinedData>(s, name, WASM_SYMBOL_VISIBILITY_HIDDEN); in addOptionalDataSymbol() local
230 rtn->setVA(value); in addOptionalDataSymbol()
231 rtn->referenced = true; in addOptionalDataSymbol()
232 return rtn; in addOptionalDataSymbol()

12