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/llvm-project-15.0.7/libclc/generic/lib/math/
H A Datan2pi.cl182 double res1, res2, res3, res4;
192 res3 = xneg ? res1 : res2;
194 res3 = isinf(y2) & isinf(x2) ? res3 : res4;
198 res3 = (diffexp < -56 && xneg) ? res1 : res3;
202 res3 = diffexp < -28 & xneg == 0 ? res4 : res3;
206 res3 = diffexp > 56 ? res4 : res3;
208 res3 = x2 == 0.0 ? res4 : res3; // Zero x gives +- pi/2 depending on sign of y
211 res3 = y2 == 0.0 ? res4 : res3; // Zero y gives +-0 for positive x and +-pi for negative x
212 res3 = isnan(y2) ? y2 : res3;
213 res3 = isnan(x2) ? x2 : res3;
[all …]
H A Datan2.cl199 double res1, res2, res3, res4;
209 res3 = xneg ? res1 : res2;
211 res3 = isinf(x2) & isinf(y2) ? res3 : res4;
215 res3 = (diffexp < -56 && xneg) ? res1 : res3;
219 res3 = diffexp < -28 & xneg == 0 ? res4 : res3;
223 res3 = diffexp > 56 ? res4 : res3;
225 res3 = x2 == 0.0 ? res4 : res3; // Zero x gives +- pi/2 depending on sign of y
228 res3 = y2 == 0.0 ? res4 : res3; // Zero y gives +-0 for positive x and +-pi for negative x
229 res3 = isnan(y2) ? y2 : res3;
230 res3 = isnan(x2) ? x2 : res3;
[all …]
/llvm-project-15.0.7/llvm/test/Bitcode/
H A DbinaryIntInstructions.3.2.ll16 ; CHECK-NEXT: %res3 = add i16 %x3, %x3
17 %res3 = add i16 %x3, %x3
45 ; CHECK-NEXT: %res3 = add nuw nsw <4 x i8> %x3, %x3
46 %res3 = add nuw nsw <4 x i8> %x3, %x3
65 ; CHECK-NEXT: %res3 = add nuw nsw <4 x i16> %x3, %x3
66 %res3 = add nuw nsw <4 x i16> %x3, %x3
85 ; CHECK-NEXT: %res3 = add nuw nsw <4 x i32> %x3, %x3
86 %res3 = add nuw nsw <4 x i32> %x3, %x3
106 %res3 = add nuw nsw <4 x i64> %x3, %x3
125 ; CHECK: %res3 = sub nsw i8 %x1, %x1
[all …]
H A DbinaryFloatInstructions.3.2.ll16 ; CHECK-NEXT: %res3 = fadd half %x3, %x3
17 %res3 = fadd half %x3, %x3
39 ; CHECK-NEXT: %res3 = fadd <4 x float> %x3, %x3
40 %res3 = fadd <4 x float> %x3, %x3
59 ; CHECK-NEXT: %res3 = fadd <4 x double> %x3, %x3
60 %res3 = fadd <4 x double> %x3, %x3
79 ; CHECK-NEXT: %res3 = fadd <4 x half> %x3, %x3
80 %res3 = fadd <4 x half> %x3, %x3
H A DmiscInstructions.3.2.ll81 ; CHECK-NEXT: %res3 = icmp ugt i32 %x1, %x2
82 %res3 = icmp ugt i32 %x1, %x2
123 ; CHECK-NEXT: %res3 = fcmp ugt float %x1, %x2
124 %res3 = fcmp ugt float %x1, %x2
182 ; CHECK-NEXT: %res3 = call i32 (i8*, ...) @printf(i8* %msg, i32 12, i8 42)
183 %res3 = call i32 (i8*, ...) @printf(i8* %msg, i32 12, i8 42)
H A DconstantsTest.3.2.ll29 ; CHECK-NEXT: %res3 = add i32 0, 0
30 %res3 = add i32 0, 0
50 ; CHECK-NEXT: %res3 = add <2 x i32> <i32 1, i32 1>, <i32 1, i32 1>
51 %res3 = add <2 x i32> <i32 1, i32 1>, <i32 1, i32 1>
H A DaggregateInstructions.3.2.ll17 ; CHECK-NEXT: %res3 = extractvalue [4 x [4 x i8]] %x2, 0, 1
18 %res3 = extractvalue [4 x [4 x i8 ]] %x2, 0, 1
H A DmemInstructions.3.2.ll16 ; CHECK-NEXT: %res3 = alloca i8, i32 2, align 4
17 %res3 = alloca i8, i32 2, align 4
36 ; CHECK-NEXT: %res3 = load i8, i8* %ptr1, align 1
37 %res3 = load i8, i8* %ptr1, align 1
92 ; CHECK-NEXT: %res3 = load atomic i8, i8* %ptr1 acquire, align 1
93 %res3 = load atomic i8, i8* %ptr1 acquire, align 1
236 ; CHECK-NEXT: %res3 = extractvalue { i32, i1 } [[TMP]], 0
237 %res3 = cmpxchg i32* %ptr, i32 %cmp, i32 %new syncscope("singlethread") monotonic monotonic
322 ; CHECK-NEXT: %res3 = getelementptr i8, <4 x i8*> %ptrs, <4 x i64> %offsets
323 %res3 = getelementptr i8, <4 x i8*> %ptrs, <4 x i64> %offsets
H A DbitwiseInstructions.3.2.ll16 ; CHECK: %res3 = shl nsw i8 %x1, %x1
17 %res3 = shl nsw i8 %x1, %x1
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dmerge-consecutive-loads-512.ll194 %res3 = insertelement <8 x i64> %res2, i64 0, i32 3
195 %res4 = insertelement <8 x i64> %res3, i64 %val4, i32 4
274 ret <16 x float> %res3
360 %res3 = insertelement <16 x i32> %res2, i32 0, i32 3
361 %res4 = insertelement <16 x i32> %res3, i32 0, i32 4
386 ret <16 x i32> %res3
470 %res30 = insertelement <32 x i16> %res3, i16 0, i16 30
495 ret <32 x i16> %res3
544 %res3 = insertelement <64 x i8> %res1, i8 %val3, i8 3
545 %res7 = insertelement <64 x i8> %res3, i8 %val7, i8 7
[all …]
H A Dmerge-consecutive-loads-256.ll68 ret <4 x double> %res3
152 ret <4 x double> %res3
194 %res3 = insertelement <4 x i64> %res2, i64 %val3, i32 3
195 ret <4 x i64> %res3
381 %res3 = insertelement <8 x i32> %res2, i32 0, i32 3
461 ret <16 x i16> %res3
544 %res3 = insertelement <32 x i8> %res1, i8 %val3, i8 3
545 ret <32 x i8> %res3
567 %res3 = insertelement <32 x i8> %res1, i8 %val3, i8 3
568 %resE = insertelement <32 x i8> %res3, i8 0, i8 14
[all …]
H A Davx512-rotate.ll38 %res3 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } poison, <16 x i32> %res0, 0
39 %res4 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res3, <16 x i32> %res1, 1
67 %res3 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } poison, <8 x i64> %res0, 0
68 %res4 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res3, <8 x i64> %res1, 1
96 %res3 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } poison, <16 x i32> %res0, 0
125 %res3 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } poison, <8 x i64> %res0, 0
126 %res4 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res3, <8 x i64> %res1, 1
185 %res3 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } poison, <8 x i64> %res0, 0
186 %res4 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res3, <8 x i64> %res1, 1
243 %res3 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } poison, <8 x i64> %res0, 0
[all …]
H A Davx512-intrinsics-x86_64.ll130 %res3 = add i64 %res, %res1
131 %res4 = add i64 %res3, %res2
149 %res3 = add i64 %res, %res1
150 %res4 = add i64 %res3, %res2
168 %res3 = add i64 %res, %res1
169 %res4 = add i64 %res3, %res2
187 %res3 = add i64 %res, %res1
188 %res4 = add i64 %res3, %res2
H A Davx512vl_vnni-intrinsics-upgrade.ll41 %res3 = insertvalue { <8 x i32>, <8 x i32> } %res2, <8 x i32> %res1, 1
42 ret { <8 x i32>, <8 x i32> } %res3
81 %res3 = insertvalue { <4 x i32>, <4 x i32> } %res2, <4 x i32> %res1, 1
82 ret { <4 x i32>, <4 x i32> } %res3
121 %res3 = insertvalue { <8 x i32>, <8 x i32> } %res2, <8 x i32> %res1, 1
122 ret { <8 x i32>, <8 x i32> } %res3
162 ret { <4 x i32>, <4 x i32> } %res3
202 ret { <8 x i32>, <8 x i32> } %res3
242 ret { <4 x i32>, <4 x i32> } %res3
283 ret { <8 x i32>, <8 x i32> } %res3
[all …]
H A Davx512vnni-intrinsics-upgrade.ll40 %res3 = insertvalue { <16 x i32>, <16 x i32> } %res2, <16 x i32> %res1, 1
41 ret { <16 x i32>, <16 x i32> } %res3
79 %res3 = insertvalue { <16 x i32>, <16 x i32> } %res2, <16 x i32> %res1, 1
80 ret { <16 x i32>, <16 x i32> } %res3
118 %res3 = insertvalue { <16 x i32>, <16 x i32> } %res2, <16 x i32> %res1, 1
119 ret { <16 x i32>, <16 x i32> } %res3
157 %res3 = insertvalue { <16 x i32>, <16 x i32> } %res2, <16 x i32> %res1, 1
158 ret { <16 x i32>, <16 x i32> } %res3
H A Dmerge-consecutive-loads-128.ll122 ret <4 x float> %res3
227 ret <4 x float> %res3
306 ret <4 x float> %res3
353 ret <4 x float> %res3
397 %res3 = insertelement <4 x i32> %res1, i32 %val3, i32 3
398 ret <4 x i32> %res3
454 %res3 = insertelement <4 x i32> %res1, i32 %val3, i32 3
455 ret <4 x i32> %res3
512 ret <4 x i32> %res3
1212 ret <4 x float> %res3
[all …]
H A Davx512vbmi2vl-intrinsics-upgrade.ll1184 ret { <8 x i32>, <8 x i32> } %res3
1212 ret { <2 x i64>, <2 x i64> } %res3
1240 ret { <4 x i64>, <4 x i64> } %res3
1267 ret { <8 x i16>, <8 x i16> } %res3
1359 ret { <8 x i32>, <8 x i32> } %res3
1387 ret { <2 x i64>, <2 x i64> } %res3
1415 ret { <4 x i64>, <4 x i64> } %res3
1442 ret { <8 x i16>, <8 x i16> } %res3
1509 ret { <8 x i32>, <8 x i32> } %res3
1549 ret { <4 x i32>, <4 x i32> } %res3
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/SystemZ/
H A Dlogic-miscext3.ll18 ; Z13: Cost Model: Found an estimated cost of 1 for instruction: %res3 = xor i32 %c3, -1
19 ; Z15: Cost Model: Found an estimated cost of 0 for instruction: %res3 = xor i32 %c3, -1
42 %res3 = xor i32 %c3, -1
43 store i32 %res3, i32* undef
65 ; Z13: Cost Model: Found an estimated cost of 1 for instruction: %res3 = xor i64 %c3, -1
66 ; Z15: Cost Model: Found an estimated cost of 0 for instruction: %res3 = xor i64 %c3, -1
88 %res3 = xor i64 %c3, -1
89 store i64 %res3, i64* undef
H A Dfp-arith.ll15 %res3 = fadd <2 x float> undef, undef
27 ; CHECK-Z13: Cost Model: Found an estimated cost of 8 for instruction: %res3 = fadd <2 x float> u…
28 ; CHECK-Z14: Cost Model: Found an estimated cost of 1 for instruction: %res3 = fadd <2 x float> u…
47 %res3 = fsub <2 x float> undef, undef
59 ; CHECK-Z13: Cost Model: Found an estimated cost of 8 for instruction: %res3 = fsub <2 x float> u…
60 ; CHECK-Z14: Cost Model: Found an estimated cost of 1 for instruction: %res3 = fsub <2 x float> u…
79 %res3 = fmul <2 x float> undef, undef
91 ; CHECK-Z13: Cost Model: Found an estimated cost of 8 for instruction: %res3 = fmul <2 x float> u…
92 ; CHECK-Z14: Cost Model: Found an estimated cost of 1 for instruction: %res3 = fmul <2 x float> u…
111 %res3 = fdiv <2 x float> undef, undef
[all …]
H A Dlogical.ll7 %res3 = and i64 undef, undef
28 ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %res3 = and i64 undef, undef
53 %res3 = ashr i64 undef, undef
74 ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %res3 = ashr i64 undef, undef
99 %res3 = lshr i64 undef, undef
120 ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %res3 = lshr i64 undef, undef
145 %res3 = or i64 undef, undef
166 ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %res3 = or i64 undef, undef
191 %res3 = shl i64 undef, undef
212 ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %res3 = shl i64 undef, undef
[all …]
/llvm-project-15.0.7/flang/test/Evaluate/
H A Dfold-ibits.f9010 integer, parameter :: res3(*) = [((ibits(mess,pos,len),len=0,31-pos),pos=0,31)] variable
12 logical, parameter :: test3 = all(res3 == expect3)
/llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/
H A Dasm-18.ll378 %or3 = or i32 %res3, 12345678
399 %or3 = or i32 %res3, 12345678
420 %xor3 = xor i32 %res3, 12345678
441 %xor3 = xor i32 %res3, 12345678
462 %and3 = and i32 %res3, 12345678
483 %and3 = and i32 %res3, 12345678
579 %add3 = add i32 %res3, 32767
600 %add3 = add i32 %res3, 32767
630 %add4 = add i32 %res3, 128
652 %add3 = add i32 %res3, 1000000000
[all …]
/llvm-project-15.0.7/clang/test/CodeGenOpenCL/
H A Dspirv_target.cl17 int res3[sizeof(arg) == 4 ? 1 : -1]; // expected-no-diagnostics
21 int res3[sizeof(arg) == 8 ? 1 : -1]; // expected-no-diagnostics
/llvm-project-15.0.7/llvm/test/Transforms/MergeFunc/
H A Dfold-weak.ll45 %res3 = add i32 %res, %res2
46 ret i32 %res3
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dshadow-call-stack.ll42 %res3 = call i32 @bar()
45 %res34 = add i32 %res3, %res4

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