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/llvm-project-15.0.7/polly/test/ScopInfo/
H A Dreduction_invalid_different_operators.ll30 %sth.0.reload = load i32, i32* %sth.0
31 %sum.0.reload = load i32, i32* %sum.0
33 %mul = mul nsw i32 %sth.0.reload, %sth.0.reload
34 %add1 = add nsw i32 %sth.0.reload, %mul
35 %tmp = mul i32 %sum.0.reload, 5
37 %sum.1.reload = load i32, i32* %sum.0
38 %mul3 = add i32 %sum.1.reload, 25
39 %add2 = add nsw i32 %add1, %sth.0.reload
46 %sum.0.reload.2 = load i32, i32* %sum.0
47 %sth.0.reload.2 = load i32, i32* %sth.0
[all …]
H A Dreduction_multiple_loops_array_sum_1.ll45 %sum.04.reload = load i32, i32* %sum.04.reg2mem
46 %mul = mul nsw i32 %sum.04.reload, 7
52 %sum.12.reload = load i32, i32* %sum.12.reg2mem
56 %add4 = add nsw i32 %tmp5, %sum.12.reload
H A Dscop-affine-parameter-ordering.ll17 %xFactor.0.reload = load i32, i32* undef
19 %div = udiv i32 0, %xFactor.0.reload
21 %mul = mul i32 %1, %xFactor.0.reload
/llvm-project-15.0.7/polly/test/CodeGen/
H A Dphi_scalar_simple_2.ll40 ; CHECK: store i32 %x.addr.0.phiops.reload[[R1]], i32* %x.addr.0.s2a
48 ; CHECK: %x.addr.0.s2a.reload[[R2:[0-9]*]] = load i32, i32* %x.addr.0.s2a
49 ; CHECK: store i32 %x.addr.0.s2a.reload[[R2]], i32* %x.addr.1.phiops
55 ; CHECK: store i32 %x.addr.1.s2a.reload[[R5]], i32* %x.addr.0.phiops
61 ; CHECK: %x.addr.1.phiops.reload = load i32, i32* %x.addr.1.phiops
62 ; CHECK: store i32 %x.addr.1.phiops.reload, i32* %x.addr.1.s2a
70 ; CHECK: %x.addr.1.s2a.reload = load i32, i32* %x.addr.1.s2a
71 ; CHECK: store i32 %x.addr.1.s2a.reload, i32* %x.addr.2.phiops
77 ; CHECK: %x.addr.2.phiops.reload = load i32, i32* %x.addr.2.phiops
78 ; CHECK: store i32 %x.addr.2.phiops.reload, i32* %x.addr.2.s2a
[all …]
H A Dphi_scalar_simple_1.ll36 ; CHECK: %x.addr.0.phiops.reload[[R1:[0-9]*]] = load i32, i32* %x.addr.0.phiops
37 ; CHECK: store i32 %x.addr.0.phiops.reload[[R1]], i32* %x.addr.0.s2a
45 ; CHECK: %x.addr.0.s2a.reload[[R2:[0-9]*]] = load i32, i32* %x.addr.0.s2a
46 ; CHECK: store i32 %x.addr.0.s2a.reload[[R2]], i32* %x.addr.1.phiops
51 ; CHECK: %x.addr.1.phiops.reload = load i32, i32* %x.addr.1.phiops
52 ; CHECK: store i32 %x.addr.1.phiops.reload, i32* %x.addr.1.s2a[[R6:[0-9]*]]
53 ; CHECK: store i32 %x.addr.1.phiops.reload, i32* %x.addr.1.lcssa.phiops
61 ; CHECK: %x.addr.1.s2a.reload[[R3:[0-9]*]] = load i32, i32* %x.addr.1.s2a
62 ; CHECK: %p_add = add nsw i32 %x.addr.1.s2a.reload[[R3]], %tmp1_p_scalar_
72 ; CHECK-NEXT: %x.addr.1.lcssa.phiops.reload = load i32, i32* %x.addr.1.lcssa.phiops
[all …]
H A Dphi_loop_carried_float.ll27 ; CHECK-NEXT: %tmp.0.phiops.reload[[R1:[0-9]*]] = load float, float* %tmp.0.phiops
28 ; CHECK: store float %tmp.0.phiops.reload[[R1]], float* %tmp.0.s2a
31 ; CHECK: %tmp.0.s2a.reload[[R3:[0-9]*]] = load float, float* %tmp.0.s2a
33 ; CHECK: %p_tmp[[R4:[0-9]*]] = fadd float %tmp.0.s2a.reload[[R3]], %tmp[[R5]]_p_scalar_
37 ; CHECK-NEXT: %tmp.0.phiops.reload[[R2:[0-9]*]] = load float, float* %tmp.0.phiops
38 ; CHECK: store float %tmp.0.phiops.reload[[R2]], float* %tmp.0.s2a
H A Dphi_loop_carried_float_escape.ll27 ; CHECK-NEXT: %tmp.0.phiops.reload[[R1:[0-9]*]] = load float, float* %tmp.0.phiops
28 ; CHECK-: store float %tmp.0.phiops.reload[[R1]], float* %tmp.0.s2a
31 ; CHECK: %tmp.0.s2a.reload[[R3:[0-9]*]] = load float, float* %tmp.0.s2a
33 ; CHECK: %p_tmp[[R4:[0-9]*]] = fadd float %tmp.0.s2a.reload[[R3]], %tmp[[R5]]_p_scalar_
37 ; CHECK-NEXT: %tmp.0.phiops.reload[[R2:[0-9]*]] = load float, float* %tmp.0.phiops
38 ; CHECK: store float %tmp.0.phiops.reload[[R2]], float* %tmp.0.s2a
H A Dphi_condition_modeling_2.ll18 ; CHECK: %tmp.0.phiops.reload = load i32, i32* %tmp.0.phiops
19 ; CHECK: store i32 %tmp.0.phiops.reload, i32* %tmp.0.s2a
21 ; CHECK: %tmp.0.s2a.reload = load i32, i32* %tmp.0.s2a
22 ; CHECK: store i32 %tmp.0.s2a.reload,
/llvm-project-15.0.7/llvm/test/Transforms/Coroutines/
H A Dcoro-eh-aware-edge-split-01.ll30 ; Verify that we created cleanuppads on every edge and inserted a reload of the spilled value
34 ; CHECK: %y.reload.addr = getelementptr inbounds %g.Frame, %g.Frame* %FramePtr, i32 0, i32 3
35 ; CHECK: %y.reload = load i32, i32* %y.reload.addr
40 ; CHECK: %x.reload.addr = getelementptr inbounds %g.Frame, %g.Frame* %FramePtr, i32 0, i32 2
41 ; CHECK: %x.reload = load i32, i32* %x.reload.addr
45 ; CHECK: %val = phi i32 [ %x.reload, %pad.with.phi.from.invoke1 ], [ %y.reload, %pad.with.phi.fro…
H A Dcoro-eh-aware-edge-split-02.ll30 ; Verify that we created cleanuppads on every edge and inserted a reload of the spilled value
34 ; CHECK: %y.reload.addr = getelementptr inbounds %h.Frame, %h.Frame* %FramePtr, i32 0, i32 3
35 ; CHECK: %y.reload = load i32, i32* %y.reload.addr
40 ; CHECK: %x.reload.addr = getelementptr inbounds %h.Frame, %h.Frame* %FramePtr, i32 0, i32 2
41 ; CHECK: %x.reload = load i32, i32* %x.reload.addr
45 ; CHECK: %val = phi i32 [ %x.reload, %pad.with.phi.from.invoke1 ], [ %y.reload, %pad.with.phi.fro…
H A Dcoro-catchswitch-cleanuppad.ll67 ; edge, but coro requires that PHI nodes are split up so that reload
69 ; cleanuppad which forwards to individual blocks that contain the reload
87 ; CHECK: %valueB.reload = load i32, i32* %valueB.spill.addr, align 4
91 ; CHECK: %valueA.reload = load i32, i32* %valueA.spill.addr, align 4
95 ; CHECK: %cleanupval2 = phi i32 [ %valueA.reload, %cleanup2.from.catch.dispatch.2 ], [ %valueB.re…
H A Dcoro-alloca-02.ll35 ; CHECK: %x.reload.addr = getelementptr inbounds %f.Frame, %f.Frame* %FramePtr, i32 0, i32…
36 ; CHECK: %y.reload.addr = getelementptr inbounds %f.Frame, %f.Frame* %FramePtr, i32 0, i32…
37 ; CHECK: %x.alias = bitcast i64* %x.reload.addr to i32*
38 ; CHECK: store i32* %x.alias, i32** %y.reload.addr, align 8
H A Dcoro-alloca-01.ll45 ; CHECK: %x.reload.addr = getelementptr inbounds %f.Frame, %f.Frame* %FramePtr, i32 0, i32 2
46 ; CHECK: %y.reload.addr = getelementptr inbounds %f.Frame, %f.Frame* %FramePtr, i32 0, i32 3
47 ; CHECK: %x.alias = bitcast i64* %x.reload.addr to i32*
48 ; CHECK: %y.alias = bitcast i64* %y.reload.addr to i32*
/llvm-project-15.0.7/polly/test/ScopDetect/
H A Dignore_func_flag_regex.ll40 %sum.reload = load i32, i32* %sum
42 %add = add nsw i32 %sum.reload, %mul
65 %sum.reload = load i32, i32* %sum
67 %add = add nsw i32 %sum.reload, %mul
89 %sum.reload = load i32, i32* %sum
91 %add = add nsw i32 %sum.reload, %mul
113 %sum.reload = load i32, i32* %sum
115 %add = add nsw i32 %sum.reload, %mul
H A Donly_func_flag_regex.ll46 %sum.reload = load i32, i32* %sum
48 %add = add nsw i32 %sum.reload, %mul
71 %sum.reload = load i32, i32* %sum
73 %add = add nsw i32 %sum.reload, %mul
95 %sum.reload = load i32, i32* %sum
97 %add = add nsw i32 %sum.reload, %mul
119 %sum.reload = load i32, i32* %sum
121 %add = add nsw i32 %sum.reload, %mul
H A Donly_func_flag.ll39 %sum.reload = load i32, i32* %sum
41 %add = add nsw i32 %sum.reload, %mul
64 %sum.reload = load i32, i32* %sum
66 %add = add nsw i32 %sum.reload, %mul
89 %sum.reload = load i32, i32* %sum
91 %add = add nsw i32 %sum.reload, %mul
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dswift-async-win.ll21 %.reload.addr4 = getelementptr inbounds i8, i8* %2, i64 24
22 %4 = bitcast i8* %.reload.addr4 to i8**
24 %.reload.addr = bitcast i8* %async.ctx.frameptr1 to i8**
25 %.reload = load i8*, i8** %.reload.addr, align 8
30 tail call swiftcc void @swift_task_dealloc(i8* %.reload) #4
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dscalable-cast-of-alloc.ll18 %reload = load volatile <vscale x 4 x i32>, <vscale x 4 x i32>* %cast, align 16
19 store <vscale x 4 x i32> %reload, <vscale x 4 x i32>* %out, align 16
37 %reload = load volatile <16 x i32>, <16 x i32>* %cast, align 16
38 store <16 x i32> %reload, <16 x i32>* %out, align 16
56 %reload = load volatile <vscale x 4 x i32>, <vscale x 4 x i32>* %cast, align 16
57 store <vscale x 4 x i32> %reload, <vscale x 4 x i32>* %out, align 16
75 %reload = load volatile <16 x i32>, <16 x i32>* %cast, align 16
76 store <16 x i32> %reload, <16 x i32>* %out, align 16
95 store <vscale x 16 x i32> %reload, <vscale x 16 x i32>* %out, align 16
113 store <vscale x 16 x i32> %reload, <vscale x 16 x i32>* %out, align 16
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/X86/
H A Dparallel-loops-after-reg2mem.ll20 %indvars.iv.reload = load i64, i64* %indvars.iv.reg2mem
21 %arrayidx = getelementptr inbounds i32, i32* %b, i64 %indvars.iv.reload
23 %arrayidx2 = getelementptr inbounds i32, i32* %a, i64 %indvars.iv.reload
28 %indvars.iv.next = add i64 %indvars.iv.reload, 1
35 %indvars.iv.next.reload = load i64, i64* %indvars.iv.next.reg2mem
36 %lftr.wideiv = trunc i64 %indvars.iv.next.reload to i32
/llvm-project-15.0.7/llvm/test/Feature/OperandBundles/
H A Dpr26510.ll17 ; CHECK: %reload = load i8*, i8** %a, align 8
18 ; CHECK: ret i8* %reload
25 %reload = load i8*, i8** %a, align 8
26 ret i8* %reload
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Drlwimi-dyn-and.ll7 %conv67.reload = load i32, i32* undef
12 %shl161 = shl nuw nsw i32 %conv67.reload, 15
28 %conv67.reload = load i32, i32* undef
33 %shl161 = shl nuw nsw i32 %conv67.reload, 15
H A Dfp-branch.ll5 define i1 @intcoord_cond_next55(double %tmp48.reload) {
16 %tmp57 = fcmp oge double %tmp48.reload, 1.000000e+00 ; <i1> [#uses=1]
17 %tmp58 = fcmp uno double %tmp48.reload, 1.000000e+00 ; <i1> [#uses=1]
/llvm-project-15.0.7/llvm/lib/DebugInfo/PDB/Native/
H A DPDBFile.cpp268 if (auto EC = TempGlobals->reload()) in getPDBGlobalsStream()
281 if (auto EC = TempInfo->reload()) in getPDBInfoStream()
294 if (auto EC = TempDbi->reload(this)) in getPDBDbiStream()
307 if (auto EC = TempTpi->reload()) in getPDBTpiStream()
323 if (auto EC = TempIpi->reload()) in getPDBIpiStream()
341 if (auto EC = TempPublics->reload()) in getPDBPublicsStream()
360 if (auto EC = TempSymbols->reload()) in getPDBSymbolStream()
375 if (auto EC = N->reload(Reader)) in getStringTable()
395 if (auto EC = IJ->reload(*Strings)) in getInjectedSourceStream()
/llvm-project-15.0.7/polly/test/DependenceInfo/
H A Dreduction_multiple_loops_array_sum_3.ll43 %sum.04.reload = load i32, i32* %sum.04.reg2mem
44 %mul = shl nsw i32 %sum.04.reload, 1
50 %sum.12.reload = load i32, i32* %sum.12.reg2mem
54 %add4 = add nsw i32 %tmp5, %sum.12.reload
/llvm-project-15.0.7/polly/test/CodeGen/MemAccess/
H A Dmap_scalar_access.ll124 ; CODEGEN-NEXT: %polly.access.A[[R1]].reload = load double, double* %polly.access.A[[R1]]
126 ; CODEGEN-NEXT: store double %polly.access.A[[R1]].reload, double* %polly.access.A[[R2]]
131 ; CODEGEN-NEXT: %polly.access.A[[R3]].reload = load double, double* %polly.access.A[[R3]]
133 ; CODEGEN-NEXT: store double %polly.access.A[[R3]].reload, double* %polly.access.A[[R4]]
138 ; CODEGEN-NEXT: %polly.access.A[[R5]].reload = load double, double* %polly.access.A[[R5]]
139 ; CODEGEN-NEXT: %p_add = fadd double %polly.access.A13.reload, 4.200000e+00
146 ; CODEGEN-NEXT: %polly.access.A[[R7]].reload = load double, double* %polly.access.A[[R7]]
148 ; CODEGEN-NEXT: store double %polly.access.A[[R7]].reload, double* %polly.access.A[[R8]]

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