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/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Dconvert-rr-to-ri-p9-vector.mir14 - { id: 1, class: g8rc, preferred-register: '' }
16 - { id: 3, class: gprc, preferred-register: '' }
17 - { id: 4, class: g8rc, preferred-register: '' }
18 - { id: 5, class: g8rc, preferred-register: '' }
19 - { id: 6, class: g8rc, preferred-register: '' }
20 - { id: 7, class: vssrc, preferred-register: '' }
21 - { id: 8, class: gprc, preferred-register: '' }
22 - { id: 9, class: g8rc, preferred-register: '' }
23 - { id: 10, class: g8rc, preferred-register: '' }
24 - { id: 11, class: g8rc, preferred-register: '' }
[all …]
H A Dconvert-rr-to-ri-instrs.mir1022 - { id: 0, class: g8rc, preferred-register: '' }
1023 - { id: 1, class: g8rc, preferred-register: '' }
1024 - { id: 2, class: gprc, preferred-register: '' }
1025 - { id: 3, class: gprc, preferred-register: '' }
1027 - { id: 5, class: gprc, preferred-register: '' }
1028 - { id: 6, class: g8rc, preferred-register: '' }
1081 - { id: 0, class: g8rc, preferred-register: '' }
1082 - { id: 1, class: g8rc, preferred-register: '' }
1084 - { id: 3, class: g8rc, preferred-register: '' }
1134 - { id: 0, class: g8rc, preferred-register: '' }
[all …]
H A Dpeephole-phi-acc.mir183 - { id: 3, class: g8rc, preferred-register: '' }
184 - { id: 4, class: vrrc, preferred-register: '' }
186 - { id: 6, class: gprc, preferred-register: '' }
187 - { id: 7, class: accrc, preferred-register: '' }
188 - { id: 8, class: crrc, preferred-register: '' }
189 - { id: 9, class: vsrc, preferred-register: '' }
296 - { id: 2, class: g8rc, preferred-register: '' }
297 - { id: 3, class: vrrc, preferred-register: '' }
300 - { id: 6, class: gprc, preferred-register: '' }
301 - { id: 7, class: crrc, preferred-register: '' }
[all …]
H A Daix-p8vector-liveins.ll21 ; POWR8: - { id: 0, class: vssrc, preferred-register: '' }
22 ; POWR8: - { id: 1, class: vssrc, preferred-register: '' }
23 ; POWR8: - { id: 2, class: vssrc, preferred-register: '' }
24 ; POWR8: - { id: 3, class: vssrc, preferred-register: '' }
25 ; POWR8: - { id: 4, class: vssrc, preferred-register: '' }
26 ; POWR8: - { id: 5, class: vssrc, preferred-register: '' }
27 ; POWR8: - { id: 6, class: vssrc, preferred-register: '' }
28 ; POWR8: - { id: 7, class: vssrc, preferred-register: '' }
29 ; POWR8: - { id: 8, class: vssrc, preferred-register: '' }
43 ; NOP8V: - { id: 0, class: f4rc, preferred-register: '' }
[all …]
H A Dphi-eliminate.mir47 - { id: 1, class: gprc, preferred-register: '' }
49 - { id: 3, class: g8rc, preferred-register: '' }
50 - { id: 4, class: gprc, preferred-register: '' }
51 - { id: 5, class: g8rc, preferred-register: '' }
52 - { id: 6, class: g8rc, preferred-register: '' }
53 - { id: 7, class: g8rc, preferred-register: '' }
54 - { id: 8, class: gprc, preferred-register: '' }
55 - { id: 9, class: gprc, preferred-register: '' }
56 - { id: 10, class: g8rc, preferred-register: '' }
57 - { id: 11, class: gprc, preferred-register: '' }
[all …]
H A Dconvert-rr-to-ri-instrs-out-of-range.mir223 - { id: 0, class: g8rc, preferred-register: '' }
224 - { id: 1, class: gprc, preferred-register: '' }
225 - { id: 2, class: gprc, preferred-register: '' }
226 - { id: 3, class: g8rc, preferred-register: '' }
227 - { id: 4, class: gprc, preferred-register: '' }
275 - { id: 0, class: g8rc, preferred-register: '' }
276 - { id: 1, class: g8rc, preferred-register: '' }
277 - { id: 2, class: g8rc, preferred-register: '' }
323 - { id: 0, class: g8rc, preferred-register: '' }
324 - { id: 1, class: g8rc, preferred-register: '' }
[all …]
H A Dremove-copy-crunsetcrbit.mir58 - { id: 0, class: crbitrc, preferred-register: '' }
62 - { id: 4, class: gprc, preferred-register: '' }
63 - { id: 5, class: crrc, preferred-register: '' }
65 - { id: 7, class: gprc, preferred-register: '' }
66 - { id: 8, class: crrc, preferred-register: '' }
70 - { id: 12, class: g8rc, preferred-register: '' }
73 - { id: 15, class: g8rc, preferred-register: '' }
74 - { id: 16, class: gprc, preferred-register: '' }
75 - { id: 17, class: crrc, preferred-register: '' }
79 - { id: 21, class: gprc, preferred-register: '' }
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/X86/GlobalISel/
H A Dselect-add-v256.mir33 # AVX2-NEXT: - { id: 0, class: vr256, preferred-register: '' }
34 # AVX2-NEXT: - { id: 1, class: vr256, preferred-register: '' }
35 # AVX2-NEXT: - { id: 2, class: vr256, preferred-register: '' }
38 # AVX512VL-NEXT: - { id: 0, class: vr256, preferred-register: '' }
39 # AVX512VL-NEXT: - { id: 1, class: vr256, preferred-register: '' }
40 # AVX512VL-NEXT: - { id: 2, class: vr256, preferred-register: '' }
43 # AVX512BWVL-NEXT: - { id: 0, class: vr256x, preferred-register: '' }
44 # AVX512BWVL-NEXT: - { id: 1, class: vr256x, preferred-register: '' }
45 # AVX512BWVL-NEXT: - { id: 2, class: vr256x, preferred-register: '' }
73 # AVX2-NEXT: - { id: 0, class: vr256, preferred-register: '' }
[all …]
H A Dselect-copy.mir41 - { id: 0, class: gpr, preferred-register: '' }
42 - { id: 1, class: gpr, preferred-register: '' }
67 - { id: 0, class: gpr, preferred-register: '' }
68 - { id: 1, class: gpr, preferred-register: '' }
95 - { id: 0, class: gpr, preferred-register: '' }
96 - { id: 1, class: gpr, preferred-register: '' }
97 - { id: 2, class: gpr, preferred-register: '' }
127 - { id: 0, class: gpr, preferred-register: '' }
128 - { id: 1, class: gpr, preferred-register: '' }
129 - { id: 2, class: gpr, preferred-register: '' }
[all …]
H A Dselect-add-v128.mir35 # NOVL-NEXT: - { id: 0, class: vr128, preferred-register: '' }
36 # NOVL-NEXT: - { id: 1, class: vr128, preferred-register: '' }
37 # NOVL-NEXT: - { id: 2, class: vr128, preferred-register: '' }
40 # AVX512VL-NEXT: - { id: 0, class: vr128, preferred-register: '' }
41 # AVX512VL-NEXT: - { id: 1, class: vr128, preferred-register: '' }
42 # AVX512VL-NEXT: - { id: 2, class: vr128, preferred-register: '' }
45 # AVX512BWVL-NEXT: - { id: 0, class: vr128x, preferred-register: '' }
46 # AVX512BWVL-NEXT: - { id: 1, class: vr128x, preferred-register: '' }
77 # NOVL-NEXT: - { id: 0, class: vr128, preferred-register: '' }
78 # NOVL-NEXT: - { id: 1, class: vr128, preferred-register: '' }
[all …]
H A Dlegalize-ashr-scalar.mir15 - { id: 0, class: _, preferred-register: '' }
16 - { id: 1, class: _, preferred-register: '' }
17 - { id: 2, class: _, preferred-register: '' }
18 - { id: 3, class: _, preferred-register: '' }
19 - { id: 4, class: _, preferred-register: '' }
20 - { id: 5, class: _, preferred-register: '' }
21 - { id: 6, class: _, preferred-register: '' }
22 - { id: 7, class: _, preferred-register: '' }
23 - { id: 8, class: _, preferred-register: '' }
24 - { id: 9, class: _, preferred-register: '' }
[all …]
H A Dlegalize-lshr-scalar.mir15 - { id: 0, class: _, preferred-register: '' }
16 - { id: 1, class: _, preferred-register: '' }
17 - { id: 2, class: _, preferred-register: '' }
18 - { id: 3, class: _, preferred-register: '' }
19 - { id: 4, class: _, preferred-register: '' }
20 - { id: 5, class: _, preferred-register: '' }
21 - { id: 6, class: _, preferred-register: '' }
22 - { id: 7, class: _, preferred-register: '' }
23 - { id: 8, class: _, preferred-register: '' }
24 - { id: 9, class: _, preferred-register: '' }
[all …]
H A Dlegalize-shl-scalar.mir15 - { id: 0, class: _, preferred-register: '' }
16 - { id: 1, class: _, preferred-register: '' }
17 - { id: 2, class: _, preferred-register: '' }
18 - { id: 3, class: _, preferred-register: '' }
19 - { id: 4, class: _, preferred-register: '' }
20 - { id: 5, class: _, preferred-register: '' }
21 - { id: 6, class: _, preferred-register: '' }
22 - { id: 7, class: _, preferred-register: '' }
23 - { id: 8, class: _, preferred-register: '' }
24 - { id: 9, class: _, preferred-register: '' }
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/mirparser/
H A Dtarget-flags-static-tls.mir60 - { id: 0, class: gpr32, preferred-register: '' }
61 - { id: 1, class: gpr32, preferred-register: '' }
62 - { id: 2, class: gpr32, preferred-register: '' }
63 - { id: 3, class: gpr32, preferred-register: '' }
64 - { id: 4, class: gpr32, preferred-register: '' }
65 - { id: 5, class: gpr64, preferred-register: '' }
66 - { id: 6, class: gpr32, preferred-register: '' }
67 - { id: 7, class: gpr32, preferred-register: '' }
68 - { id: 8, class: gpr32, preferred-register: '' }
69 - { id: 9, class: gpr64, preferred-register: '' }
[all …]
H A Dtarget-flags-pic-mxgot-tls.mir61 - { id: 0, class: gpr32, preferred-register: '' }
62 - { id: 1, class: gpr32, preferred-register: '' }
63 - { id: 2, class: gpr32, preferred-register: '' }
64 - { id: 3, class: gpr32, preferred-register: '' }
65 - { id: 4, class: gpr32, preferred-register: '' }
66 - { id: 5, class: gpr64, preferred-register: '' }
67 - { id: 6, class: gpr64, preferred-register: '' }
68 - { id: 7, class: gpr64, preferred-register: '' }
69 - { id: 8, class: gpr64, preferred-register: '' }
70 - { id: 9, class: gpr64, preferred-register: '' }
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dearly-ifcvt-same-value.mir8 - { id: 0, class: fpr32, preferred-register: '' }
9 - { id: 1, class: fpr32, preferred-register: '' }
10 - { id: 2, class: fpr32, preferred-register: '' }
11 - { id: 3, class: fpr32, preferred-register: '' }
12 - { id: 4, class: fpr32, preferred-register: '' }
14 - { id: 6, class: gpr32, preferred-register: '' }
15 - { id: 7, class: fpr32, preferred-register: '' }
16 - { id: 8, class: fpr32, preferred-register: '' }
63 - { id: 0, class: fpr32, preferred-register: '' }
64 - { id: 1, class: fpr32, preferred-register: '' }
[all …]
H A Dregalloc-last-chance-recolor-with-split.mir93 - { id: 0, class: gpr32, preferred-register: '' }
94 - { id: 1, class: gpr64, preferred-register: '' }
95 - { id: 2, class: gpr32, preferred-register: '' }
96 - { id: 3, class: gpr32, preferred-register: '' }
98 - { id: 5, class: gpr64sp, preferred-register: '' }
106 - { id: 13, class: gpr32, preferred-register: '' }
127 - { id: 34, class: gpr64, preferred-register: '' }
131 - { id: 38, class: gpr64, preferred-register: '' }
132 - { id: 39, class: gpr32, preferred-register: '' }
133 - { id: 40, class: gpr64, preferred-register: '' }
[all …]
H A Dearly-ifcvt-regclass-mismatch.mir60 - { id: 0, class: gpr32, preferred-register: '' }
61 - { id: 1, class: _, preferred-register: '' }
62 - { id: 2, class: _, preferred-register: '' }
63 - { id: 3, class: gpr, preferred-register: '' }
64 - { id: 4, class: gpr64, preferred-register: '' }
65 - { id: 5, class: fpr, preferred-register: '' }
66 - { id: 6, class: _, preferred-register: '' }
72 - { id: 12, class: fpr, preferred-register: '' }
74 - { id: 14, class: fpr, preferred-register: '' }
76 - { id: 16, class: _, preferred-register: '' }
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/GlobalISel/
H A Darm-regbankselect.mir112 # CHECK: - { id: 0, class: gprb, preferred-register: '' }
113 # CHECK: - { id: 1, class: gprb, preferred-register: '' }
114 # CHECK: - { id: 2, class: gprb, preferred-register: '' }
138 # CHECK: - { id: 0, class: gprb, preferred-register: '' }
139 # CHECK: - { id: 1, class: gprb, preferred-register: '' }
140 # CHECK: - { id: 2, class: gprb, preferred-register: '' }
164 # CHECK: - { id: 0, class: gprb, preferred-register: '' }
165 # CHECK: - { id: 1, class: gprb, preferred-register: '' }
166 # CHECK: - { id: 2, class: gprb, preferred-register: '' }
190 # CHECK: - { id: 0, class: gprb, preferred-register: '' }
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Ddomain-reassignment.mir59 - { id: 0, class: gr8, preferred-register: '' }
60 - { id: 1, class: gr8, preferred-register: '' }
61 - { id: 2, class: gr8, preferred-register: '' }
62 - { id: 3, class: gr32, preferred-register: '' }
63 - { id: 4, class: gr64, preferred-register: '' }
65 - { id: 6, class: fr32x, preferred-register: '' }
66 - { id: 7, class: fr32x, preferred-register: '' }
67 - { id: 8, class: fr32x, preferred-register: '' }
70 - { id: 11, class: gr8, preferred-register: '' }
71 - { id: 12, class: vk1, preferred-register: '' }
[all …]
/llvm-project-15.0.7/compiler-rt/lib/sanitizer_common/
H A Dsanitizer_syscall_linux_loongarch64.inc14 // About local register variables:
27 register u64 a7 asm("a7") = nr;
28 register u64 a0 asm("a0");
38 register u64 a7 asm("a7") = nr;
39 register u64 a0 asm("a0") = arg1;
49 register u64 a7 asm("a7") = nr;
50 register u64 a0 asm("a0") = arg1;
62 register u64 a7 asm("a7") = nr;
77 register u64 a7 asm("a7") = nr;
93 register u64 a7 asm("a7") = nr;
[all …]
H A Dsanitizer_syscall_linux_hexagon.inc37 register u32 r6 __asm__("r6") = n;
38 register u32 r0 __asm__("r0");
45 register u32 r6 __asm__("r6") = n;
46 register u32 r0 __asm__("r0") = a;
54 register u32 r6 __asm__("r6") = n;
55 register u32 r0 __asm__("r0") = a;
56 register u32 r1 __asm__("r1") = b;
64 register u32 r6 __asm__("r6") = n;
65 register u32 r0 __asm__("r0") = a;
66 register u32 r1 __asm__("r1") = b;
[all …]
H A Dsanitizer_syscall_linux_aarch64.inc16 register u64 x8 asm("x8") = nr;
17 register u64 x0 asm("x0");
28 register u64 x8 asm("x8") = nr;
29 register u64 x0 asm("x0") = arg1;
40 register u64 x8 asm("x8") = nr;
41 register u64 x0 asm("x0") = arg1;
42 register u64 x1 asm("x1") = arg2;
53 register u64 x8 asm("x8") = nr;
68 register u64 x8 asm("x8") = nr;
84 register u64 x8 asm("x8") = nr;
[all …]
H A Dsanitizer_syscall_linux_arm.inc16 register u32 r8 asm("r7") = nr;
17 register u32 r0 asm("r0");
28 register u32 r8 asm("r7") = nr;
29 register u32 r0 asm("r0") = arg1;
40 register u32 r8 asm("r7") = nr;
41 register u32 r0 asm("r0") = arg1;
42 register u32 r1 asm("r1") = arg2;
53 register u32 r8 asm("r7") = nr;
68 register u32 r8 asm("r7") = nr;
84 register u32 r8 asm("r7") = nr;
[all …]
H A Dsanitizer_syscall_linux_riscv64.inc13 // About local register variables:
34 register u64 a7 asm("a7") = nr;
35 register u64 a0 asm("a0");
45 register u64 a7 asm("a7") = nr;
46 register u64 a0 asm("a0") = arg1;
56 register u64 a7 asm("a7") = nr;
69 register u64 a7 asm("a7") = nr;
84 register u64 a7 asm("a7") = nr;
100 register u64 a7 asm("a7") = nr;
118 register u64 a7 asm("a7") = nr;
[all …]

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