| /llvm-project-15.0.7/llvm/docs/AMDGPU/ |
| H A D | AMDGPUAsmGFX7.rst | 265 …ref:`vdst<amdgpu_synid_gfx7_vdst_0c25a6>`, :ref:`vaddr<amdgpu_synid_gfx7_vaddr_e9b690>`, :r… 266 …ref:`vdst<amdgpu_synid_gfx7_vdst_0c25a6>`, :ref:`vaddr<amdgpu_synid_gfx7_vaddr_e9b690>`, :r… 267 …ref:`vdst<amdgpu_synid_gfx7_vdst_0c25a6>`, :ref:`vaddr<amdgpu_synid_gfx7_vaddr_e9b690>`, :r… 268 …ref:`vdst<amdgpu_synid_gfx7_vdst_0c25a6>`, :ref:`vaddr<amdgpu_synid_gfx7_vaddr_e9b690>`, :r… 269 …ref:`vdst<amdgpu_synid_gfx7_vdst_0c25a6>`, :ref:`vaddr<amdgpu_synid_gfx7_vaddr_e9b690>`, :r… 270 …ref:`vdst<amdgpu_synid_gfx7_vdst_0c25a6>`, :ref:`vaddr<amdgpu_synid_gfx7_vaddr_e9b690>`, :r… 271 …ref:`vdst<amdgpu_synid_gfx7_vdst_0c25a6>`, :ref:`vaddr<amdgpu_synid_gfx7_vaddr_e9b690>`, :r… 272 …ref:`vdst<amdgpu_synid_gfx7_vdst_0c25a6>`, :ref:`vaddr<amdgpu_synid_gfx7_vaddr_e9b690>`, :r… 273 …ref:`vdst<amdgpu_synid_gfx7_vdst_0c25a6>`, :ref:`vaddr<amdgpu_synid_gfx7_vaddr_e9b690>`, :r… 274 …ref:`vdst<amdgpu_synid_gfx7_vdst_0c25a6>`, :ref:`vaddr<amdgpu_synid_gfx7_vaddr_e9b690>`, :r… [all …]
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| H A D | AMDGPUAsmGFX10.rst | 612 …ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :re… 617 …ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :re… 618 …ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :re… 619 …ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :re… 620 …ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :re… 621 …ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :re… 622 …ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :re… 623 …ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :re… 624 …ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :re… 625 …ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :re… [all …]
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| H A D | AMDGPUAsmGFX9.rst | 383 …ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`, :r… 385 …ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`, :r… 386 …ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`, :r… 388 …ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`, :r… 389 …ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`, :r… 390 …ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`, :r… 391 …ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`, :r… 392 …ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`, :r… 393 …ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`, :r… 394 …ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`, :r… [all …]
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| H A D | AMDGPUAsmGFX90a.rst | 307 …ref:`vdata<amdgpu_synid_gfx90a_vdata_af2725>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amd… 308 …ref:`vdata<amdgpu_synid_gfx90a_vdata_af2725>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amd… 309 …ref:`vdata<amdgpu_synid_gfx90a_vdata_ca6e5f>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amd… 310 …ref:`vdata<amdgpu_synid_gfx90a_vdata_af2725>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amd… 311 …ref:`vdata<amdgpu_synid_gfx90a_vdata_af2725>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amd… 312 …ref:`vdata<amdgpu_synid_gfx90a_vdata_af2725>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amd… 321 …ref:`vdst<amdgpu_synid_gfx90a_vdst_7c9848>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, … 322 …ref:`vdst<amdgpu_synid_gfx90a_vdst_7c9848>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, … 327 …ref:`vdst<amdgpu_synid_gfx90a_vdst_7c9848>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, … 328 …ref:`vdata<amdgpu_synid_gfx90a_vdata_a5f23e>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`,… [all …]
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| H A D | AMDGPUAsmGFX1030.rst | 591 …ref:`vdst<amdgpu_synid_gfx1030_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx1030_vaddr_cdc744>`, … 596 …ref:`vdst<amdgpu_synid_gfx1030_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx1030_vaddr_cdc744>`, … 597 …ref:`vdst<amdgpu_synid_gfx1030_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx1030_vaddr_cdc744>`, … 598 …ref:`vdst<amdgpu_synid_gfx1030_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx1030_vaddr_cdc744>`, … 599 …ref:`vdst<amdgpu_synid_gfx1030_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx1030_vaddr_cdc744>`, … 600 …ref:`vdst<amdgpu_synid_gfx1030_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx1030_vaddr_cdc744>`, … 601 …ref:`vdst<amdgpu_synid_gfx1030_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx1030_vaddr_cdc744>`, … 602 …ref:`vdst<amdgpu_synid_gfx1030_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx1030_vaddr_cdc744>`, … 603 …ref:`vdst<amdgpu_synid_gfx1030_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx1030_vaddr_cdc744>`, … 604 …ref:`vdst<amdgpu_synid_gfx1030_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx1030_vaddr_cdc744>`, … [all …]
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| H A D | AMDGPUAsmGFX8.rst | 263 …ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :r… 264 …ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :r… 265 …ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :r… 266 …ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :r… 267 …ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :r… 268 …ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :r… 269 …ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :r… 270 …ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :r… 271 …ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :r… 272 …ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :r… [all …]
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| H A D | AMDGPUAsmGFX940.rst | 325 …ref:`vdst<amdgpu_synid_gfx940_vdst_d0c0cb>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:… 326 …ref:`vdst<amdgpu_synid_gfx940_vdst_d0c0cb>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:… 327 …ref:`vdst<amdgpu_synid_gfx940_vdst_d8236e>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:… 328 …ref:`vdst<amdgpu_synid_gfx940_vdst_d8236e>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:… 329 …ref:`vdst<amdgpu_synid_gfx940_vdst_d0c0cb>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:… 330 …ref:`vdst<amdgpu_synid_gfx940_vdst_d8236e>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:… 331 …ref:`vdst<amdgpu_synid_gfx940_vdst_e2898f>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:… 332 …ref:`vdst<amdgpu_synid_gfx940_vdst_a32035>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:… 333 …ref:`vdata<amdgpu_synid_gfx940_vdata_be4895>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :re… 334 …ref:`vdata<amdgpu_synid_gfx940_vdata_be4895>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :re… [all …]
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| H A D | AMDGPUAsmGFX908.rst | 53 …ref:`vdata<amdgpu_synid_gfx908_vdata_fe1edf>`, :ref:`vaddr<amdgpu_synid_gfx908_vaddr_b73dc0>`, … 54 …ref:`vdata<amdgpu_synid_gfx908_vdata_fe1edf>`, :ref:`vaddr<amdgpu_synid_gfx908_vaddr_b73dc0>`, … 76 …ref:`vdst<amdgpu_synid_gfx908_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx908_src_d578c4>`::ref:`… 104 …ref:`vdst<amdgpu_synid_gfx908_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx908_src_4e78e6>`::r… 105 …ref:`vdst<amdgpu_synid_gfx908_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx908_src_4e78e6>`::r… 106 …ref:`vdst<amdgpu_synid_gfx908_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx908_src_4e78e6>`::r… 107 …ref:`vdst<amdgpu_synid_gfx908_vdst_bcee7a>`::ref:`f32x4<amdgpu_synid_gfx908_type_deviation>`, :re… 108 …ref:`vdst<amdgpu_synid_gfx908_vdst_0c4ef8>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>`, :re… 109 …ref:`vdst<amdgpu_synid_gfx908_vdst_0c4ef8>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>`, :re… 110 …ref:`vdst<amdgpu_synid_gfx908_vdst_0c4ef8>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>`, :re… [all …]
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| H A D | AMDGPUAsmGFX906.rst | 44 …ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx906_vsrc>`::ref:`m<amdgpu_sy… 46 …ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx906_vsrc>`, :ref:`vsrc1<a… 47 …ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src_1>`::ref:`m<amdgpu_sy… 56 …ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src_2>`::ref:`m<amdgpu_sy… 66 …ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src_2>`::ref:`f16x2<amdgpu… 67 …ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src_3>`::ref:`i16x2<amdgpu… 68 …ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src_3>`::ref:`u16x2<amdgpu… 69 …ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src_2>`::ref:`i8x4<amdgpu_… 73 …ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src_2>`::ref:`m<amdgpu_syn… 74 …ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src_2>`::ref:`m<amdgpu_syn… [all …]
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| H A D | AMDGPUAsmGFX1011.rst | 43 …ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx1011_vsrc>`::ref:`f16x2<amdg… 44 …ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx1011_vsrc>`::ref:`i8x4<amdgp… 53 …ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx1011_vsrc>`::ref:`f16x2<amd… 54 …ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx1011_vsrc>`::ref:`i8x4<amdg… 73 …ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`src0<amdgpu_synid_gfx1011_src>`::ref:`f16x2<amdgp… 74 …ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`src0<amdgpu_synid_gfx1011_src_2>`::ref:`i16x2<amd… 75 …ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`src0<amdgpu_synid_gfx1011_src_2>`::ref:`u16x2<amd… 76 …ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`src0<amdgpu_synid_gfx1011_src>`::ref:`i8x4<amdgpu… 77 …ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`src0<amdgpu_synid_gfx1011_src>`::ref:`u8x4<amdgpu… 78 …ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`src0<amdgpu_synid_gfx1011_src>`::ref:`i4x8<amdgpu… [all …]
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| H A D | AMDGPUAsmGFX904.rst | 25 Notation used in this document is explained :ref:`here<amdgpu_syn_instruction_notation>`. 30 An overview of generic syntax and other features of AMDGPU instructions may be found :ref:`in this … 43 …ref:`vdst<amdgpu_synid_gfx904_vdst>`, :ref:`src0<amdgpu_synid_gfx904_src>`::ref:`m<amdgpu_syni… 44 …ref:`vdst<amdgpu_synid_gfx904_vdst>`, :ref:`src0<amdgpu_synid_gfx904_src>`::ref:`m<amdgpu_syni… 45 …ref:`vdst<amdgpu_synid_gfx904_vdst>`, :ref:`src0<amdgpu_synid_gfx904_src>`::ref:`m<amdgpu_syni…
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| H A D | AMDGPUAsmGFX900.rst | 25 Notation used in this document is explained :ref:`here<amdgpu_syn_instruction_notation>`. 30 An overview of generic syntax and other features of AMDGPU instructions may be found :ref:`in this … 43 …ref:`vdst<amdgpu_synid_gfx900_vdst>`, :ref:`src0<amdgpu_synid_gfx900_src>`::ref:`m<amdgpu_syni… 44 …ref:`vdst<amdgpu_synid_gfx900_vdst>`, :ref:`src0<amdgpu_synid_gfx900_src>`::ref:`m<amdgpu_syni… 45 …ref:`vdst<amdgpu_synid_gfx900_vdst>`, :ref:`src0<amdgpu_synid_gfx900_src>`::ref:`m<amdgpu_syni…
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| H A D | AMDGPUAsmGFX1013.rst | 25 Notation used in this document is explained :ref:`here<amdgpu_syn_instruction_notation>`. 30 An overview of generic syntax and other features of AMDGPU instructions may be found :ref:`in this … 43 …ref:`vdst<amdgpu_synid_gfx1013_vdst_f8490d>`, :ref:`vaddr<amdgpu_synid_gfx1013_vaddr_49d53a>`, … 44 …ref:`vdst<amdgpu_synid_gfx1013_vdst_f8490d>`, :ref:`vaddr<amdgpu_synid_gfx1013_vaddr_49d53a>`, … 45 …ref:`vdst<amdgpu_synid_gfx1013_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx1013_vaddr_cdc744>`, …
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| H A D | gfx9_src_089570.rst | 17 …ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`,…
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| H A D | gfx8_src_2dcf49.rst | 17 …ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`,…
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| H A D | gfx8_src_8a6ea8.rst | 17 …ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`,…
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| H A D | gfx908_src_955b45.rst | 17 …ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`,…
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| /llvm-project-15.0.7/clang/test/CodeGenCUDA/ |
| H A D | lambda-reference-var.cu | 27 [=](){ *out = ref;}(); in dev_capture_dev_ref_by_copy() 47 [&](){ ref++; *out = ref;}(); in dev_capture_dev_ref_by_ref() 58 ref++; in dev_ref() 59 *out = ref; in dev_ref() 71 ref++; in dev_lambda_ref() 72 *out = ref; in dev_lambda_ref() 94 [&](){ ref++; *out = ref;}(); in host_capture_host_ref_by_ref() 105 ref++; in host_ref() 106 *out = ref; in host_ref() 118 ref++; in host_lambda_ref() [all …]
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| /llvm-project-15.0.7/flang/test/Fir/ |
| H A D | boxproc.fir | 30 …%2 = fir.coordinate_of %1, %c0_i32 : (!fir.ref<tuple<!fir.ref<i32>>>, i32) -> !fir.llvm_ptr<!fir.r… 33 …r.address_of(@_QFtest_proc_dummyPtest_proc_dummy_a) : (!fir.ref<i32>, !fir.ref<tuple<!fir.ref<i32>… 34 …%4 = fir.emboxproc %3, %1 : ((!fir.ref<i32>, !fir.ref<tuple<!fir.ref<i32>>>) -> (), !fir.ref<tuple… 37 %6 = fir.convert %5 : (!fir.ref<!fir.char<1,8>>) -> !fir.ref<i8> 46 …%0 = fir.coordinate_of %arg1, %c0_i32 : (!fir.ref<tuple<!fir.ref<i32>>>, i32) -> !fir.llvm_ptr<!fi… 168 %8 = fir.convert %1 : (!fir.ref<!fir.char<1,10>>) -> !fir.ref<i8> 169 %9 = fir.convert %6 : (!fir.ref<!fir.char<1,9>>) -> !fir.ref<i8> 186 %20 = fir.convert %19 : (!fir.ref<!fir.char<1,8>>) -> !fir.ref<i8> 195 %29 = fir.convert %0 : (!fir.ref<!fir.char<1,40>>) -> !fir.ref<i8> 216 %7 = fir.convert %3 : (!fir.ref<!fir.char<1,?>>) -> !fir.ref<i8> [all …]
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| H A D | target-rewrite-complex16.fir | 60 … %[[VAL_9:.*]] = fir.convert %[[VAL_0]] : (!fir.ref<tuple<!fir.real<16>, !fir.real<16>>>) -> !fi… 69 … %[[VAL_1:.*]] = fir.convert %[[VAL_0]] : (!fir.ref<tuple<!fir.real<16>, !fir.real<16>>>) -> !fi… 73 …: %[[VAL_4:.*]] = fir.convert %[[VAL_3]] : (!fir.ref<!fir.complex<16>>) -> !fir.ref<tupl… 81 … %[[VAL_3:.*]] = fir.convert %[[VAL_2]] : (!fir.ref<tuple<!fir.real<16>, !fir.real<16>>>) -> !fi… 102 …: %[[VAL_3:.*]] = fir.convert %[[VAL_2]] : (!fir.ref<tuple<f128, f128>>) -> !fir.ref<com… 104 …: %[[VAL_5:.*]] = fir.convert %[[VAL_1]] : (!fir.ref<tuple<f128, f128>>) -> !fir.ref<com… 109 // CHECK: %[[VAL_9:.*]] = fir.convert %[[VAL_8]] : (!fir.ref<complex<f128>>) -> !fir.ref<… 112 …: %[[VAL_11:.*]] = fir.convert %[[VAL_10]] : (!fir.ref<complex<f128>>) -> !fir.ref<tuple… 113 …(%[[VAL_7]], %[[VAL_9]], %[[VAL_11]]) : (!fir.ref<tuple<f128, f128>>, !fir.ref<tuple<f128, f128>>,… 114 … %[[VAL_12:.*]] = fir.convert %[[VAL_7]] : (!fir.ref<tuple<f128, f128>>) -> !fir.ref<com… [all …]
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| H A D | affine-demotion.fir | 9 …func.func @calc(%arg0: !fir.ref<!fir.array<?xf32>>, %arg1: !fir.ref<!fir.array<?xf32>>, %arg2: !fi… 37 …func @calc(%[[VAL_0:.*]]: !fir.ref<!fir.array<?xf32>>, %[[VAL_1:.*]]: !fir.ref<!fir.array<?xf32>>,… 43 // CHECK: %[[VAL_8:.*]] = fir.convert %[[VAL_0]] : (!fir.ref<!fir.array<?xf32>>) -> !fir.ref<!fi… 44 // CHECK: %[[VAL_9:.*]] = fir.convert %[[VAL_1]] : (!fir.ref<!fir.array<?xf32>>) -> !fir.ref<!fi… 45 // CHECK: %[[VAL_10:.*]] = fir.convert %[[VAL_7]] : (!fir.ref<!fir.array<?xf32>>) -> !fir.ref<!f… 48 …]] = fir.coordinate_of %[[VAL_8]], %[[VAL_12]] : (!fir.ref<!fir.array<?xf32>>, index) -> !fir.ref<… 50 …]] = fir.coordinate_of %[[VAL_9]], %[[VAL_12]] : (!fir.ref<!fir.array<?xf32>>, index) -> !fir.ref<… 53 …] = fir.coordinate_of %[[VAL_10]], %[[VAL_12]] : (!fir.ref<!fir.array<?xf32>>, index) -> !fir.ref<… 56 // CHECK: %[[VAL_19:.*]] = fir.convert %[[VAL_2]] : (!fir.ref<!fir.array<?xf32>>) -> !fir.ref<!f… 59 …] = fir.coordinate_of %[[VAL_10]], %[[VAL_21]] : (!fir.ref<!fir.array<?xf32>>, index) -> !fir.ref<… [all …]
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| H A D | target-rewrite-complex.fir | 31 …// I32: [[ADDRC:%[0-9A-Za-z]+]] = fir.convert [[ADDRI64]] : (!fir.ref<i64>) -> !fir.ref<!fir.compl… 36 …ADDRC:%[0-9A-Za-z]+]] = fir.convert [[ADDRV]] : (!fir.ref<!fir.vector<2:!fir.real<4>>>) -> !fir.re… 120 …// I32: [[ADDRC:%[0-9A-Za-z]+]] = fir.convert [[ADDRI64]] : (!fir.ref<i64>) -> !fir.ref<!fir.compl… 345 …DAG: [[Z1_ADDR:%[0-9A-Za-z]+]] = fir.convert [[Z1]] : (!fir.ref<tuple<f32, f32>>) -> !fir.ref<comp… 347 …DAG: [[Z2_ADDR:%[0-9A-Za-z]+]] = fir.convert [[Z2]] : (!fir.ref<tuple<f32, f32>>) -> !fir.ref<comp… 417 …// I32: [[ADDRC:%[0-9A-Za-z]+]] = fir.convert [[ADDRI64]] : (!fir.ref<i64>) -> !fir.ref<complex<f3… 420 …// I32: [[ADDRC_2:%[0-9A-Za-z]+]] = fir.convert [[ADDRI64_2]] : (!fir.ref<i64>) -> !fir.ref<comple… 427 …: [[ADDRC:%[0-9A-Za-z]+]] = fir.convert [[ADDRV]] : (!fir.ref<!fir.vector<2:f32>>) -> !fir.ref<com… 437 …64: [[ADDRC:%[0-9A-Za-z]+]] = fir.convert [[ADDRT]] : (!fir.ref<tuple<f32, f32>>) -> !fir.ref<comp… 447 …// PPC: [[ADDRC:%[0-9A-Za-z]+]] = fir.convert [[ADDRT]] : (!fir.ref<tuple<f32, f32>>) -> !fir.ref<… [all …]
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| H A D | target-rewrite-boxchar.fir | 49 …%in_pos = fir.coordinate_of %2#0, %i : (!fir.ref<!fir.array<?x!fir.char<1>>>, index) -> !fir.ref<!… 50 …%out_pos = fir.coordinate_of %1#0, %i : (!fir.ref<!fir.array<?x!fir.char<1>>>, index) -> !fir.ref<… 51 %ch = fir.load %in_pos : !fir.ref<!fir.char<1>> 52 fir.store %ch to %out_pos : !fir.ref<!fir.char<1>> 60 …z]+}}: !fir.ref<!fir.char<1,?>> {llvm.sret}, {{%[0-9A-Za-z]+}}: i32, {{%[0-9A-Za-z]+}}: !fir.ref<!… 62 …z]+}}: !fir.ref<!fir.char<1,?>> {llvm.sret}, {{%[0-9A-Za-z]+}}: i64, {{%[0-9A-Za-z]+}}: !fir.ref<!… 68 // INT32-LABEL: @boxcharcallee(!fir.ref<!fir.char<1,?>>, i32) 75 %1 = fir.address_of (@name) : !fir.ref<!fir.char<1,9>> 77 %3 = fir.convert %1 : (!fir.ref<!fir.char<1,9>>) -> !fir.ref<!fir.char<1,?>> 80 // (!fir.ref<!fir.char<1, ?>>, i32) [all …]
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| H A D | memref-data-flow.fir | 5 …@load_store_chain_removal(%arg0: !fir.ref<!fir.array<60xi32>>, %arg1: !fir.ref<!fir.array<60xi32>>… 18 fir.store %5 to %0 : !fir.ref<i32> 19 %6 = fir.load %0 : !fir.ref<i32> 22 %9 = fir.coordinate_of %arg0, %8 : (!fir.ref<!fir.array<60xi32>>, i64) -> !fir.ref<i32> 23 %10 = fir.load %9 : !fir.ref<i32> 25 %12 = fir.coordinate_of %1, %8 : (!fir.ref<!fir.array<60xi32>>, i64) -> !fir.ref<i32> 40 %20 = fir.load %0 : !fir.ref<i32> 43 %23 = fir.coordinate_of %1, %22 : (!fir.ref<!fir.array<60xi32>>, i64) -> !fir.ref<i32> 44 %24 = fir.load %23 : !fir.ref<i32> 45 %25 = fir.coordinate_of %arg1, %22 : (!fir.ref<!fir.array<60xi32>>, i64) -> !fir.ref<i32> [all …]
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| /llvm-project-15.0.7/flang/test/Intrinsics/ |
| H A D | math-codegen.fir | 23 %1 = fir.load %arg0 : !fir.ref<f32> 25 fir.store %2 to %0 : !fir.ref<f32> 26 %3 = fir.load %0 : !fir.ref<f32> 31 %1 = fir.load %arg0 : !fir.ref<f64> 33 fir.store %2 to %0 : !fir.ref<f64> 34 %3 = fir.load %0 : !fir.ref<f64> 42 %3 = fir.load %0 : !fir.ref<f128> 98 %3 = fir.load %0 : !fir.ref<f32> 106 %3 = fir.load %0 : !fir.ref<f64> 1322 …: !fir.ref<f32> {fir.bindc_name = "x"}, %arg1: !fir.ref<f32> {fir.bindc_name = "y"}, %arg2: !fir.r… [all …]
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