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/llvm-project-15.0.7/llvm/docs/AMDGPU/
H A DAMDGPUAsmGFX7.rst265ref:`vdst<amdgpu_synid_gfx7_vdst_0c25a6>`, :ref:`vaddr<amdgpu_synid_gfx7_vaddr_e9b690>`, :r…
266ref:`vdst<amdgpu_synid_gfx7_vdst_0c25a6>`, :ref:`vaddr<amdgpu_synid_gfx7_vaddr_e9b690>`, :r…
267ref:`vdst<amdgpu_synid_gfx7_vdst_0c25a6>`, :ref:`vaddr<amdgpu_synid_gfx7_vaddr_e9b690>`, :r…
268ref:`vdst<amdgpu_synid_gfx7_vdst_0c25a6>`, :ref:`vaddr<amdgpu_synid_gfx7_vaddr_e9b690>`, :r…
269ref:`vdst<amdgpu_synid_gfx7_vdst_0c25a6>`, :ref:`vaddr<amdgpu_synid_gfx7_vaddr_e9b690>`, :r…
270ref:`vdst<amdgpu_synid_gfx7_vdst_0c25a6>`, :ref:`vaddr<amdgpu_synid_gfx7_vaddr_e9b690>`, :r…
271ref:`vdst<amdgpu_synid_gfx7_vdst_0c25a6>`, :ref:`vaddr<amdgpu_synid_gfx7_vaddr_e9b690>`, :r…
272ref:`vdst<amdgpu_synid_gfx7_vdst_0c25a6>`, :ref:`vaddr<amdgpu_synid_gfx7_vaddr_e9b690>`, :r…
273ref:`vdst<amdgpu_synid_gfx7_vdst_0c25a6>`, :ref:`vaddr<amdgpu_synid_gfx7_vaddr_e9b690>`, :r…
274ref:`vdst<amdgpu_synid_gfx7_vdst_0c25a6>`, :ref:`vaddr<amdgpu_synid_gfx7_vaddr_e9b690>`, :r…
[all …]
H A DAMDGPUAsmGFX10.rst612ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :re…
617ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :re…
618ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :re…
619ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :re…
620ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :re…
621ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :re…
622ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :re…
623ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :re…
624ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :re…
625ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :re…
[all …]
H A DAMDGPUAsmGFX9.rst383ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`, :r…
385ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`, :r…
386ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`, :r…
388ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`, :r…
389ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`, :r…
390ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`, :r…
391ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`, :r…
392ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`, :r…
393ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`, :r…
394ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`, :r…
[all …]
H A DAMDGPUAsmGFX90a.rst307ref:`vdata<amdgpu_synid_gfx90a_vdata_af2725>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amd…
308ref:`vdata<amdgpu_synid_gfx90a_vdata_af2725>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amd…
309ref:`vdata<amdgpu_synid_gfx90a_vdata_ca6e5f>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amd…
310ref:`vdata<amdgpu_synid_gfx90a_vdata_af2725>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amd…
311ref:`vdata<amdgpu_synid_gfx90a_vdata_af2725>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amd…
312ref:`vdata<amdgpu_synid_gfx90a_vdata_af2725>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amd…
321ref:`vdst<amdgpu_synid_gfx90a_vdst_7c9848>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, …
322ref:`vdst<amdgpu_synid_gfx90a_vdst_7c9848>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, …
327ref:`vdst<amdgpu_synid_gfx90a_vdst_7c9848>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, …
328ref:`vdata<amdgpu_synid_gfx90a_vdata_a5f23e>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`,…
[all …]
H A DAMDGPUAsmGFX1030.rst591ref:`vdst<amdgpu_synid_gfx1030_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx1030_vaddr_cdc744>`, …
596ref:`vdst<amdgpu_synid_gfx1030_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx1030_vaddr_cdc744>`, …
597ref:`vdst<amdgpu_synid_gfx1030_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx1030_vaddr_cdc744>`, …
598ref:`vdst<amdgpu_synid_gfx1030_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx1030_vaddr_cdc744>`, …
599ref:`vdst<amdgpu_synid_gfx1030_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx1030_vaddr_cdc744>`, …
600ref:`vdst<amdgpu_synid_gfx1030_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx1030_vaddr_cdc744>`, …
601ref:`vdst<amdgpu_synid_gfx1030_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx1030_vaddr_cdc744>`, …
602ref:`vdst<amdgpu_synid_gfx1030_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx1030_vaddr_cdc744>`, …
603ref:`vdst<amdgpu_synid_gfx1030_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx1030_vaddr_cdc744>`, …
604ref:`vdst<amdgpu_synid_gfx1030_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx1030_vaddr_cdc744>`, …
[all …]
H A DAMDGPUAsmGFX8.rst263ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :r…
264ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :r…
265ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :r…
266ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :r…
267ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :r…
268ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :r…
269ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :r…
270ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :r…
271ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :r…
272ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :r…
[all …]
H A DAMDGPUAsmGFX940.rst325ref:`vdst<amdgpu_synid_gfx940_vdst_d0c0cb>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:…
326ref:`vdst<amdgpu_synid_gfx940_vdst_d0c0cb>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:…
327ref:`vdst<amdgpu_synid_gfx940_vdst_d8236e>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:…
328ref:`vdst<amdgpu_synid_gfx940_vdst_d8236e>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:…
329ref:`vdst<amdgpu_synid_gfx940_vdst_d0c0cb>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:…
330ref:`vdst<amdgpu_synid_gfx940_vdst_d8236e>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:…
331ref:`vdst<amdgpu_synid_gfx940_vdst_e2898f>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:…
332ref:`vdst<amdgpu_synid_gfx940_vdst_a32035>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:…
333ref:`vdata<amdgpu_synid_gfx940_vdata_be4895>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :re…
334ref:`vdata<amdgpu_synid_gfx940_vdata_be4895>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :re…
[all …]
H A DAMDGPUAsmGFX908.rst53ref:`vdata<amdgpu_synid_gfx908_vdata_fe1edf>`, :ref:`vaddr<amdgpu_synid_gfx908_vaddr_b73dc0>`, …
54ref:`vdata<amdgpu_synid_gfx908_vdata_fe1edf>`, :ref:`vaddr<amdgpu_synid_gfx908_vaddr_b73dc0>`, …
76ref:`vdst<amdgpu_synid_gfx908_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx908_src_d578c4>`::ref:`…
104ref:`vdst<amdgpu_synid_gfx908_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx908_src_4e78e6>`::r…
105ref:`vdst<amdgpu_synid_gfx908_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx908_src_4e78e6>`::r…
106ref:`vdst<amdgpu_synid_gfx908_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx908_src_4e78e6>`::r…
107ref:`vdst<amdgpu_synid_gfx908_vdst_bcee7a>`::ref:`f32x4<amdgpu_synid_gfx908_type_deviation>`, :re…
108ref:`vdst<amdgpu_synid_gfx908_vdst_0c4ef8>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>`, :re…
109ref:`vdst<amdgpu_synid_gfx908_vdst_0c4ef8>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>`, :re…
110ref:`vdst<amdgpu_synid_gfx908_vdst_0c4ef8>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>`, :re…
[all …]
H A DAMDGPUAsmGFX906.rst44ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx906_vsrc>`::ref:`m<amdgpu_sy…
46ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx906_vsrc>`, :ref:`vsrc1<a…
47ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src_1>`::ref:`m<amdgpu_sy…
56ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src_2>`::ref:`m<amdgpu_sy…
66ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src_2>`::ref:`f16x2<amdgpu…
67ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src_3>`::ref:`i16x2<amdgpu…
68ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src_3>`::ref:`u16x2<amdgpu…
69ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src_2>`::ref:`i8x4<amdgpu_…
73ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src_2>`::ref:`m<amdgpu_syn…
74ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src_2>`::ref:`m<amdgpu_syn…
[all …]
H A DAMDGPUAsmGFX1011.rst43ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx1011_vsrc>`::ref:`f16x2<amdg…
44ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx1011_vsrc>`::ref:`i8x4<amdgp…
53ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx1011_vsrc>`::ref:`f16x2<amd…
54ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx1011_vsrc>`::ref:`i8x4<amdg…
73ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`src0<amdgpu_synid_gfx1011_src>`::ref:`f16x2<amdgp…
74ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`src0<amdgpu_synid_gfx1011_src_2>`::ref:`i16x2<amd…
75ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`src0<amdgpu_synid_gfx1011_src_2>`::ref:`u16x2<amd…
76ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`src0<amdgpu_synid_gfx1011_src>`::ref:`i8x4<amdgpu…
77ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`src0<amdgpu_synid_gfx1011_src>`::ref:`u8x4<amdgpu…
78ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`src0<amdgpu_synid_gfx1011_src>`::ref:`i4x8<amdgpu…
[all …]
H A DAMDGPUAsmGFX904.rst25 Notation used in this document is explained :ref:`here<amdgpu_syn_instruction_notation>`.
30 An overview of generic syntax and other features of AMDGPU instructions may be found :ref:`in this …
43ref:`vdst<amdgpu_synid_gfx904_vdst>`, :ref:`src0<amdgpu_synid_gfx904_src>`::ref:`m<amdgpu_syni…
44ref:`vdst<amdgpu_synid_gfx904_vdst>`, :ref:`src0<amdgpu_synid_gfx904_src>`::ref:`m<amdgpu_syni…
45ref:`vdst<amdgpu_synid_gfx904_vdst>`, :ref:`src0<amdgpu_synid_gfx904_src>`::ref:`m<amdgpu_syni…
H A DAMDGPUAsmGFX900.rst25 Notation used in this document is explained :ref:`here<amdgpu_syn_instruction_notation>`.
30 An overview of generic syntax and other features of AMDGPU instructions may be found :ref:`in this …
43ref:`vdst<amdgpu_synid_gfx900_vdst>`, :ref:`src0<amdgpu_synid_gfx900_src>`::ref:`m<amdgpu_syni…
44ref:`vdst<amdgpu_synid_gfx900_vdst>`, :ref:`src0<amdgpu_synid_gfx900_src>`::ref:`m<amdgpu_syni…
45ref:`vdst<amdgpu_synid_gfx900_vdst>`, :ref:`src0<amdgpu_synid_gfx900_src>`::ref:`m<amdgpu_syni…
H A DAMDGPUAsmGFX1013.rst25 Notation used in this document is explained :ref:`here<amdgpu_syn_instruction_notation>`.
30 An overview of generic syntax and other features of AMDGPU instructions may be found :ref:`in this …
43ref:`vdst<amdgpu_synid_gfx1013_vdst_f8490d>`, :ref:`vaddr<amdgpu_synid_gfx1013_vaddr_49d53a>`, …
44ref:`vdst<amdgpu_synid_gfx1013_vdst_f8490d>`, :ref:`vaddr<amdgpu_synid_gfx1013_vaddr_49d53a>`, …
45ref:`vdst<amdgpu_synid_gfx1013_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx1013_vaddr_cdc744>`, …
H A Dgfx9_src_089570.rst17ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`,…
H A Dgfx8_src_2dcf49.rst17ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`,…
H A Dgfx8_src_8a6ea8.rst17ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`,…
H A Dgfx908_src_955b45.rst17ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`,…
/llvm-project-15.0.7/clang/test/CodeGenCUDA/
H A Dlambda-reference-var.cu27 [=](){ *out = ref;}(); in dev_capture_dev_ref_by_copy()
47 [&](){ ref++; *out = ref;}(); in dev_capture_dev_ref_by_ref()
58 ref++; in dev_ref()
59 *out = ref; in dev_ref()
71 ref++; in dev_lambda_ref()
72 *out = ref; in dev_lambda_ref()
94 [&](){ ref++; *out = ref;}(); in host_capture_host_ref_by_ref()
105 ref++; in host_ref()
106 *out = ref; in host_ref()
118 ref++; in host_lambda_ref()
[all …]
/llvm-project-15.0.7/flang/test/Fir/
H A Dboxproc.fir30 …%2 = fir.coordinate_of %1, %c0_i32 : (!fir.ref<tuple<!fir.ref<i32>>>, i32) -> !fir.llvm_ptr<!fir.r…
33 …r.address_of(@_QFtest_proc_dummyPtest_proc_dummy_a) : (!fir.ref<i32>, !fir.ref<tuple<!fir.ref<i32>…
34 …%4 = fir.emboxproc %3, %1 : ((!fir.ref<i32>, !fir.ref<tuple<!fir.ref<i32>>>) -> (), !fir.ref<tuple…
37 %6 = fir.convert %5 : (!fir.ref<!fir.char<1,8>>) -> !fir.ref<i8>
46 …%0 = fir.coordinate_of %arg1, %c0_i32 : (!fir.ref<tuple<!fir.ref<i32>>>, i32) -> !fir.llvm_ptr<!fi…
168 %8 = fir.convert %1 : (!fir.ref<!fir.char<1,10>>) -> !fir.ref<i8>
169 %9 = fir.convert %6 : (!fir.ref<!fir.char<1,9>>) -> !fir.ref<i8>
186 %20 = fir.convert %19 : (!fir.ref<!fir.char<1,8>>) -> !fir.ref<i8>
195 %29 = fir.convert %0 : (!fir.ref<!fir.char<1,40>>) -> !fir.ref<i8>
216 %7 = fir.convert %3 : (!fir.ref<!fir.char<1,?>>) -> !fir.ref<i8>
[all …]
H A Dtarget-rewrite-complex16.fir60 … %[[VAL_9:.*]] = fir.convert %[[VAL_0]] : (!fir.ref<tuple<!fir.real<16>, !fir.real<16>>>) -> !fi…
69 … %[[VAL_1:.*]] = fir.convert %[[VAL_0]] : (!fir.ref<tuple<!fir.real<16>, !fir.real<16>>>) -> !fi…
73 …: %[[VAL_4:.*]] = fir.convert %[[VAL_3]] : (!fir.ref<!fir.complex<16>>) -> !fir.ref<tupl…
81 … %[[VAL_3:.*]] = fir.convert %[[VAL_2]] : (!fir.ref<tuple<!fir.real<16>, !fir.real<16>>>) -> !fi…
102 …: %[[VAL_3:.*]] = fir.convert %[[VAL_2]] : (!fir.ref<tuple<f128, f128>>) -> !fir.ref<com…
104 …: %[[VAL_5:.*]] = fir.convert %[[VAL_1]] : (!fir.ref<tuple<f128, f128>>) -> !fir.ref<com…
109 // CHECK: %[[VAL_9:.*]] = fir.convert %[[VAL_8]] : (!fir.ref<complex<f128>>) -> !fir.ref<…
112 …: %[[VAL_11:.*]] = fir.convert %[[VAL_10]] : (!fir.ref<complex<f128>>) -> !fir.ref<tuple…
113 …(%[[VAL_7]], %[[VAL_9]], %[[VAL_11]]) : (!fir.ref<tuple<f128, f128>>, !fir.ref<tuple<f128, f128>>,…
114 … %[[VAL_12:.*]] = fir.convert %[[VAL_7]] : (!fir.ref<tuple<f128, f128>>) -> !fir.ref<com…
[all …]
H A Daffine-demotion.fir9 …func.func @calc(%arg0: !fir.ref<!fir.array<?xf32>>, %arg1: !fir.ref<!fir.array<?xf32>>, %arg2: !fi…
37 …func @calc(%[[VAL_0:.*]]: !fir.ref<!fir.array<?xf32>>, %[[VAL_1:.*]]: !fir.ref<!fir.array<?xf32>>,…
43 // CHECK: %[[VAL_8:.*]] = fir.convert %[[VAL_0]] : (!fir.ref<!fir.array<?xf32>>) -> !fir.ref<!fi…
44 // CHECK: %[[VAL_9:.*]] = fir.convert %[[VAL_1]] : (!fir.ref<!fir.array<?xf32>>) -> !fir.ref<!fi…
45 // CHECK: %[[VAL_10:.*]] = fir.convert %[[VAL_7]] : (!fir.ref<!fir.array<?xf32>>) -> !fir.ref<!f…
48 …]] = fir.coordinate_of %[[VAL_8]], %[[VAL_12]] : (!fir.ref<!fir.array<?xf32>>, index) -> !fir.ref<…
50 …]] = fir.coordinate_of %[[VAL_9]], %[[VAL_12]] : (!fir.ref<!fir.array<?xf32>>, index) -> !fir.ref<…
53 …] = fir.coordinate_of %[[VAL_10]], %[[VAL_12]] : (!fir.ref<!fir.array<?xf32>>, index) -> !fir.ref<…
56 // CHECK: %[[VAL_19:.*]] = fir.convert %[[VAL_2]] : (!fir.ref<!fir.array<?xf32>>) -> !fir.ref<!f…
59 …] = fir.coordinate_of %[[VAL_10]], %[[VAL_21]] : (!fir.ref<!fir.array<?xf32>>, index) -> !fir.ref<…
[all …]
H A Dtarget-rewrite-complex.fir31 …// I32: [[ADDRC:%[0-9A-Za-z]+]] = fir.convert [[ADDRI64]] : (!fir.ref<i64>) -> !fir.ref<!fir.compl…
36 …ADDRC:%[0-9A-Za-z]+]] = fir.convert [[ADDRV]] : (!fir.ref<!fir.vector<2:!fir.real<4>>>) -> !fir.re…
120 …// I32: [[ADDRC:%[0-9A-Za-z]+]] = fir.convert [[ADDRI64]] : (!fir.ref<i64>) -> !fir.ref<!fir.compl…
345 …DAG: [[Z1_ADDR:%[0-9A-Za-z]+]] = fir.convert [[Z1]] : (!fir.ref<tuple<f32, f32>>) -> !fir.ref<comp…
347 …DAG: [[Z2_ADDR:%[0-9A-Za-z]+]] = fir.convert [[Z2]] : (!fir.ref<tuple<f32, f32>>) -> !fir.ref<comp…
417 …// I32: [[ADDRC:%[0-9A-Za-z]+]] = fir.convert [[ADDRI64]] : (!fir.ref<i64>) -> !fir.ref<complex<f3…
420 …// I32: [[ADDRC_2:%[0-9A-Za-z]+]] = fir.convert [[ADDRI64_2]] : (!fir.ref<i64>) -> !fir.ref<comple…
427 …: [[ADDRC:%[0-9A-Za-z]+]] = fir.convert [[ADDRV]] : (!fir.ref<!fir.vector<2:f32>>) -> !fir.ref<com…
437 …64: [[ADDRC:%[0-9A-Za-z]+]] = fir.convert [[ADDRT]] : (!fir.ref<tuple<f32, f32>>) -> !fir.ref<comp…
447 …// PPC: [[ADDRC:%[0-9A-Za-z]+]] = fir.convert [[ADDRT]] : (!fir.ref<tuple<f32, f32>>) -> !fir.ref<…
[all …]
H A Dtarget-rewrite-boxchar.fir49 …%in_pos = fir.coordinate_of %2#0, %i : (!fir.ref<!fir.array<?x!fir.char<1>>>, index) -> !fir.ref<!…
50 …%out_pos = fir.coordinate_of %1#0, %i : (!fir.ref<!fir.array<?x!fir.char<1>>>, index) -> !fir.ref<…
51 %ch = fir.load %in_pos : !fir.ref<!fir.char<1>>
52 fir.store %ch to %out_pos : !fir.ref<!fir.char<1>>
60 …z]+}}: !fir.ref<!fir.char<1,?>> {llvm.sret}, {{%[0-9A-Za-z]+}}: i32, {{%[0-9A-Za-z]+}}: !fir.ref<!…
62 …z]+}}: !fir.ref<!fir.char<1,?>> {llvm.sret}, {{%[0-9A-Za-z]+}}: i64, {{%[0-9A-Za-z]+}}: !fir.ref<!…
68 // INT32-LABEL: @boxcharcallee(!fir.ref<!fir.char<1,?>>, i32)
75 %1 = fir.address_of (@name) : !fir.ref<!fir.char<1,9>>
77 %3 = fir.convert %1 : (!fir.ref<!fir.char<1,9>>) -> !fir.ref<!fir.char<1,?>>
80 // (!fir.ref<!fir.char<1, ?>>, i32)
[all …]
H A Dmemref-data-flow.fir5 …@load_store_chain_removal(%arg0: !fir.ref<!fir.array<60xi32>>, %arg1: !fir.ref<!fir.array<60xi32>>…
18 fir.store %5 to %0 : !fir.ref<i32>
19 %6 = fir.load %0 : !fir.ref<i32>
22 %9 = fir.coordinate_of %arg0, %8 : (!fir.ref<!fir.array<60xi32>>, i64) -> !fir.ref<i32>
23 %10 = fir.load %9 : !fir.ref<i32>
25 %12 = fir.coordinate_of %1, %8 : (!fir.ref<!fir.array<60xi32>>, i64) -> !fir.ref<i32>
40 %20 = fir.load %0 : !fir.ref<i32>
43 %23 = fir.coordinate_of %1, %22 : (!fir.ref<!fir.array<60xi32>>, i64) -> !fir.ref<i32>
44 %24 = fir.load %23 : !fir.ref<i32>
45 %25 = fir.coordinate_of %arg1, %22 : (!fir.ref<!fir.array<60xi32>>, i64) -> !fir.ref<i32>
[all …]
/llvm-project-15.0.7/flang/test/Intrinsics/
H A Dmath-codegen.fir23 %1 = fir.load %arg0 : !fir.ref<f32>
25 fir.store %2 to %0 : !fir.ref<f32>
26 %3 = fir.load %0 : !fir.ref<f32>
31 %1 = fir.load %arg0 : !fir.ref<f64>
33 fir.store %2 to %0 : !fir.ref<f64>
34 %3 = fir.load %0 : !fir.ref<f64>
42 %3 = fir.load %0 : !fir.ref<f128>
98 %3 = fir.load %0 : !fir.ref<f32>
106 %3 = fir.load %0 : !fir.ref<f64>
1322 …: !fir.ref<f32> {fir.bindc_name = "x"}, %arg1: !fir.ref<f32> {fir.bindc_name = "y"}, %arg2: !fir.r…
[all …]

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