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/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCScheduleE5500.td85 [11], // Latency = 7, Repeat rate = 1
137 [6, 2], // Latency = 2, Repeat rate = 2
158 [7, 2], // Latency = 3, Repeat rate = 1
162 [7, 2], // Latency = 3, Repeat rate = 1
166 [7, 2], // Latency = 3, Repeat rate = 1
175 [7, 2], // Latency = 3, Repeat rate = 1
181 [7, 2], // Latency = 3, Repeat rate = 1
186 [7, 2], // Latency = 3, Repeat rate = 1
315 [5], // Latency = 1, Repeat rate = 1
319 [5], // Latency = 1, Repeat rate = 1
[all …]
H A DPPCScheduleE500.td70 [7, 1, 1], // Latency = 4, Repeat rate = 1
75 [7, 1, 1], // Latency = 4, Repeat rate = 1
95 [5, 1], // Latency = 2, Repeat rate = 2
116 [6, 1], // Latency = 3, Repeat rate = 1
197 [5, 1], // Latency = 2, Repeat rate = 4
215 [7, 1], // Latency = 4, Repeat rate = 4
219 [7, 1], // Latency = 4, Repeat rate = 4
223 [4, 1], // Latency = 1, Repeat rate = 1
227 [4, 1], // Latency = 1, Repeat rate = 1
231 [7, 1], // Latency = 4, Repeat rate = 4
[all …]
H A DPPCScheduleE500mc.td83 [7, 1, 1], // Latency = 4, Repeat rate = 1
88 [7, 1, 1], // Latency = 4, Repeat rate = 1
108 [5, 1], // Latency = 2, Repeat rate = 2
129 [6, 1], // Latency = 3, Repeat rate = 1
241 [5, 1], // Latency = 2, Repeat rate = 4
259 [7, 1], // Latency = 4, Repeat rate = 4
263 [7, 1], // Latency = 4, Repeat rate = 4
267 [4, 1], // Latency = 1, Repeat rate = 1
271 [4, 1], // Latency = 1, Repeat rate = 1
275 [7, 1], // Latency = 4, Repeat rate = 4
[all …]
/llvm-project-15.0.7/clang/test/SemaCXX/
H A Dpr50497-crash-typeid.cpp17 [=](auto rate) { in Foo() argument
22 [=](auto rate) { in Foo() argument
/llvm-project-15.0.7/llvm/test/Transforms/Inline/AMDGPU/
H A Dinline-target-cpu.ll72 attributes #3 = { nounwind "target-features"="-half-rate-64-ops" }
73 attributes #4 = { nounwind "target-features"="+half-rate-64-ops" }
/llvm-project-15.0.7/polly/lib/External/isl/imath/tests/gmp-compat-test/
H A Dgendata.py204 (n, d) = get_div_data(args[0], args[1], rate=1.0)
210 (n, d) = get_div_data(args[1], args[2], rate=1.0)
322 def get_div_data(n, d, rate=0.2): argument
324 if random.random() < rate:
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSISchedule.td34 // F16 or F32 transcendental instructions (these are quarter rate)
36 // Other quarter rate VALU instructions
41 // Slow quarter rate f64 instruction.
44 // half rate f64 instruction (same as v_add_f64)
54 // Half rate 64-bit instructions.
H A DAMDGPU.td47 def HalfRate64Ops : SubtargetFeature<"half-rate-64-ops",
50 "Most fp64 instructions are half rate instead of quarter"
53 def FullRate64Ops : SubtargetFeature<"full-rate-64-ops",
56 "Most fp64 instructions are full rate"
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/AMDGPU/
H A Dfmul.ll2 … -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx90a -mattr=+half-rate-64-ops < %s | FileC…
3 … -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -mattr=+half-rate-64-ops < %s | FileC…
4 …-model>' 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileC…
5 … -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx90a -mattr=+half-rate-64-ops < %s | FileC…
6 … -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -mattr=+half-rate-64-ops < %s | FileC…
7 …ode-size 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileC…
H A Dfsub.ll2 …-disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx90a -mattr=+half-rate-64-ops < %s | FileC…
3 …-disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -mattr=+half-rate-64-ops < %s | FileC…
4 …-model>' 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileC…
5 …-disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx90a -mattr=+half-rate-64-ops < %s | FileC…
6 …-disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -mattr=+half-rate-64-ops < %s | FileC…
7 …ode-size 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileC…
H A Dfadd.ll2 …-disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx90a -mattr=+half-rate-64-ops < %s | FileC…
3 …-disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -mattr=+half-rate-64-ops < %s | FileC…
4 …-model>' 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileC…
5 …-disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx90a -mattr=+half-rate-64-ops < %s | FileC…
6 …-disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -mattr=+half-rate-64-ops < %s | FileC…
7 …ode-size 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileC…
H A Dfma.ll2 …-disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx1010 -mattr=+half-rate-64-ops < %s | FileC…
3 … -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx90a -mattr=+half-rate-64-ops < %s | FileC…
4 … -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -mattr=+half-rate-64-ops < %s | FileC…
6 …-disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx1010 -mattr=+half-rate-64-ops < %s | FileC…
7 … -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx90a -mattr=+half-rate-64-ops < %s | FileC…
8 … -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -mattr=+half-rate-64-ops < %s | FileC…
H A Dadd-sub.ll2 … -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -mattr=+half-rate-64-ops < %s | FileC…
3 …-model>' 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileC…
4 … -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -mattr=+half-rate-64-ops < %s | FileC…
5 …ode-size 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileC…
H A Dshifts.ll2 … -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -mattr=+half-rate-64-ops < %s | FileC…
3 …-model>' 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileC…
4 … -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -mattr=+half-rate-64-ops < %s | FileC…
5 …ode-size 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileC…
/llvm-project-15.0.7/flang/include/flang/Lower/
H A DRuntime.h97 mlir::Value rate, mlir::Value max);
/llvm-project-15.0.7/flang/lib/Lower/
H A DRuntime.cpp334 mlir::Value rate, mlir::Value max) { in genSystemClock() argument
369 if (rate) in genSystemClock()
370 makeCall(getRuntimeFunc<mkRTKey(SystemClockCountRate)>(loc, builder), rate); in genSystemClock()
/llvm-project-15.0.7/llvm/test/tools/llvm-profgen/
H A Dprofile-density.test7 …timize better with 3.1x more samples. Please consider increasing sampling rate or profiling for lo…
/llvm-project-15.0.7/clang-tools-extra/docs/clang-tidy/checks/misc/
H A Ddefinitions-in-headers.rst25 // should try to keep the false-positive rate down.
/llvm-project-15.0.7/llvm/test/Transforms/Reassociate/
H A Dpointer-collision-non-determinism.ll13 ; The failure rate of this test (at least, on my 8 core iMac), when ran in the
/llvm-project-15.0.7/llvm/test/CodeGen/Thumb2/
H A D2009-09-01-PostRAProlog.ll28 @.str16 = private constant [19 x i8] c"store rate = %.3f\0A\00", align 1 ; <[19 x i8]*> [#uses=1]
/llvm-project-15.0.7/utils/bazel/
H A D.bazelrc179 # behavior and therefore improves both the remote cache hit rate and the
/llvm-project-15.0.7/llvm/docs/
H A DContributing.rst114 patch, or the Phabricator review with "Ping." The common courtesy 'ping' rate
/llvm-project-15.0.7/third-party/benchmark/docs/
H A Duser_guide.md647 // Set the counter as a rate. It will be presented divided
652 // Set the counter as a rate. It will be presented divided
664 // This says that we process with the rate of state.range(0) bytes every iteration:
/llvm-project-15.0.7/compiler-rt/lib/fuzzer/
H A DFuzzerFlags.def20 "then try larger inputs over time. Specifies the rate at which the length "
/llvm-project-15.0.7/clang-tools-extra/docs/clang-tidy/
H A DContributing.rst50 implemented effectively and with extremely low false positive rate, it may
382 check's efficacy and false positive rate.
398 positive rate, the less likely the check will be adopted in practice.

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