| /llvm-project-15.0.7/llvm/test/MC/ARM/ |
| H A D | arm-arithmetic-aliases.s | 6 sub r2, r2, #6 8 sub r2, r2, r3 16 add r2, r2, #6 18 add r2, r2, r3 26 and r2, r2, #6 28 and r2, r2, r3 36 orr r2, r2, #6 38 orr r2, r2, r3 46 eor r2, r2, #6 48 eor r2, r2, r3 [all …]
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| H A D | mul-v4.s | 9 mul r0, r1, r2 10 muls r0, r1, r2 11 mulne r0, r1, r2 12 mulseq r0, r1, r2 18 mla r0, r1, r2, r3 19 mlas r0, r1, r2, r3 27 smlal r2,r3,r0,r1 28 smlals r2,r3,r0,r1 29 smlalne r2,r3,r0,r1 36 umlal r2,r3,r0,r1 [all …]
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| H A D | arm_instructions.s | 23 and r1,r2,r3 26 ands r1,r2,r3 29 eor r1,r2,r3 32 eors r1,r2,r3 35 sub r1,r2,r3 41 add r1,r2,r3 47 adc r1,r2,r3 50 bic r1,r2,r3 56 mov r1,r2 59 mvn r1,r2 [all …]
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| H A D | basic-thumb-instructions.s | 37 adds r2, #3 38 adds r2, #8 49 add r2, r8 79 add r2, sp, r2 82 @ CHECK: add r2, sp, r2 @ encoding: [0x6a,0x44] 88 adr r2, _baz 90 adr r2, #4 122 asrs r5, r2 204 bx r2 424 muls r2, r2, r3 [all …]
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| H A D | basic-thumb2-instructions.s | 79 adds r2, r2, #56 84 adds.w r2, r2, #-16 87 addw r2, r2, #-16 941 ldm.w r2, {r1, r2} 1929 pkhbt r2, r2, r3 1934 pkhtb r2, r2, r3 2500 smlatb r4, r2, r3, r2 2704 smultb r4, r2, r2 2709 smultbge r2, r3, r2 2951 stm.w r2, {r1, r2} [all …]
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| H A D | thumbv8m.s | 53 sdiv r1, r2, r3 56 udiv r1, r2, r3 67 ldrexb r1, [r2] 70 ldrexh r1, [r2] 100 lda r1, [r2] 103 ldab r1, [r2] 106 ldah r1, [r2] 118 ldaex r1, [r2] 139 stlexd r0, r1, r2, [r2] 200 MSR PSP_NS, r2 [all …]
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| H A D | coprocessors.s | 10 mrc p0, #1, r2, c3, c4, #5 14 mrc p1, #1, r2, c3, c4, #5 18 mrc p2, #1, r2, c3, c4, #5 22 mrc p3, #1, r2, c3, c4, #5 26 mrc p4, #1, r2, c3, c4, #5 30 mrc p5, #1, r2, c3, c4, #5 34 mrc p6, #1, r2, c3, c4, #5 38 mrc p7, #1, r2, c3, c4, #5 42 mrc p8, #1, r2, c3, c4, #5 46 mrc p9, #1, r2, c3, c4, #5 [all …]
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| H A D | arm_addrmode2.s | 4 @ CHECK: ldrt r1, [r0], r2 @ encoding: [0x02,0x10,0xb0,0xe6] 20 ldrt r1, [r0], r2 21 ldrt r1, [r0], r2, lsr #3 24 ldrbt r1, [r0], r2 25 ldrbt r1, [r0], r2, lsr #3 28 strt r1, [r0], r2 29 strt r1, [r0], r2, lsr #3 32 strbt r1, [r0], r2 33 strbt r1, [r0], r2, lsr #3 40 ldr r1, [r0, r2, lsr #3]! [all …]
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| /llvm-project-15.0.7/llvm/test/tools/llvm-mca/ARM/ |
| H A D | m7-int.s | 7 adc.w r0, r1, r2 8 adcs.w r0, r1, r2 16 adds r0, r1, r2 18 add.w r0, r1, r2 19 adds.w r0, r1, r2 37 and.w r0, r1, r2 38 ands.w r0, r1, r2 45 asr.w r0, r1, r2 52 bic.w r0, r1, r2 175 mul r0, r1, r2 [all …]
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| H A D | m4-int.s | 7 adc.w r0, r1, r2 8 adcs.w r0, r1, r2 27 adds r0, r1, r2 29 add.w r0, r1, r2 30 adds.w r0, r1, r2 39 and.w r0, r1, r2 40 ands.w r0, r1, r2 47 asr.w r0, r1, r2 54 bic.w r0, r1, r2 182 mul r0, r1, r2 [all …]
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| H A D | cortex-a57-memory-instructions.s | 13 ldr r1, [r2], #30 18 ldr r2, [r5, -r3] 22 ldr r5, [r9], r2 98 ldm r2, {r1, r2, r4, r5, r6} 99 ldmia r2, {r1, r2, r4, r5, r6} 101 ldmib r2, {r1, r2} 102 ldmdb r2, {r1, r2} 105 ldmib r2, {r1, r2, r5} 106 ldmdbeq r2, {r1, r2} 143 strd r2, r3, [r6, r2] [all …]
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| H A D | cortex-a57-thumb.s | 187 ldm.w r2, {r1, r2} 443 pkhbt r2, r2, r3 444 pkhbt r2, r2, r3, lsl #31 445 pkhbt r2, r2, r3, lsl #15 446 pkhtb r2, r2, r3, asr #31 447 pkhtb r2, r2, r3, asr #15 593 smlatb r4, r2, r3, r2 598 smlatbgt r4, r2, r3, r2 610 smlaltb r4, r2, r3, r2 615 smlaltblt r4, r2, r3, r2 [all …]
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| H A D | cortex-a57-basic-instructions.s | 405 pkhbt r2, r2, r3 407 pkhbt r2, r2, r3 409 pkhbt r2, r2, r3 570 smlatb r4, r2, r3, r2 574 smlatbne r4, r2, r3, r2 586 smlaltb r4, r2, r3, r2 626 smultb r4, r2, r2 630 smultbne r2, r3, r2 744 sxthle r2, r2, ror #16 794 umlals r2, r9, r2, r3 [all …]
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| /llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/ |
| H A D | function-attributes-01.ll | 15 ; DEFAULT: ld %f0, 0(%r2) 16 ; SOFT-FLOAT: lg %r2, 0(%r2) 17 ; NO-SOFT-FL: ld %f0, 0(%r2) 18 ; NO-VECTOR: ld %f0, 0(%r2) 28 ; DEFAULT: lg %r2, 0(%r2) 29 ; SOFT-FLOAT: lg %r2, 0(%r2) 30 ; NO-SOFT-FL: lg %r2, 0(%r2) 31 ; NO-VECTOR: lg %r2, 0(%r2) 44 ; SOFT-FLOAT-NEXT: lgr %r2, %r0 59 ; DEFAULT-NEXT: lgr %r2, %r0 [all …]
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| H A D | memset-01.ll | 70 ; CHECK: mvc 1(2,%r2), 0(%r2) 80 ; CHECK: mvc 1(2,%r2), 0(%r2) 90 ; CHECK: mvc 1(255,%r2), 0(%r2) 101 ; CHECK: mvc 1(255,%r2), 0(%r2) 112 ; CHECK: mvc 1(255,%r2), 0(%r2) 114 ; CHECK: mvc 257(1,%r2), 256(%r2) 124 ; CHECK: mvc 1(255,%r2), 0(%r2) 126 ; CHECK: mvc 257(1,%r2), 256(%r2) 136 ; CHECK: mvc 1(255,%r2), 0(%r2) 160 ; CHECK: mvc 1(255,%r2), 0(%r2) [all …]
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| H A D | selectcc-01.ll | 8 ; CHECK: ipm %r2 20 ; CHECK: ipm %r2 33 ; CHECK: ipm %r2 45 ; CHECK: ipm %r2 58 ; CHECK: ipm %r2 71 ; CHECK: ipm %r2 84 ; CHECK: ipm %r2 96 ; CHECK: ipm %r2 108 ; CHECK: ipm %r2 121 ; CHECK: ipm %r2 [all …]
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| H A D | selectcc-02.ll | 8 ; CHECK: ipm %r2 20 ; CHECK: ipm %r2 33 ; CHECK: ipm %r2 45 ; CHECK: ipm %r2 58 ; CHECK: ipm %r2 70 ; CHECK: ipm %r2 83 ; CHECK: ipm %r2 95 ; CHECK: ipm %r2 107 ; CHECK: ipm %r2 120 ; CHECK: ipm %r2 [all …]
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| H A D | memset-04.ll | 144 ; CHECK: mvc 1(6,%r2), 0(%r2) 154 ; CHECK: mvc 1(6,%r2), 0(%r2) 222 ; CHECK: mvc 1(10,%r2), 0(%r2) 232 ; CHECK: mvc 1(10,%r2), 0(%r2) 262 ; CHECK: mvc 1(12,%r2), 0(%r2) 272 ; CHECK: mvc 1(12,%r2), 0(%r2) 282 ; CHECK: mvc 1(13,%r2), 0(%r2) 292 ; CHECK: mvc 1(13,%r2), 0(%r2) 302 ; CHECK: mvc 1(14,%r2), 0(%r2) 312 ; CHECK: mvc 1(14,%r2), 0(%r2) [all …]
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| H A D | memset-07.ll | 15 ; CHECK: mvc 1(255,%r2), 0(%r2) 16 ; CHECK: la %r2, 256(%r2) 19 ; CHECK-NEXT: mvc 1(1,%r2), 0(%r2) 32 ; CHECK: mvc 1(255,%r2), 0(%r2) 33 ; CHECK: la %r2, 256(%r2) 36 ; CHECK-NEXT: mvc 1(254,%r2), 0(%r2) 56 ; CHECK-NEXT: mvc 1(255,%r2), 0(%r2) 57 ; CHECK-NEXT: la %r2, 256(%r2) 85 ; CHECK-NEXT: mvc 1(255,%r2), 0(%r2) 86 ; CHECK-NEXT: la %r2, 256(%r2) [all …]
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| H A D | memset-03.ll | 143 ; CHECK: xc 0(7,%r2), 0(%r2) 152 ; CHECK: xc 0(7,%r2), 0(%r2) 219 ; CHECK: xc 0(11,%r2), 0(%r2) 228 ; CHECK: xc 0(11,%r2), 0(%r2) 257 ; CHECK: xc 0(13,%r2), 0(%r2) 266 ; CHECK: xc 0(13,%r2), 0(%r2) 275 ; CHECK: xc 0(14,%r2), 0(%r2) 284 ; CHECK: xc 0(14,%r2), 0(%r2) 293 ; CHECK: xc 0(15,%r2), 0(%r2) 302 ; CHECK: xc 0(15,%r2), 0(%r2) [all …]
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| /llvm-project-15.0.7/llvm/test/CodeGen/Thumb2/ |
| H A D | mve-vecreduce-addpred.ll | 318 ; CHECK-NEXT: asrs r2, r2, #31 343 ; CHECK-NEXT: asrs r2, r2, #31 360 ; CHECK-NEXT: asrs r2, r2, #31 925 ; CHECK-NEXT: asrs r2, r2, #31 950 ; CHECK-NEXT: asrs r2, r2, #31 967 ; CHECK-NEXT: asrs r2, r2, #31 1227 ; CHECK-NEXT: sxtb r2, r2 1254 ; CHECK-NEXT: sxtb r2, r2 1273 ; CHECK-NEXT: sxtb r2, r2 1888 ; CHECK-NEXT: sxth r2, r2 [all …]
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| H A D | mve-vecreduce-add.ll | 248 ; CHECK-NEXT: sxth r2, r2 585 ; CHECK-NEXT: sxtb r2, r2 590 ; CHECK-NEXT: sxtb r2, r2 594 ; CHECK-NEXT: sxtb r2, r2 598 ; CHECK-NEXT: sxtb r2, r2 602 ; CHECK-NEXT: sxtb r2, r2 606 ; CHECK-NEXT: sxtb r2, r2 610 ; CHECK-NEXT: sxtb r2, r2 668 ; CHECK-NEXT: sxtb r2, r2 964 ; CHECK-NEXT: sxth r2, r2 [all …]
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| H A D | mve-masked-store.ll | 39 ; CHECK-LE-NEXT: ubfx r2, r2, #12, #1 42 ; CHECK-LE-NEXT: rsbs r2, r2, #0 78 ; CHECK-BE-NEXT: and r2, r2, #1 81 ; CHECK-BE-NEXT: rsbs r2, r2, #0 218 ; CHECK-LE-NEXT: lsls r2, r2, #31 286 ; CHECK-BE-NEXT: lsls r2, r2, #24 501 ; CHECK-LE-NEXT: rsbs r2, r2, #0 538 ; CHECK-BE-NEXT: and r2, r2, #1 541 ; CHECK-BE-NEXT: rsbs r2, r2, #0 945 ; CHECK-LE-NEXT: rsbs r2, r2, #0 [all …]
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| /llvm-project-15.0.7/llvm/test/CodeGen/ARM/ |
| H A D | machine-outliner-no-lr-save.mir | 27 $r2 = MOVi 1, 14, $noreg, $noreg 28 $r2 = MOVi 1, 14, $noreg, $noreg 29 $r2 = MOVi 1, 14, $noreg, $noreg 30 $r2 = MOVi 1, 14, $noreg, $noreg 33 $r2 = MOVi 1, 14, $noreg, $noreg 34 $r2 = MOVi 1, 14, $noreg, $noreg 35 $r2 = MOVi 1, 14, $noreg, $noreg 36 $r2 = MOVi 1, 14, $noreg, $noreg 54 $r2 = t2MOVi 1, 14, $noreg, $noreg 58 t2STRi12 $r2, $sp, 0, 14, $noreg [all …]
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| /llvm-project-15.0.7/libc/AOR_v20.02/string/arm/ |
| H A D | strcmp-armv6m.S | 27 lsrs r0, r2, \n 33 mov r2, r0 35 orrs r2, r1 36 lsls r2, r2, #30 44 bics r4, r2 55 cmp r2, r3 57 cmp r2, r3 100 cmp r2, #0 102 cmp r2, r3 108 cmp r2, #0 [all …]
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