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Searched refs:prefx (Results 1 – 9 of 9) sorted by relevance

/llvm-project-15.0.7/llvm/test/MC/Mips/
H A Dmicromips-control-instructions.s53 # CHECK-EL: prefx 1, $3($5) # encoding: [0x65,0x54,0xa0,0x09]
87 # CHECK-EB: prefx 1, $3($5) # encoding: [0x54,0x65,0x09,0xa0]
116 prefx 1, $3($5)
H A Dmicromips-invalid.s80 prefx -1, $8($5) # CHECK: :[[@LINE]]:9: error: expected 5-bit unsigned immediate
81 prefx 32, $8($5) # CHECK: :[[@LINE]]:9: error: expected 5-bit unsigned immediate
/llvm-project-15.0.7/llvm/test/MC/Mips/mips32r6/
H A Dinvalid-mips4.s14 …prefx 0,$2($31) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
/llvm-project-15.0.7/llvm/test/MC/Mips/mips64r6/
H A Dinvalid-mips4.s17 …prefx 0,$2($31) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
/llvm-project-15.0.7/llvm/test/MC/Mips/micromips/
H A Dvalid.s287 prefx 1, $3($5) # CHECK: prefx 1, $3($5) # encoding: [0x54,0x65,0x09,0xa0] label
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/micromips32r3/
H A Dvalid-el.txt193 0x65 0x54 0xa0 0x09 # CHECK: prefx 1, $3($5)
H A Dvalid.txt193 0x54 0x65 0x09 0xa0 # CHECK: prefx 1, $3($5)
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMicroMipsInstrInfo.td1097 def PREFX_MM : PrefetchIndexed<"prefx">, POOL32F_PREFX_FM_MM<0x15, 0x1A0>,
H A DMipsInstrInfo.td2528 // FIXME: We are missing the prefx instruction.