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/llvm-project-15.0.7/libcxx/test/std/input.output/filesystems/class.path/path.member/path.assign/
H A Dsource.pass.cpp58 path& pref = (p = S); in RunTestCase() local
59 assert(&pref == &p); in RunTestCase()
71 assert(&pref == &p); in RunTestCase()
84 path& pref = (p = S); in RunTestCase() local
85 assert(&pref == &p); in RunTestCase()
97 assert(&pref == &p); in RunTestCase()
112 assert(&pref == &p); in RunTestCase()
122 assert(&pref == &p); in RunTestCase()
132 assert(&pref == &p); in RunTestCase()
147 assert(&pref == &p); in RunTestCase()
[all …]
H A Dcopy.pass.cpp32 path& pref = (p2 = p); in main() local
35 assert(&pref == &p2); in main()
H A Dmove.pass.cpp39 path& pref = (p2 = std::move(p)); in main() local
42 assert(&pref == &p2); in main()
/llvm-project-15.0.7/libcxx/test/std/input.output/filesystems/class.directory_entry/directory_entry.obs/
H A Dpath.pass.cpp38 path const& pref = e.path(); in test_path_method() local
39 assert(pref == p); in test_path_method()
40 assert(&pref == &e.path()); in test_path_method()
42 assert(pref == p2); in test_path_method()
43 assert(&pref == &e.path()); in test_path_method()
71 path const& pref = e; in test_path_conversion() local
72 assert(&pref == &e.path()); in test_path_conversion()
77 path const& pref = e; in test_path_conversion() local
78 assert(&pref == &e.path()); in test_path_conversion()
81 assert(pref == p2); in test_path_conversion()
[all …]
/llvm-project-15.0.7/clang/test/Sema/
H A Dalign-x86-abi7.c7 #define CHECK_ALIGNMENT(type, name, pref) \ argument
9 STATIC_ASSERT(__alignof__(name) == pref); \
10 STATIC_ASSERT(__alignof__(type) == pref); \
11 STATIC_ASSERT(_Alignof(type) == pref)
H A Dalign-x86.c7 #define CHECK_ALIGNMENT(type, name, abi, pref) \ argument
9 STATIC_ASSERT(__alignof__(name) == pref); \
10 STATIC_ASSERT(__alignof__(type) == pref); \
/llvm-project-15.0.7/llvm/test/MC/Mips/
H A Dmicromips-control-instructions.s19 # CHECK-EL: pref 1, 8($5) # encoding: [0x25,0x60,0x08,0x20]
64 # CHECK-EB: pref 1, 8($5) # encoding: [0x60,0x25,0x20,0x08]
93 pref 1, 8($5)
H A Dmicromips-invalid.s67 pref -1, 8($5) # CHECK: :[[@LINE]]:8: error: expected 5-bit unsigned immediate
68 pref 32, 8($5) # CHECK: :[[@LINE]]:8: error: expected 5-bit unsigned immediate
/llvm-project-15.0.7/mlir/include/mlir/ExecutionEngine/
H A DSparseTensorUtils.h155 StridedMemRefType<index_type, 1> *pref,
187 StridedMemRefType<index_type, 1> *pref);
/llvm-project-15.0.7/mlir/lib/ExecutionEngine/
H A DSparseTensorUtils.cpp1556 StridedMemRefType<index_type, 1> *pref, in _mlir_ciface_newSparseTensor() argument
1559 assert(aref && sref && pref); in _mlir_ciface_newSparseTensor()
1561 pref->strides[0] == 1); in _mlir_ciface_newSparseTensor()
1562 assert(aref->sizes[0] == sref->sizes[0] && sref->sizes[0] == pref->sizes[0]); in _mlir_ciface_newSparseTensor()
1565 const index_type *perm = pref->data + pref->offset; in _mlir_ciface_newSparseTensor()
1723 StridedMemRefType<index_type, 1> *pref) { \ in FOREVERY_O()
1724 assert(coo &&vref &&iref &&pref); \ in FOREVERY_O()
1725 assert(iref->strides[0] == 1 && pref->strides[0] == 1); \ in FOREVERY_O()
1726 assert(iref->sizes[0] == pref->sizes[0]); \ in FOREVERY_O()
1728 const index_type *perm = pref->data + pref->offset; \ in FOREVERY_O()
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips3/
H A Dinvalid-xfail.txt14 0xce 0x00 0x00 0x00 # pref 0, 0($16) # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A D2009-08-17-inline-asm-addr-mode-breakage.ll1 ; RUN: llc -verify-machineinstrs < %s -disable-ppc-ilp-pref | FileCheck %s
H A Dctrloop-shortLoops.ll130 %.pref = load i32, i32* @f, align 4
140 %5 = phi i32 [ %.pref, %entry ], [ %11, %for.body ]
H A Dvec_buildvector_loadstore.ll2 …nstrs < %s -mtriple=powerpc-unknown-linux-gnu -mattr=+altivec -disable-ppc-ilp-pref | FileCheck %s
H A Dctrloop-reg.ll47 define i32 @interpret(%struct.ref_s.1.49.91.115.121.139.145.151.157.163.169.175.181.211* %pref, i32…
H A D2011-12-05-NoSpillDupCR.ll1 …machineinstrs < %s -mtriple=powerpc-unknown-linux-gnu -mcpu=g4 -disable-ppc-ilp-pref | FileCheck %s
2 …chineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=g4 -disable-ppc-ilp-pref | FileCheck %s
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dinnermost-loop-alignment.ll3 ; RUN: llc < %s -mtriple=i686-pc-linux-gnu -x86-experimental-pref-innermost-loop-alignment=5 | File…
4 ; RUN: llc < %s -mtriple=i686-pc-linux-gnu -align-loops=32 -x86-experimental-pref-innermost-loop-al…
/llvm-project-15.0.7/llvm/test/MC/Mips/micromips/
H A Dinvalid.s38 pref -1, 255($7) # CHECK: :[[@LINE]]:8: error: expected 5-bit unsigned immediate
39 pref 32, 255($7) # CHECK: :[[@LINE]]:8: error: expected 5-bit unsigned immediate
H A Dvalid.s260 pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0x60,0x25,0x20,0x08] label
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsEVAInstrInfo.td209 /// EVA versions of cache and pref
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips4/
H A Dvalid-mips4.txt249 0xcc 0x20 0x00 0x00 # CHECK: pref 0, 0($1)
250 0xcc 0xa1 0x00 0x08 # CHECK: pref 1, 8($5)
/llvm-project-15.0.7/llvm/test/MC/Mips/mips32/
H A Dvalid.s187 … pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0xcc,0xa1,0x00,0x08]
/llvm-project-15.0.7/llvm/test/MC/Mips/mips32r5/
H A Dvalid.s214 … pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0xcc,0xa1,0x00,0x08]
/llvm-project-15.0.7/llvm/test/MC/Mips/mips32r2/
H A Dvalid.s213 … pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0xcc,0xa1,0x00,0x08]
/llvm-project-15.0.7/llvm/test/MC/Mips/mips32r3/
H A Dvalid.s213 … pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0xcc,0xa1,0x00,0x08]

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