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/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A D2008-02-27-PEICrash.ll11 %tmp36.pn = phi float [ 0.000000e+00, %bb33 ], [ 0.000000e+00, %entry ] ; <float> [#uses=1]
13 %a.pn = phi float [ %a, %bb33 ], [ %b, %entry ] ; <float> [#uses=1]
15 %tmp51.pn = phi float [ 0.000000e+00, %bb33 ], [ %a, %entry ] ; <float> [#uses=1]
16 %tmp44.pn = fmul float %tmp36.pn, %b.pn509 ; <float> [#uses=1]
17 %tmp46.pn = fadd float %tmp44.pn, %a.pn ; <float> [#uses=1]
18 %tmp53.pn = fsub float 0.000000e+00, %tmp51.pn ; <float> [#uses=1]
19 %x.0 = fdiv float %tmp46.pn, %tmp41.pn508 ; <float> [#uses=1]
20 %y.0 = fdiv float %tmp53.pn, 0.000000e+00 ; <float> [#uses=1]
H A D2008-03-14-SpillerCrash.ll25 %tmp370371552.pn.in = phi i32 [ %tmp233, %bb271.us ], [ %tmp313, %bb311.split ] ; <i32> [#uses=1]
26 %tmp278279.pn = phi i64 [ 0, %bb271.us ], [ %tmp373.reg2mem.0.ph, %bb311.split ] ; <i64> [#uses=1]
28 %tmp366367550.pn = sext i32 %base to i64 ; <i64> [#uses=1]
29 %tmp370371552.pn = zext i32 %tmp370371552.pn.in to i64 ; <i64> [#uses=1]
30 %tmp369551.pn = mul i64 %tmp278279.pn, %tmp366367550.pn ; <i64> [#uses=1]
31 %tmp373.reg2mem.0.ph = add i64 %tmp370371552.pn, %tmp369551.pn ; <i64> [#uses=1]
H A D2009-02-09-ivs-different-sizes.ll19 … %p_addr.0.pn.rec = phi i64 [ %p_addr.6.rec, %bb62 ], [ 0, %bb54 ] ; <i64> [#uses=2]
21 %indvar202 = trunc i64 %p_addr.0.pn.rec to i32 ; <i32>[#uses=1]
23 %p_addr.6.rec = add i64 %p_addr.0.pn.rec, 1 ; <i64>[#uses=2]
H A Dcoalescer-commute5.ll21 …%tmp4360.not28.pn = phi <2 x i64> [ %tmp4360.not28, %bb4743 ], [ %tmp4297, %bb1664 ] ; <<2 x i64>…
22 %tmp4415.not.pn = or <2 x i64> zeroinitializer, %tmp4360.not28.pn ; <<2 x i64>> [#uses=0]
/llvm-project-15.0.7/llvm/test/MC/Sparc/
H A Dsparc64-ctrl-instructions.s294 bne,pn %icc, .BB0
298 be,pn %icc, .BB0
302 bg,pn %icc, .BB0
306 ble,pn %icc, .BB0
310 bge,pn %icc, .BB0
314 bl,pn %icc, .BB0
318 bgu,pn %icc, .BB0
326 bcc,pn %icc, .BB0
567 be,pn %xcc, .BB0
571 bg,pn %xcc, .BB0
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/IndVarSimplify/
H A Dcasted-argument.ll17 %pn = phi i8* [ %ge, %loop ], [ null, %entry ] ; <i8*> [#uses=1]
20 %ge = getelementptr i8, i8* %pn, i32 %su ; <i8*> [#uses=2]
37 %sub.ptr4912.pn = phi i8* [ %sub.ptr4912, %if.end54 ], [ null, %if.else ] ; <i8*> [#uses=1]
39 %sub.ptr.rhs.cast46.pn = ptrtoint i8* %from to i32 ; <i32> [#uses=1]
40 %sub.ptr.lhs.cast45.pn = ptrtoint i8* %to to i32 ; <i32> [#uses=1]
41 %sub.ptr.sub47.pn = sub i32 %sub.ptr.rhs.cast46.pn, %sub.ptr.lhs.cast45.pn ; <i32> [#uses=1]
42 %sub.ptr4912 = getelementptr i8, i8* %sub.ptr4912.pn, i32 %sub.ptr.sub47.pn ; <i8*> [#uses=2]
H A D2003-12-10-RemoveInstrCrash.ll9 %j.0.pn = phi i32 [ %inc.3, %no_exit ], [ %inc.2, %entry ] ; <i32> [#uses=1]
10 %k.0.pn = phi i32 [ %inc.4, %no_exit ], [ 1, %entry ] ; <i32> [#uses=1]
11 %inc.3 = add i32 %j.0.pn, 1 ; <i32> [#uses=1]
12 %inc.4 = add i32 %k.0.pn, 1 ; <i32> [#uses=1]
H A Dashr-tripcount.ll26 …%pow_2_tab.pn = phi [0 x float]* [ @i_pow_2_tab, %bb1 ], [ @pow_2_tab, %entry ] ; <[0 x float]*> …
28 …%pow_2_025_tab.pn = phi [0 x float]* [ @i_pow_2_025_tab, %bb1 ], [ @pow_2_025_tab, %entry ] ; <[0…
34 …%.pn.in = getelementptr [0 x float], [0 x float]* %pow_2_tab.pn, i64 0, i64 %.pn3 ; <float*> [#us…
35 …%.pn1.in = getelementptr [0 x float], [0 x float]* %pow_2_025_tab.pn, i64 0, i64 %.pn2 ; <float*>…
36 %.pn = load float, float* %.pn.in ; <float> [#uses=1]
38 %invQuantizer.0 = fmul float %.pn, %.pn1 ; <float> [#uses=4]
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dsme-intrinsics-mops.ll4 define void @bfmops(<vscale x 8 x i1> %pn, <vscale x 8 x i1> %pm, <vscale x 8 x bfloat> %zn, <vscal…
13 define void @fmops(<vscale x 8 x i1> %pn, <vscale x 8 x i1> %pm, <vscale x 8 x half> %zn, <vscale x…
22 define void @smops_s(<vscale x 16 x i1> %pn, <vscale x 16 x i1> %pm, <vscale x 16 x i8> %zn, <vscal…
31 define void @smops_d(<vscale x 8 x i1> %pn, <vscale x 8 x i1> %pm, <vscale x 8 x i16> %zn, <vscale …
40 define void @umops_s(<vscale x 16 x i1> %pn, <vscale x 16 x i1> %pm, <vscale x 16 x i8> %zn, <vscal…
49 define void @umops_d(<vscale x 8 x i1> %pn, <vscale x 8 x i1> %pm, <vscale x 8 x i16> %zn, <vscale …
58 define void @fmops_s(<vscale x 4 x i1> %pn, <vscale x 4 x i1> %pm, <vscale x 4 x float> %zn, <vscal…
76 define void @sumops_s(<vscale x 16 x i1> %pn, <vscale x 16 x i1> %pm, <vscale x 16 x i8> %zn, <vsca…
85 define void @sumops_d(<vscale x 8 x i1> %pn, <vscale x 8 x i1> %pm, <vscale x 8 x i16> %zn, <vscale…
94 define void @usmops_s(<vscale x 16 x i1> %pn, <vscale x 16 x i1> %pm, <vscale x 16 x i8> %zn, <vsca…
[all …]
H A Dsme-intrinsics-mopa.ll4 define void @bfmopa(<vscale x 8 x i1> %pn, <vscale x 8 x i1> %pm, <vscale x 8 x bfloat> %zn, <vscal…
13 define void @fmopa(<vscale x 8 x i1> %pn, <vscale x 8 x i1> %pm, <vscale x 8 x half> %zn, <vscale x…
22 define void @smopa_s(<vscale x 16 x i1> %pn, <vscale x 16 x i1> %pm, <vscale x 16 x i8> %zn, <vscal…
31 define void @smopa_d(<vscale x 8 x i1> %pn, <vscale x 8 x i1> %pm, <vscale x 8 x i16> %zn, <vscale …
40 define void @umopa_s(<vscale x 16 x i1> %pn, <vscale x 16 x i1> %pm, <vscale x 16 x i8> %zn, <vscal…
49 define void @umopa_d(<vscale x 8 x i1> %pn, <vscale x 8 x i1> %pm, <vscale x 8 x i16> %zn, <vscale …
58 define void @fmopa_s(<vscale x 4 x i1> %pn, <vscale x 4 x i1> %pm, <vscale x 4 x float> %zn, <vscal…
76 define void @sumopa_s(<vscale x 16 x i1> %pn, <vscale x 16 x i1> %pm, <vscale x 16 x i8> %zn, <vsca…
85 define void @sumopa_d(<vscale x 8 x i1> %pn, <vscale x 8 x i1> %pm, <vscale x 8 x i16> %zn, <vscale…
94 define void @usmopa_s(<vscale x 16 x i1> %pn, <vscale x 16 x i1> %pm, <vscale x 16 x i8> %zn, <vsca…
[all …]
H A Dsme-intrinsics-add.ll4 define void @addha_s(<vscale x 4 x i1> %pn, <vscale x 4 x i1> %pm, <vscale x 4 x i32> %zn) {
9 …call void @llvm.aarch64.sme.addha.nxv4i32(i64 0, <vscale x 4 x i1> %pn, <vscale x 4 x i1> %pm, <vs…
13 define void @addva_s(<vscale x 4 x i1> %pn, <vscale x 4 x i1> %pm, <vscale x 4 x i32> %zn) {
18 …call void @llvm.aarch64.sme.addva.nxv4i32(i64 3, <vscale x 4 x i1> %pn, <vscale x 4 x i1> %pm, <vs…
22 define void @addha_d(<vscale x 2 x i1> %pn, <vscale x 2 x i1> %pm, <vscale x 2 x i64> %zn) {
27 …call void @llvm.aarch64.sme.addha.nxv2i64(i64 0, <vscale x 2 x i1> %pn, <vscale x 2 x i1> %pm, <vs…
31 define void @addva_d(<vscale x 2 x i1> %pn, <vscale x 2 x i1> %pm, <vscale x 2 x i64> %zn) {
36 …call void @llvm.aarch64.sme.addva.nxv2i64(i64 7, <vscale x 2 x i1> %pn, <vscale x 2 x i1> %pm, <vs…
H A Darm64-2012-01-11-ComparisonDAGCrash.ll26 %.pn.v = select i1 %0, i320 128, i320 64
27 %.pn = shl i320 %1, %.pn.v
28 %ins346392 = or i320 %.pn, 0
/llvm-project-15.0.7/clang/test/Analysis/
H A Dunions.cpp17 void CloneParseTree(ParseNode *opn, ParseNode *pn, ParseNode *x) { in CloneParseTree() argument
29 *pn = *opn; in CloneParseTree()
30 x = pn->pn_u.lexdef->pn_u.lexdef; in CloneParseTree()
50 void CloneParseTree(ParseNode *opn, ParseNode *pn, ParseNode *x) { in CloneParseTree() argument
51 pn->pn_u = opn->pn_u; in CloneParseTree()
52 x = pn->pn_u.name.lexdef->pn_u.name.lexdef; in CloneParseTree()
/llvm-project-15.0.7/libclc/generic/lib/math/
H A Dasinh.cl203 double pn, tn, pd, td;
210 pn = fma(t, fma(t, fma(t, NI3, NI2), NI1), NI0);
215 pn = absx < 8.0 ? tn : pn;
220 pn = absx < 4.0 ? tn : pn;
225 pn = absx < 2.0 ? tn : pn;
230 pn = absx < 1.5 ? tn : pn;
235 pn = absx <= 1.0 ? tn : pn;
240 pn = absx < 0.75 ? tn : pn;
245 pn = absx < 0.5 ? tn : pn;
250 pn = absx < 0.25 ? tn : pn;
[all …]
/llvm-project-15.0.7/polly/test/CodeGen/
H A Dpartial_write_impossible_restriction.ll10 define void @partial_write_impossible_restriction(i32* %.pn) {
40 %add.ptr.i1132 = getelementptr inbounds i32, i32* %.pn, i64 %indvars.iv1602
51 ; CHECK: %polly.access..pn{{[0-9]*}} = getelementptr i32, i32* %.pn, i64 %polly.indvar
52 …i32 %cond.in.sroa.speculate.load.cond.false_p_scalar_, i32* %polly.access..pn{{[0-9]*}}, align 4, …
56 ; CHECK: %polly.access..pn{{[0-9]*}} = getelementptr i32, i32* %.pn, i64 0
57 …in.sroa.speculate.load.cond.false_p_scalar_{{[0-9]*}}, i32* %polly.access..pn{{[0-9]*}}, align 4, …
/llvm-project-15.0.7/clang/test/SemaCXX/
H A Ddesignated-initializers.cpp64 extern PN pn;
69 PN pn; member
75 .pn = pn, in f()
H A Dnullptr.cpp61 nullptr_t *pn = &null; in f() local
65 (void)reinterpret_cast<uintptr_t>(*pn); in f()
70 int *ip = *pn; in f()
71 if (*pn) { } in f()
/llvm-project-15.0.7/llvm/test/CodeGen/Thumb2/LowOverheadLoops/
H A Dminloop.ll98 …%pSrc.addr.021.pn = phi i32* [ %pSrc, %while.body.preheader.new ], [ %pSrc.addr.021.3, %while.body…
103 %pSrc.addr.021 = getelementptr inbounds i32, i32* %pSrc.addr.021.pn, i32 1
110 %pSrc.addr.021.1 = getelementptr inbounds i32, i32* %pSrc.addr.021.pn, i32 2
117 %pSrc.addr.021.2 = getelementptr inbounds i32, i32* %pSrc.addr.021.pn, i32 3
124 %pSrc.addr.021.3 = getelementptr inbounds i32, i32* %pSrc.addr.021.pn, i32 4
138 …%pSrc.addr.021.pn.unr = phi i32* [ %pSrc, %while.body.preheader ], [ %pSrc.addr.021.3, %while.body…
146 %pSrc.addr.021.epil = getelementptr inbounds i32, i32* %pSrc.addr.021.pn.unr, i32 1
164 %pSrc.addr.021.epil.1 = getelementptr inbounds i32, i32* %pSrc.addr.021.pn.unr, i32 2
175 %pSrc.addr.021.epil.2 = getelementptr inbounds i32, i32* %pSrc.addr.021.pn.unr, i32 3
/llvm-project-15.0.7/llvm/test/Transforms/LICM/
H A Dsinking.ll150 %dec = add i32 %N_addr.0.pn, -1 ; <i32> [#uses=1]
248 %tmp.6 = mul i32 %N, %N_addr.0.pn
253 %tmp.1 = icmp ne i32 %N_addr.0.pn, 1
563 %sink.mul = mul i32 %N, %N_addr.0.pn
565 %dec = add i32 %N_addr.0.pn, -1
568 %tmp.1 = icmp ne i32 %N_addr.0.pn, 1
610 %sink.mul = mul i32 %N, %N_addr.0.pn
613 %dec = add i32 %N_addr.0.pn, -1
616 %tmp.1 = icmp ne i32 %N_addr.0.pn, 1
727 %sink.mul = mul i32 %N, %N_addr.0.pn
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A D2008-07-15-Fabs.ll13 %.pn = fsub ppc_fp128 0xM00000000000000000000000000000000, %.pn106 ; <ppc_fp128> [#uses=1]
14 %y.0 = fdiv ppc_fp128 %.pn, 0xM00000000000000000000000000000000 ; <ppc_fp128> [#uses=1]
/llvm-project-15.0.7/llvm/test/Transforms/LoopRotate/
H A DPhiSelfReference-1.ll30 %sx_addr.2.pn = phi float* [ %sx_addr.5, %bb243 ], [ null, %bb52 ] ; <float*> [#uses=1]
31 %sx_addr.5 = getelementptr float, float* %sx_addr.2.pn, i32 %incx ; <float*> [#uses=1]
/llvm-project-15.0.7/llvm/test/CodeGen/Thumb2/
H A D2009-09-01-PostRAProlog.ll59 %.pn.in.in.i = or i32 %.pn2.i, %.pn3.i ; <i32> [#uses=1]
60 %.pn.in.i = zext i32 %.pn.in.in.i to i64 ; <i64> [#uses=1]
61 %.pn.i = shl i64 %.pn.in.i, 21 ; <i64> [#uses=1]
63 %iftmp.22.0.i = or i64 %.pn.i, %.pn1.i ; <i64> [#uses=2]
/llvm-project-15.0.7/llvm/test/Transforms/LoopIdiom/
H A Dlir-heurs-multi-block-loop.ll50 %.pn = phi i32 [ %2, %if.then ], [ %1, %if.else ]
51 %BASKET.1 = add nsw i32 %.pn, %BASKET.013
110 %.pn = phi i32 [ %0, %if.then ], [ %1, %if.else ]
111 %BASKET.2 = add nsw i32 %.pn, %BASKET.123
167 %.pn = phi i32 [ %2, %if.then ], [ %1, %if.else ]
168 %BASKET.1 = add nsw i32 %.pn, %BASKET.013
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/compactbranches/
H A Dcompact-branch-policy.ll23 %call.pn = phi i32 [ %call, %if.then ], [ -1, %entry ]
24 %c.0 = add nsw i32 %call.pn, %add
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DSMEInstrFormats.td32 : Pseudo<(outs), (ins i64imm:$tile, PPR3bAny:$pn, PPR3bAny:$pm,
72 def : Pat<(op imm0_3:$tile, (nxv4i1 PPR3bAny:$pn), (nxv4i1 PPR3bAny:$pm),
85 def : Pat<(op imm0_7:$tile, (nxv2i1 PPR3bAny:$pn), (nxv2i1 PPR3bAny:$pm),
242 imm0_3:$tile, (nxv4i1 PPR3bAny:$pn), (nxv4i1 PPR3bAny:$pm),
244 (ADDHA_MPPZ_PSEUDO_S imm0_3:$tile, $pn, $pm, $zn)>;
246 imm0_3:$tile, (nxv4i1 PPR3bAny:$pn), (nxv4i1 PPR3bAny:$pm),
248 (ADDVA_MPPZ_PSEUDO_S imm0_3:$tile, $pn, $pm, $zn)>;
255 imm0_7:$tile, (nxv2i1 PPR3bAny:$pn), (nxv2i1 PPR3bAny:$pm),
257 (ADDHA_MPPZ_PSEUDO_D imm0_7:$tile, $pn, $pm, $zn)>;
259 imm0_7:$tile, (nxv2i1 PPR3bAny:$pn), (nxv2i1 PPR3bAny:$pm),
[all …]

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