| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | pre-ra-sched.ll | 16 define i32 @test(ptr %pin) #0 {
17 %l0 = load i8, ptr %pin, align 1
19 %g1a = getelementptr inbounds i8, ptr %pin, i64 1
22 %g1b = getelementptr inbounds i8, ptr %pin, i64 2
29 %g2a = getelementptr inbounds i8, ptr %pin, i64 3
32 %g2b = getelementptr inbounds i8, ptr %pin, i64 4
38 %g3a = getelementptr inbounds i8, ptr %pin, i64 5
41 %g3b = getelementptr inbounds i8, ptr %pin, i64 6
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| /llvm-project-15.0.7/llvm/test/DebugInfo/MIR/X86/ |
| H A D | regcoalescing-clears-dead-dbgvals.mir | 16 define i32 @test(i32* %pin) {
22 %baz = load i32, i32* %pin, align 1
34 define i32 @test2(i32* %pin) {
86 %8:gr32 = MOV32rm %2, 1, $noreg, 0, $noreg :: (load (s32) from %ir.pin, align 1)
131 %8:gr32 = MOV32rm %2, 1, $noreg, 0, $noreg :: (load (s32) from %ir.pin, align 1)
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| /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ |
| H A D | local-stack-alloc-block-sp-reference.ll | 8 ; %pin.low is allocated to offset 0.
93 %pin.low = alloca i32, align 8192, addrspace(5)
95 store volatile i32 0, i32 addrspace(5)* %pin.low
189 %pin.low = alloca i32, align 8192, addrspace(5)
191 store volatile i32 0, i32 addrspace(5)* %pin.low
320 %pin.low = alloca i32, align 1024, addrspace(5)
322 store volatile i32 0, i32 addrspace(5)* %pin.low
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| /llvm-project-15.0.7/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
| H A D | RangedConstraintManager.h | 394 bool pin(llvm::APSInt &Lower, llvm::APSInt &Upper) const;
395 bool pin(llvm::APSInt &Point) const;
|
| /llvm-project-15.0.7/llvm/test/Transforms/GlobalDCE/ |
| H A D | comdats.ll | 166 ; An external function to pin as "used" various things above that shouldn't be
|
| /llvm-project-15.0.7/clang/lib/StaticAnalyzer/Core/ |
| H A D | RangeConstraintManager.cpp | 372 if (isEmpty() || !pin(Point)) in containsImpl()
383 bool RangeSet::pin(llvm::APSInt &Point) const { in pin() function in RangeSet
392 bool RangeSet::pin(llvm::APSInt &Lower, llvm::APSInt &Upper) const { in pin() function in RangeSet
475 if (What.isEmpty() || !What.pin(Lower, Upper)) in intersect()
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| /llvm-project-15.0.7/libcxx/utils/ci/ |
| H A D | buildkite-pipeline.yml | 675 …echnically run on any architecture, but we have more resources on arm64 so we pin this job to arm64
|
| /llvm-project-15.0.7/llvm/include/llvm/Target/ |
| H A D | TargetSchedule.td | 140 // clock cycles, but the scheduler does not pin them to a particular
|
| /llvm-project-15.0.7/libcxx/include/ |
| H A D | atomic | 572 // to pin the underlying type in C++20.
|
| /llvm-project-15.0.7/clang/docs/ |
| H A D | AutomaticReferenceCounting.rst | 1326 of the need to pin those fields in memory and keep them properly
|