Searched refs:physSPReg (Results 1 – 1 of 1) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 35024 Register physSPReg = TFI.Uses64BitFramePtr ? X86::RSP : X86::ESP; in EmitLoweredProbedAlloca() local
35032 .addReg(physSPReg); in EmitLoweredProbedAlloca()
35045 .addReg(physSPReg); in EmitLoweredProbedAlloca()
35067 addRegOffset(BuildMI(blockMBB, DL, TII->get(XORMIOpc)), physSPReg, false, 0) in EmitLoweredProbedAlloca()
35071 TII->get(getSUBriOpcode(TFI.Uses64BitFramePtr, ProbeSize)), physSPReg) in EmitLoweredProbedAlloca()
35072 .addReg(physSPReg) in EmitLoweredProbedAlloca()
35140 physSPReg = in EmitLoweredSegAlloca() local
35155 BuildMI(BB, DL, TII->get(TargetOpcode::COPY), tmpSPVReg).addReg(physSPReg); in EmitLoweredSegAlloca()
35165 BuildMI(bumpMBB, DL, TII->get(TargetOpcode::COPY), physSPReg) in EmitLoweredSegAlloca()
35191 BuildMI(mallocMBB, DL, TII->get(X86::SUB32ri), physSPReg).addReg(physSPReg) in EmitLoweredSegAlloca()
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