Home
last modified time | relevance | path

Searched refs:p4 (Results 1 – 25 of 446) sorted by relevance

12345678910>>...18

/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dlegalize-load-constant.mir74 %0:_(p4) = COPY $vgpr0_vgpr1
1910 ; CI-NEXT: [[LOAD:%[0-9]+]]:_(p4) = G_LOAD [[COPY]](p4) :: (load (p4), addrspace 4)
1916 ; VI-NEXT: [[LOAD:%[0-9]+]]:_(p4) = G_LOAD [[COPY]](p4) :: (load (p4), addrspace 4)
1922 ; GFX9-NEXT: [[LOAD:%[0-9]+]]:_(p4) = G_LOAD [[COPY]](p4) :: (load (p4), addrspace 4)
1925 %1:_(p4) = G_LOAD %0 :: (load (p4), align 8, addrspace 4)
1939 ; CI-NEXT: [[LOAD:%[0-9]+]]:_(p4) = G_LOAD [[COPY]](p4) :: (load (p4), align 4, addrspace 4)
1945 ; VI-NEXT: [[LOAD:%[0-9]+]]:_(p4) = G_LOAD [[COPY]](p4) :: (load (p4), align 4, addrspace 4)
1951 ; GFX9-NEXT: [[LOAD:%[0-9]+]]:_(p4) = G_LOAD [[COPY]](p4) :: (load (p4), align 4, addrspace 4)
1954 %1:_(p4) = G_LOAD %0 :: (load (p4), align 4, addrspace 4)
2040 %1:_(p4) = G_LOAD %0 :: (load (p4), align 2, addrspace 4)
[all …]
H A Dirtranslator-amdgpu_kernel.ll10 ; HSA-VI-NEXT: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr4_sgpr5
44 ; HSA-VI-NEXT: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr4_sgpr5
78 ; HSA-VI-NEXT: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr4_sgpr5
112 ; HSA-VI-NEXT: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr4_sgpr5
146 ; HSA-VI-NEXT: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr4_sgpr5
180 ; HSA-VI-NEXT: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr4_sgpr5
214 ; HSA-VI-NEXT: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr4_sgpr5
246 ; HSA-VI-NEXT: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr4_sgpr5
278 ; HSA-VI-NEXT: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr4_sgpr5
310 ; HSA-VI-NEXT: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr4_sgpr5
[all …]
H A Dregbankselect-load.mir281 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(p4) = COPY [[COPY]](p4)
302 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(p4) = COPY [[COPY]](p4)
324 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(p4) = COPY [[COPY]](p4)
345 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(p4) = COPY [[COPY]](p4)
366 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(p4) = COPY [[COPY]](p4)
393 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(p4) = COPY [[COPY]](p4)
535 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(p4) = COPY [[COPY]](p4)
553 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(p4) = COPY [[COPY]](p4)
571 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(p4) = COPY [[COPY]](p4)
589 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(p4) = COPY [[COPY]](p4)
[all …]
H A Dregbankselect-zextload.mir15 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
16 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(p4) = COPY [[COPY]](p4)
18 %0:_(p4) = COPY $sgpr0_sgpr1
33 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
34 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(p4) = COPY [[COPY]](p4)
36 %0:_(p4) = COPY $sgpr0_sgpr1
51 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
52 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(p4) = COPY [[COPY]](p4)
54 %0:_(p4) = COPY $sgpr0_sgpr1
70 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(p4) = COPY [[COPY]](p4)
[all …]
H A Dregbankselect-sextload.mir15 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
16 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(p4) = COPY [[COPY]](p4)
18 %0:_(p4) = COPY $sgpr0_sgpr1
33 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
34 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(p4) = COPY [[COPY]](p4)
36 %0:_(p4) = COPY $sgpr0_sgpr1
51 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
52 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(p4) = COPY [[COPY]](p4)
54 %0:_(p4) = COPY $sgpr0_sgpr1
70 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(p4) = COPY [[COPY]](p4)
[all …]
H A Dirtranslator-call-abi-attribute-hints.ll25 ; CHECK-NEXT: [[COPY9:%[0-9]+]]:_(p4) = COPY [[COPY6]](p4)
35 ; CHECK-NEXT: $sgpr4_sgpr5 = COPY [[COPY7]](p4)
36 ; CHECK-NEXT: $sgpr6_sgpr7 = COPY [[COPY8]](p4)
37 ; CHECK-NEXT: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4)
66 ; CHECK-NEXT: [[COPY9:%[0-9]+]]:_(p4) = COPY [[COPY6]](p4)
82 ; CHECK-NEXT: $sgpr4_sgpr5 = COPY [[COPY7]](p4)
83 ; CHECK-NEXT: $sgpr6_sgpr7 = COPY [[COPY8]](p4)
106 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(p4) = COPY [[COPY3]](p4)
156 ; CHECK-NEXT: $sgpr4_sgpr5 = COPY [[COPY8]](p4)
157 ; CHECK-NEXT: $sgpr6_sgpr7 = COPY [[COPY9]](p4)
[all …]
H A Dglobal-value.ll20 …; GCN-NEXT: [[LOAD:%[0-9]+]]:_(p4) = G_LOAD [[SI_PC_ADD_REL_OFFSET]](p4) :: (dereferenceable inv…
21 ; GCN-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](p4)
31 …; GCN-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p4) = SI_PC_ADD_REL_OFFSET target-flags(amd…
32 …; GCN-NEXT: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[SI_PC_ADD_REL_OFFSET]](p4) :: (dereferenceable inv…
43 …; GCN-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p4) = SI_PC_ADD_REL_OFFSET target-flags(amd…
44 …; GCN-NEXT: [[LOAD:%[0-9]+]]:_(p999) = G_LOAD [[SI_PC_ADD_REL_OFFSET]](p4) :: (dereferenceable i…
55 …; GCN-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p4) = SI_PC_ADD_REL_OFFSET target-flags(amd…
56 …XT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SI_PC_ADD_REL_OFFSET]](p4)
89 …; GCN-NEXT: [[LOAD:%[0-9]+]]:_(p4) = G_LOAD [[SI_PC_ADD_REL_OFFSET]](p4) :: (dereferenceable inv…
90 ; GCN-NEXT: [[EXTRACT:%[0-9]+]]:_(p6) = G_EXTRACT [[LOAD]](p4), 0
[all …]
H A Dirtranslator-call-return-values.ll92 ; GCN-NEXT: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4)
175 ; GCN-NEXT: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4)
253 ; GCN-NEXT: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4)
314 ; GCN-NEXT: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4)
375 ; GCN-NEXT: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4)
455 ; GCN-NEXT: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4)
517 ; GCN-NEXT: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4)
579 ; GCN-NEXT: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4)
638 ; GCN-NEXT: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4)
699 ; GCN-NEXT: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4)
[all …]
H A Dirtranslator-call.ll116 ; CHECK-NEXT: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4)
228 ; CHECK-NEXT: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4)
284 ; CHECK-NEXT: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4)
340 ; CHECK-NEXT: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4)
399 ; CHECK-NEXT: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4)
459 ; CHECK-NEXT: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4)
518 ; CHECK-NEXT: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4)
578 ; CHECK-NEXT: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4)
639 ; CHECK-NEXT: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4)
698 ; CHECK-NEXT: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4)
[all …]
H A Dlegalize-load-constant-32bit.mir15 ; CI-NEXT: [[MV:%[0-9]+]]:_(p4) = G_MERGE_VALUES [[COPY]](p6), [[C]](p6)
16 ; CI-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[MV]](p4) :: (load (s8), addrspace 6)
18 ; CI-NEXT: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[MV]], [[C1]](s64)
19 …; CI-NEXT: [[ZEXTLOAD1:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[PTR_ADD]](p4) :: (load (s8) from unknown-ad…
24 ; CI-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[MV]], [[C3]](s64)
25 …; CI-NEXT: [[ZEXTLOAD2:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[PTR_ADD1]](p4) :: (load (s8) from unknown-a…
26 ; CI-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD1]], [[C1]](s64)
27 …; CI-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load (s8) from unknown-address + …
50 ; CI-NEXT: [[MV:%[0-9]+]]:_(p4) = G_MERGE_VALUES [[COPY]](p6), [[C]](p6)
51 ; CI-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[MV]](p4) :: (load (s32), addrspace 6)
H A Dregbankselect-split-scalar-load-metadata.mir34 ; SI-NEXT: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
35 …; SI-NEXT: [[LOAD:%[0-9]+]]:sgpr(<2 x s32>) = G_LOAD [[COPY]](p4) :: (load (<2 x s32>), addrspace …
37 ; SI-NEXT: [[PTR_ADD:%[0-9]+]]:sgpr(p4) = G_PTR_ADD [[COPY]], [[C]](s64)
38 …; SI-NEXT: [[LOAD1:%[0-9]+]]:sgpr(s32) = G_LOAD [[PTR_ADD]](p4) :: (load (s32) from unknown-addres…
42 %0:_(p4) = COPY $sgpr0_sgpr1
58 ; SI-NEXT: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
59 …; SI-NEXT: [[LOAD:%[0-9]+]]:sgpr(<2 x s32>) = G_LOAD [[COPY]](p4) :: (load (<2 x s32>), !tbaa !2, …
61 ; SI-NEXT: [[PTR_ADD:%[0-9]+]]:sgpr(p4) = G_PTR_ADD [[COPY]], [[C]](s64)
62 …; SI-NEXT: [[LOAD1:%[0-9]+]]:sgpr(s32) = G_LOAD [[PTR_ADD]](p4) :: (load (s32) from unknown-addres…
66 %0:_(p4) = COPY $sgpr0_sgpr1
H A Dirtranslator-call-implicit-args.ll32 ; GFX900-NEXT: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4)
84 ; GFX908-NEXT: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4)
229 ; GFX900-NEXT: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4)
317 ; GFX908-NEXT: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4)
665 ; GFX900-NEXT: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY7]](p4)
706 ; GFX908-NEXT: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY7]](p4)
752 ; GFX900-NEXT: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY7]](p4)
797 ; GFX908-NEXT: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY7]](p4)
847 ; GFX900-NEXT: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY7]](p4)
892 ; GFX908-NEXT: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY7]](p4)
[all …]
H A Dinst-select-load-smrd.mir105 %0:sgpr(p4) = COPY $sgpr0_sgpr1
108 %2:sgpr(p4) = G_PTR_ADD %0, %1
113 %5:sgpr(p4) = G_PTR_ADD %0, %4
118 %8:sgpr(p4) = G_PTR_ADD %0, %7
158 %30:sgpr(p4) = G_LOAD %0 :: (load (p4) from %ir.const0, addrspace 4)
171 %0:sgpr(p4) = COPY $sgpr0_sgpr1
210 %0:sgpr(p4) = G_CONSTANT i64 44
212 %2:sgpr(p4) = G_PTR_ADD %0, %1
233 %4:sgpr(p4) = G_PTR_ADD %0, %2
256 %4:sgpr(p4) = G_PTR_ADD %0, %2
[all …]
H A Dlegalize-sextload-constant-32bit.mir16 ; CI-NEXT: [[MV:%[0-9]+]]:_(p4) = G_MERGE_VALUES [[COPY]](p6), [[C]](p6)
17 ; CI-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[MV]](p4) :: (load (s32), addrspace 6)
36 ; CI-NEXT: [[MV:%[0-9]+]]:_(p4) = G_MERGE_VALUES [[COPY]](p6), [[C]](p6)
37 ; CI-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[MV]](p4) :: (load (s32), align 2, addrspace 6)
56 ; CI-NEXT: [[MV:%[0-9]+]]:_(p4) = G_MERGE_VALUES [[COPY]](p6), [[C]](p6)
57 ; CI-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[MV]](p4) :: (load (s32), align 1, addrspace 6)
76 ; CI-NEXT: [[MV:%[0-9]+]]:_(p4) = G_MERGE_VALUES [[COPY]](p6), [[C]](p6)
77 ; CI-NEXT: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[MV]](p4) :: (load (s8), addrspace 6)
95 ; CI-NEXT: [[MV:%[0-9]+]]:_(p4) = G_MERGE_VALUES [[COPY]](p6), [[C]](p6)
96 ; CI-NEXT: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[MV]](p4) :: (load (s16), addrspace 6)
[all …]
H A Dlegalize-zextload-constant-32bit.mir17 ; CI-NEXT: [[MV:%[0-9]+]]:_(p4) = G_MERGE_VALUES [[COPY]](p6), [[C]](p6)
18 ; CI-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[MV]](p4) :: (load (s32), addrspace 6)
37 ; CI-NEXT: [[MV:%[0-9]+]]:_(p4) = G_MERGE_VALUES [[COPY]](p6), [[C]](p6)
38 ; CI-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[MV]](p4) :: (load (s32), align 2, addrspace 6)
57 ; CI-NEXT: [[MV:%[0-9]+]]:_(p4) = G_MERGE_VALUES [[COPY]](p6), [[C]](p6)
58 ; CI-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[MV]](p4) :: (load (s32), align 1, addrspace 6)
77 ; CI-NEXT: [[MV:%[0-9]+]]:_(p4) = G_MERGE_VALUES [[COPY]](p6), [[C]](p6)
78 ; CI-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[MV]](p4) :: (load (s8), addrspace 6)
96 ; CI-NEXT: [[MV:%[0-9]+]]:_(p4) = G_MERGE_VALUES [[COPY]](p6), [[C]](p6)
97 ; CI-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[MV]](p4) :: (load (s16), addrspace 6)
[all …]
H A Dirtranslator-assert-align.ll51 ; CHECK-NEXT: $sgpr4_sgpr5 = COPY [[COPY9]](p4)
52 ; CHECK-NEXT: $sgpr6_sgpr7 = COPY [[COPY10]](p4)
53 ; CHECK-NEXT: $sgpr8_sgpr9 = COPY [[COPY11]](p4)
100 ; CHECK-NEXT: $sgpr4_sgpr5 = COPY [[COPY9]](p4)
101 ; CHECK-NEXT: $sgpr6_sgpr7 = COPY [[COPY10]](p4)
102 ; CHECK-NEXT: $sgpr8_sgpr9 = COPY [[COPY11]](p4)
150 ; CHECK-NEXT: $sgpr4_sgpr5 = COPY [[COPY9]](p4)
151 ; CHECK-NEXT: $sgpr6_sgpr7 = COPY [[COPY10]](p4)
152 ; CHECK-NEXT: $sgpr8_sgpr9 = COPY [[COPY11]](p4)
198 ; CHECK-NEXT: $sgpr4_sgpr5 = COPY [[COPY9]](p4)
[all …]
H A Dlegalize-addrspacecast.mir102 %1:_(p4) = G_ADDRSPACE_CAST %0
133 %0:_(p4) = COPY $vgpr0_vgpr1
216 ; VI-NEXT: [[COPY2:%[0-9]+]]:_(p4) = COPY [[COPY]](p4)
311 ; VI-NEXT: [[COPY2:%[0-9]+]]:_(p4) = COPY [[COPY]](p4)
547 ; VI-NEXT: [[COPY2:%[0-9]+]]:_(p4) = COPY [[COPY]](p4)
557 ; VI-NEXT: [[COPY3:%[0-9]+]]:_(p4) = COPY [[COPY]](p4)
626 %0:_(p4) = COPY $vgpr0_vgpr1
643 ; VI-NEXT: $vgpr0_vgpr1 = COPY [[MV]](p4)
659 %1:_(p4) = G_ADDRSPACE_CAST %0
693 %1:_(p4) = G_ADDRSPACE_CAST %0
[all …]
H A Dinst-select-load-constant.mir44 %0:sgpr(p4) = COPY $sgpr0_sgpr1
86 %0:sgpr(p4) = COPY $sgpr0_sgpr1
127 %0:sgpr(p4) = COPY $sgpr0_sgpr1
167 %0:sgpr(p4) = COPY $sgpr0_sgpr1
207 %0:sgpr(p4) = COPY $sgpr0_sgpr1
248 %0:sgpr(p4) = COPY $sgpr0_sgpr1
289 %0:sgpr(p4) = COPY $sgpr0_sgpr1
330 %0:sgpr(p4) = COPY $sgpr0_sgpr1
371 %0:sgpr(p4) = COPY $sgpr0_sgpr1
412 %0:sgpr(p4) = COPY $sgpr0_sgpr1
[all …]
H A Dirtranslator-indirect-call.ll18 ; CHECK-NEXT: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9
19 ; CHECK-NEXT: [[INT:%[0-9]+]]:_(p4) = G_INTRINSIC intrinsic(@llvm.amdgcn.kernarg.segment.ptr)
20 …; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(p0) = G_LOAD [[INT]](p4) :: (dereferenceable invariant load (p0…
22 ; CHECK-NEXT: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]]
23 ; CHECK-NEXT: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]]
24 ; CHECK-NEXT: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4)
26 ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64)
43 ; CHECK-NEXT: $sgpr4_sgpr5 = COPY [[COPY10]](p4)
44 ; CHECK-NEXT: $sgpr6_sgpr7 = COPY [[COPY11]](p4)
45 ; CHECK-NEXT: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4)
/llvm-project-15.0.7/llvm/utils/unittest/googlemock/include/gmock/
H A Dgmock-generated-matchers.h586 p4##_type const p4;\
615 p4##_type const p4;\
622 p4##_type p4) {\
662 p4##_type const p4;\
693 p4##_type const p4;\
744 p4##_type const p4;\
777 p4##_type const p4;\
832 p4##_type const p4;\
868 p4##_type const p4;\
964 p4##_type const p4;\
[all …]
H A Dgmock-generated-actions.h1063 p4##_type p4;\
1074 p4##_type p4;\
1144 p4##_type p4;\
1156 p4##_type p4;\
1231 p4##_type p4;\
1245 p4##_type p4;\
1327 p4##_type p4;\
1342 p4##_type p4;\
1429 p4##_type p4;\
1445 p4##_type p4;\
[all …]
/llvm-project-15.0.7/libc/AOR_v20.02/string/aarch64/
H A Dstrchr-sve.S45 orrs p4.b, p1/z, p2.b, p3.b /* c | 0 */
50 1: brka p4.b, p1/z, p4.b /* find first such */
52 incp x0, p4.b
54 ptest p4, p2.b /* was first in c? */
63 orrs p4.b, p0/z, p2.b, p3.b /* c | 0 */
/llvm-project-15.0.7/flang/test/Semantics/
H A Dallocate04.f9032 class(B), pointer :: p3, p4(:) local
50 allocate(p4(2)%y)
60 allocate(B:: p3%y, p4(2)%y)
67 allocate(p3%y, p4(2)%y, MOLD = B(5))
74 allocate(p3%y, p4(2)%y, SOURCE = B(5))
78 allocate(p3, p4(2))
/llvm-project-15.0.7/llvm/test/Instrumentation/AddressSanitizer/
H A Dasan-optimize-callbacks.ll9 define void @load(i8* %p1, i16* %p2, i32* %p4, i64* %p8, i128* %p16)
13 %n4 = load i32, i32* %p4, align 4
21 ; LOAD-NEXT: %2 = bitcast i32* %p4 to i8*
23 ; LOAD-NEXT: %n4 = load i32, i32* %p4, align 4
36 ; LOAD-KERNEL-NEXT: %2 = bitcast i32* %p4 to i8*
38 ; LOAD-KERNEL-NEXT: %n4 = load i32, i32* %p4, align 4
52 store i32 0, i32* %p4, align 4
60 ; STORE-NEXT: %2 = bitcast i32* %p4 to i8*
62 ; STORE-NEXT: store i32 0, i32* %p4, align 4
75 ; STORE-KERNEL-NEXT: %2 = bitcast i32* %p4 to i8*
[all …]
/llvm-project-15.0.7/clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/
H A Dpro-bounds-pointer-arithmetic-pr36489.cpp17 auto p4 = getPtr(); in auto_deduction_binary() local
19 p4 = p4 + 1; in auto_deduction_binary()
41 auto p4 = getPtrAuto()[5]; in auto_deduction_subscript() local

12345678910>>...18