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Searched refs:opname (Results 1 – 8 of 8) sorted by relevance

/llvm-project-15.0.7/mlir/utils/spirv/
H A Dgen_spirv_dialect.py58 opname = inst_html.a['id']
66 opname = inst_html.a['id']
726 if opname.startswith('Op'):
792 opname=opname,
878 opname = opname[0]
912 'opname': 'Op{}'.format(opname),
954 opname = info_dict['opname']
955 name_op_map[opname] = op
956 op_info_dict[opname] = info_dict
957 filter_list.append(opname)
[all …]
/llvm-project-15.0.7/compiler-rt/lib/builtins/
H A Datomic.c329 #define ATOMIC_RMW(n, lockfree, type, opname, op) \ argument
330 type __atomic_fetch_##opname##_##n(type *ptr, type val, int model) { \
332 return __c11_atomic_fetch_##opname((_Atomic(type) *)ptr, val, model); \
/llvm-project-15.0.7/mlir/lib/Target/SPIRV/Deserialization/
H A DDeserializer.cpp1096 StringRef opname = isSpec ? "OpSpecConstant" : "OpConstant"; in processConstant() local
1100 << opname << " must have type <id> and result <id>"; in processConstant()
1104 << opname << " must have at least 1 more parameter"; in processConstant()
1119 << opname << " should have 2 parameters for 64-bit values"; in processConstant()
1127 << opname in processConstant()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DFLATInstructions.td1961 string opname = !subst("_lds", "", !cast<FLAT_Pseudo>(NAME).PseudoInstr)> {
1962 let AsmString = opname # !cast<FLAT_Pseudo>(NAME).AsmOperands # " lds" in
1965 let AsmString = opname # !cast<FLAT_Pseudo>(NAME#"_SADDR").AsmOperands # " lds" in
1970 string opname = !subst("_lds", "", !cast<FLAT_Pseudo>(NAME).PseudoInstr)> {
1973 let AsmString = opname # !cast<FLAT_Pseudo>(NAME#"_ST").AsmOperands # " lds" in
/llvm-project-15.0.7/clang/include/clang/Basic/
H A Darm_neon.td179 class ScalarMulOp<string opname> :
180 Op<(call opname, $p0, (call "vget_lane", $p1, $p2))>;
/llvm-project-15.0.7/mlir/docs/Dialects/
H A DSPIR-V.md1267 ./define_inst.sh <filename> <base-class-name> <opname>
/llvm-project-15.0.7/mlir/include/mlir/Dialect/SPIRV/IR/
H A DSPIRVBase.td3999 string opname = name;
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMInstrMVE.td2471 multiclass MVE_VCLSCLZ_p<string opname, bit opcode, MVEVectorVTInfo VTI,
2473 def "": MVE_VCLSCLZ<"v"#opname, VTI.Suffix, VTI.Size, opcode>;
2476 defvar pred_int = !cast<Intrinsic>("int_arm_mve_"#opname#"_predicated");