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/llvm-project-15.0.7/llvm/test/Analysis/ScalarEvolution/
H A Dnsw-offset.ll18 …{0,+,2}<nuw><nsw><%bb> U: [0,2147483645) S: [0,2147483645) Exits: (2 * ((1 + (zext i32 (-2 + (2 * …
20 … --> {%d,+,16}<nuw><%bb> U: full-set S: full-set Exits: ((16 * ((1 + (zext i32 (-2 + (2 * (%no /u …
22 …{0,+,2}<nuw><nsw><%bb> U: [0,2147483645) S: [0,2147483645) Exits: (2 * ((1 + (zext i32 (-2 + (2 * …
24 … --> {%q,+,16}<nuw><%bb> U: full-set S: full-set Exits: ((16 * ((1 + (zext i32 (-2 + (2 * (%no /u …
26 …XT: --> {1,+,2}<nuw><nsw><%bb> U: [1,2147483646) S: [1,2147483646) Exits: (1 + (2 * ((-1 + (2 *…
28 …nuw><nsw><%bb> U: [1,2147483646) S: [1,2147483646) Exits: (1 + (2 * ((1 + (zext i32 (-2 + (2 * (%n…
30 … + %q),+,16}<nuw><%bb> U: full-set S: full-set Exits: (8 + (16 * ((1 + (zext i32 (-2 + (2 * (%no /…
32 …XT: --> {1,+,2}<nuw><nsw><%bb> U: [1,2147483646) S: [1,2147483646) Exits: (1 + (2 * ((-1 + (2 *…
34 …nuw><nsw><%bb> U: [1,2147483646) S: [1,2147483646) Exits: (1 + (2 * ((1 + (zext i32 (-2 + (2 * (%n…
38 …{0,+,2}<nuw><nsw><%bb> U: [0,2147483645) S: [0,2147483645) Exits: (2 * ((1 + (zext i32 (-2 + (2 * …
[all …]
H A Dnsw-offset-assume.ll21 …{0,+,2}<nuw><nsw><%bb> U: [0,2147483645) S: [0,2147483645) Exits: (2 * ((1 + (zext i32 (-2 + (2 * …
23 … --> {%d,+,16}<nuw><%bb> U: full-set S: full-set Exits: ((16 * ((1 + (zext i32 (-2 + (2 * (%no /u …
25 …{0,+,2}<nuw><nsw><%bb> U: [0,2147483645) S: [0,2147483645) Exits: (2 * ((1 + (zext i32 (-2 + (2 * …
27 … --> {%q,+,16}<nuw><%bb> U: full-set S: full-set Exits: ((16 * ((1 + (zext i32 (-2 + (2 * (%no /u …
29 …XT: --> {1,+,2}<nuw><nsw><%bb> U: [1,2147483646) S: [1,2147483646) Exits: (1 + (2 * ((-1 + (2 *…
31 …nuw><nsw><%bb> U: [1,2147483646) S: [1,2147483646) Exits: (1 + (2 * ((1 + (zext i32 (-2 + (2 * (%n…
33 … + %q),+,16}<nuw><%bb> U: full-set S: full-set Exits: (8 + (16 * ((1 + (zext i32 (-2 + (2 * (%no /…
35 …XT: --> {1,+,2}<nuw><nsw><%bb> U: [1,2147483646) S: [1,2147483646) Exits: (1 + (2 * ((-1 + (2 *…
37 …nuw><nsw><%bb> U: [1,2147483646) S: [1,2147483646) Exits: (1 + (2 * ((1 + (zext i32 (-2 + (2 * (%n…
41 …{0,+,2}<nuw><nsw><%bb> U: [0,2147483645) S: [0,2147483645) Exits: (2 * ((1 + (zext i32 (-2 + (2 * …
[all …]
H A Dmax-backedge-taken-count-guard-info-rewrite-expressions.ll15 …T: --> {0,+,8}<nuw><nsw><%loop> U: [0,17) S: [0,17) Exits: (8 * ((-8 + (8 * ((zext i32 %n to i6…
17 … --> {8,+,8}<nuw><nsw><%loop> U: [8,25) S: [8,25) Exits: (8 + (8 * ((-8 + (8 * ((zext i32 %n to…
37 %index.next = add nuw nsw i64 %index, 8
56 … --> {0,+,4}<nuw><%loop> U: [0,13) S: [0,13) Exits: (4 * ((-4 + (4 * ((zext i32 (16 umin %N) to…
83 %index.next = add nuw i64 %index, 4
125 %n.rnd.up = add nuw nsw i64 %ext, 4
173 %n.rnd.up = add nuw nsw i64 %ext, 4
197 …T: --> {0,+,8}<nuw><nsw><%loop> U: [0,25) S: [0,25) Exits: (8 * ((-8 + (8 * ((zext i32 %n to i6…
224 %index.next = add nuw nsw i64 %index, 8
241 …T: --> {0,+,8}<nuw><nsw><%loop> U: [0,25) S: [0,25) Exits: (8 * ((-8 + (8 * ((zext i32 %n to i6…
[all …]
H A Drange_nw_flag.ll6 ; CHECK-LABEL: 'test-add-nuw'
7 ; CHECK-NEXT: Classifying expressions for: @test-add-nuw
10 ; CHECK-NEXT: %nexti = add nuw i32 %i, 1
12 ; CHECK-NEXT: %index32 = add nuw i32 %nexti, %offset
27 %nexti = add nuw i32 %i, 1
28 %index32 = add nuw i32 %nexti, %offset
39 ; CHECK-LABEL: 'test-addrec-nuw'
45 ; CHECK-NEXT: %nexti = add nuw i32 %i, 1
64 %nexti = add nuw i32 %i, 1
65 %index32 = add nuw i32 %nexti, %min.10
[all …]
H A Dmax-backedge-taken-count-guard-info.ll30 %iv.next = add nuw nsw i64 %iv, 1
62 %iv.next = add nuw nsw i64 %iv, 1
441 %iv.next = add nuw i64 %iv, 1
477 %iv.next = add nuw i64 %iv, 1
513 %iv.next = add nuw i64 %iv, 1
549 %iv.next = add nuw i64 %iv, 1
588 %iv.next = add nuw i64 %iv, 1
627 %iv.next = add nuw i64 %iv, 1
663 %iv.next = add nuw i64 %iv, 1
699 %iv.next = add nuw i64 %iv, 1
[all …]
/llvm-project-15.0.7/llvm/test/Bitcode/
H A DbinaryIntInstructions.3.2.ll25 ; CHECK: %res6 = add nuw i1 %x1, %x1
26 %res6 = add nuw i1 %x1, %x1
31 ; CHECK: %res8 = add nuw nsw i1 %x1, %x1
32 %res8 = add nuw nsw i1 %x1, %x1
40 %res1 = add nuw nsw <2 x i8> %x1, %x1
43 %res2 = add nuw nsw <3 x i8> %x2, %x2
46 %res3 = add nuw nsw <4 x i8> %x3, %x3
49 %res4 = add nuw nsw <8 x i8> %x4, %x4
122 ; CHECK: %res2 = sub nuw i8 %x1, %x1
123 %res2 = sub nuw i8 %x1, %x1
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dreassociate-nuw.ll9 %add0 = add nuw i32 %x, 4
10 %add1 = add nuw i32 %add0, 64
21 %sub0 = sub nuw i32 %x, 4
31 %mul0 = mul nuw i32 %x, 4
51 %add0 = add nuw i32 %x, 4
62 %add0 = add nuw i32 %x, 4
63 %add1 = add nuw i32 %y, 8
74 %mul0 = mul nuw i32 %x, 5
75 %mul1 = mul nuw i32 %y, 9
86 %sub0 = sub nuw i32 %x, 4
[all …]
H A Dshl-factor.ll36 %xs = shl nuw i64 %x, %z
37 %ys = shl nuw i64 %y, %z
65 %xs = shl nuw i8 %x, %z
119 %xs = shl nuw i6 %x, %z
120 %ys = shl nuw i6 %y, %z
131 %xs = shl nuw i6 %x, %z
167 %xs = shl nuw i64 %x, %z
196 %xs = shl nuw i8 %x, %z
250 %xs = shl nuw i6 %x, %z
251 %ys = shl nuw i6 %y, %z
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/AArch64/
H A Dmultiple_reduction.ll408 %mul = mul nuw nsw i32 %conv, %conv
412 %add.1 = add nuw nsw i32 %conv, %conv.1
414 %add11.1 = add nuw i32 %mul.1, %mul
418 %add.2 = add nuw nsw i32 %add.1, %conv.2
424 %add.3 = add nuw nsw i32 %add.2, %conv.3
430 %add.4 = add nuw nsw i32 %add.3, %conv.4
436 %add.5 = add nuw nsw i32 %add.4, %conv.5
789 %shl = shl nuw i64 %conv16, 32
922 %mul = mul nuw nsw i32 %conv, %conv
1015 %inc13 = add nuw nsw i32 %y.038, 1
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dknownbits-recursion.ll27 %tmp10 = mul nuw nsw i32 %tmp9, %tmp9
29 %tmp12 = mul nuw nsw i32 %tmp11, %tmp11
31 %tmp14 = mul nuw nsw i32 %tmp13, %tmp13
33 %tmp16 = mul nuw nsw i32 %tmp15, %tmp15
35 %tmp18 = mul nuw nsw i32 %tmp17, %tmp17
37 %tmp20 = mul nuw nsw i32 %tmp19, %tmp19
39 %tmp22 = mul nuw nsw i32 %tmp21, %tmp21
41 %tmp24 = mul nuw nsw i32 %tmp23, %tmp23
43 %tmp26 = mul nuw nsw i32 %tmp25, %tmp25
45 %tmp28 = mul nuw nsw i32 %tmp27, %tmp27
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/InstSimplify/
H A Dconstantfold-shl-nuw-C-to-C.ll4 ; %r = shl nuw i8 C, %x
14 %ret = shl nuw i8 -1, %x
23 %ret = shl nuw nsw i8 -1, %x
32 %ret = shl nuw i8 128, %x
52 %ret = shl nuw i8 %x, %y
65 %ret = shl nuw i8 %x, %y
106 %ret = shl nuw i8 127, %x
140 ; Bad shl nuw constant
171 %ret = shl nuw i8 %x, %y
184 %ret = shl nuw i8 %x, %y
[all …]
H A Dconstantfold-add-nuw-allones-to-allones.ll4 ; %ret = add nuw i8 %x, C
5 ; nuw means no unsigned wrap, from -1 to 0.
12 %ret = add nuw i8 %x, -1
13 ; nuw here means that %x can only be 0
21 %ret = add nuw nsw i8 %x, -1
30 %ret = add nuw i8 -1, %x ; swapped
50 %ret = add nuw i8 %x, %y
83 %ret = add i8 %x, -1 ; need nuw
103 %ret = add nuw i8 %x, %addop2
114 %ret = add nuw i8 %x, 1 ; not -1
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/ConstraintElimination/
H A Dsub-nuw.ll30 %sub.ptr.i = sub nuw i8 %start, 3
40 %start.1 = sub nuw i8 %start, 1
43 %start.2 = sub nuw i8 %start, 2
46 %start.3 = sub nuw i8 %start, 3
49 %start.4 = sub nuw i8 %start, 4
94 %start.1 = sub nuw i8 %start, 1
97 %start.2 = sub nuw i8 %start, 2
262 %add = shl nuw nsw i16 %v, 1
290 %neg2 = sub nuw i16 %a, 305
317 %neg2 = sub nuw i64 %a, 305
[all …]
H A Dadd-nuw.ll40 %start.1 = add nuw i8 %start, 1
43 %start.2 = add nuw i8 %start, 2
46 %start.3 = add nuw i8 %start, 3
279 %add.0 = add nuw i8 %a, %b
282 %add.1 = add nuw i8 %a, %a
285 %add.2 = add nuw i8 %a, %d
322 %add.0 = add nuw i8 %a, %b
325 %add.1 = add nuw i8 %a, %a
328 %add.2 = add nuw i8 %a, %d
530 %neg2 = add nuw i8 %a, -4
[all …]
/llvm-project-15.0.7/llvm/test/Assembler/
H A Dflags.ll7 ; CHECK: %z = add nuw i64 %x, %y
8 %z = add nuw i64 %x, %y
13 ; CHECK: %z = sub nuw i64 %x, %y
14 %z = sub nuw i64 %x, %y
19 ; CHECK: %z = mul nuw i64 %x, %y
20 %z = mul nuw i64 %x, %y
62 %z = add nuw nsw i64 %x, %y
68 %z = sub nuw nsw i64 %x, %y
74 %z = mul nuw nsw i64 %x, %y
80 %z = add nsw nuw i64 %x, %y
[all …]
/llvm-project-15.0.7/polly/test/ScopInfo/
H A Daliasing_many_read_only_acesses.ll46 %tmp7 = add nuw nsw i64 %i.0, 1
50 %tmp11 = add nuw nsw i64 %i.0, 2
54 %tmp15 = add nuw nsw i64 %i.0, 3
58 %tmp19 = add nuw nsw i64 %i.0, 4
62 %tmp23 = add nuw nsw i64 %i.0, 5
66 %tmp27 = add nuw nsw i64 %i.0, 6
70 %tmp31 = add nuw nsw i64 %i.0, 7
74 %tmp35 = add nuw nsw i64 %i.0, 8
78 %tmp39 = add nuw nsw i64 %i.0, 9
85 %tmp46 = add nuw nsw i64 %i.0, 11
[all …]
H A Dprocess_added_dimensions.ll46 %indvars.iv.next135 = add nuw nsw i64 0, 1
48 %indvars.iv.next = add nuw nsw i64 0, 1
51 %indvars.iv.next135.1 = add nuw nsw i64 1, 1
52 %indvars.iv.next.1 = add nuw nsw i64 0, 1
57 %indvars.iv.next.2 = add nuw nsw i64 0, 1
62 %indvars.iv.next.3 = add nuw nsw i64 0, 1
67 %indvars.iv.next.4 = add nuw nsw i64 0, 1
73 %indvars.iv.next.5 = add nuw nsw i64 0, 1
75 %indvars.iv.next143 = add nuw nsw i64 1, 1
77 %indvars.iv.next149 = add nuw nsw i64 0, 1
[all …]
H A Dstatistics.ll59 %tmp7 = add nuw nsw i64 %i.0, 1
84 %tmp = add nuw nsw i64 %i.0, %j.0
94 %tmp12 = add nuw nsw i64 %j.0, 1
101 %tmp15 = add nuw nsw i64 %i.0, 1
134 %tmp = add nuw nsw i64 %i.0, %j.0
146 %tmp17 = add nuw nsw i64 %k.0, 1
153 %tmp20 = add nuw nsw i64 %j.0, 1
160 %tmp23 = add nuw nsw i64 %i.0, 1
215 %tmp22 = add nuw nsw i64 %l.0, 1
222 %tmp25 = add nuw nsw i64 %k.0, 1
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/PhaseOrdering/X86/
H A Dpr50555.ll41 %6 = add nuw nsw i32 %5, %4
49 %13 = add nuw nsw i32 %12, %11
58 %21 = add nuw nsw i32 %20, %19
67 %29 = add nuw nsw i32 %28, %27
76 %37 = add nuw nsw i32 %36, %35
85 %45 = add nuw nsw i32 %44, %43
94 %53 = add nuw nsw i32 %52, %51
103 %61 = add nuw nsw i32 %60, %59
112 %69 = add nuw nsw i32 %68, %67
233 %8 = add nuw nsw i32 %7, %5
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/LoopUnroll/ARM/
H A Dloop-unrolling.ll18 ; CHECK-NOUNROLL: [[IV2]] = add nuw nsw i32 [[IV1]], 1
38 ; CHECK-UNROLL: [[IV16]] = add nuw nsw i32 [[IV15]], 1
50 %inc = add nuw nsw i32 %i.08, 1
68 ; CHECK-NOUNROLL: [[IV2]] = add nuw i32 [[IV1]], 1
75 ; CHECK-UNROLL: [[IV4]] = add nuw i32 [[IV3]], 1
90 %inc = add nuw i32 %i.09, 1
113 %inc11 = add nuw i32 %h.026, 1
120 ; CHECK-NOUNROLL: [[IV1]] = add nuw i32 [[IV0]], 1
130 ; CHECK-UNROLL: [[IV4]] = add nuw i32 [[IV3]], 1
146 %inc = add nuw i32 %w.024, 1
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/LoopReroll/
H A Dextra_instr.ll23 %plus20 = add nuw nsw i64 %iv, 20
24 %plus10 = add nuw nsw i64 %iv, 10
39 %iv.next = add nuw nsw i64 %iv, 1
68 %plus20 = add nuw nsw i64 %iv, 20
69 %plus10 = add nuw nsw i64 %iv, 10
84 %iv.next = add nuw nsw i64 %iv, 1
110 %iv.next = add nuw nsw i64 %iv, 1
117 %plus20 = add nuw nsw i64 %iv, 20
118 %plus10 = add nuw nsw i64 %iv, 10
155 %iv.mul3 = mul nuw nsw i32 %iv, 3
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/LoadStoreVectorizer/X86/
H A Dcompare-scev-by-complexity.ll30 %add.nuw.nsw.i.i = add nuw nsw i32 %and.i.i, 0
31 %mul.i.i = shl nuw nsw i32 %add.nuw.nsw.i.i, 1
34 %add.nuw.nsw10.i.i = add nuw nsw i32 %and6.i.i, %and9.i.i
35 %conv3.i42.i = add nuw nsw i32 %mul.i.i, 1
36 %reass.add346.7 = add nuw nsw i32 %add.nuw.nsw10.i.i, 56
37 %reass.mul347.7 = mul nuw nsw i32 %tmp, %reass.add346.7
38 %add7.i.7 = add nuw nsw i32 %reass.mul347.7, 0
39 %preheader.address0.idx = add nuw nsw i32 %add7.i.7, %mul.i.i
52 %reass.mul343.7 = mul nuw nsw i32 %reass.add346.7, 72
53 %add7.i286.7.7 = add nuw nsw i32 %reass.mul343.7, 56
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/X86/
H A Dbad-reduction.ll77 %sh0 = shl nuw i64 %z0, 56
78 %sh1 = shl nuw nsw i64 %z1, 48
79 %sh2 = shl nuw nsw i64 %z2, 40
80 %sh3 = shl nuw nsw i64 %z3, 32
83 %sh6 = shl nuw nsw i64 %z6, 8
166 %sh0 = shl nuw i64 %z0, 56
261 %s7 = shl nuw i64 %z7, 56
348 %s7 = shl nuw i64 %z7, 56
492 %t5 = shl nuw i32 %t4, 24
493 %t23 = shl nuw i32 %t22, 24
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dload-combine.ll18 %tmp7 = shl nuw nsw i32 %tmp6, 8
23 %tmp12 = shl nuw nsw i32 %tmp11, 16
47 %tmp7 = shl nuw nsw i32 %tmp6, 8
150 %tmp3 = shl nuw i64 %tmp2, 56
361 %tmp = add nuw nsw i32 %i, 3
362 %tmp2 = add nuw nsw i32 %i, 2
363 %tmp3 = add nuw nsw i32 %i, 1
399 %tmp = add nuw nsw i32 %i, 4
400 %tmp2 = add nuw nsw i32 %i, 3
401 %tmp3 = add nuw nsw i32 %i, 2
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/IndVarSimplify/
H A Dpr39673.ll32 %k1.add = add nuw nsw i16 %k1, 1
33 %l1.add = add nuw nsw i16 %l1, 1
44 %l2.add = add nuw i16 %l2, 1
46 %k2.add = add nuw nsw i16 %k2, 1
85 %k1.add = add nuw nsw i16 %k1, 1
86 %l1.add = add nuw nsw i16 %l1, 1
97 %l2.add = add nuw i16 %l2, 1
99 %k2.add = add nuw nsw i16 %k2, 1
137 %l2.add = add nuw i16 %l2, 1
139 %k2.add = add nuw nsw i16 %k2, 1
[all …]

12345678910>>...113