| /llvm-project-15.0.7/llvm/test/CodeGen/Mips/ |
| H A D | inlineasm-constraint-reg.ll | 36 ; CHECK: mtlo ${{[0-9]+}}
41 …call i32 asm sideeffect "\09mtlo $3 \0A\09\09madd $1, $2 ", "=l,r,r,r"(i32 7, i32 6, i32 44) nounw…
46 ; CHECK: mtlo ${{[0-9]+}}
51 …call i16 asm sideeffect "\09mtlo $3 \0A\09\09madd $1, $2 ", "=l,r,r,r"(i32 7, i32 6, i32 44) nounw…
|
| H A D | madd-msub.ll | 15 ; 32-NEXT: mtlo $6
36 ; DSP-NEXT: mtlo $6, $ac0
87 ; 32-NEXT: mtlo $6
106 ; DSP-NEXT: mtlo $6, $ac0
148 ; 32-NEXT: mtlo $7
167 ; DSP-NEXT: mtlo $7, $ac0
264 ; 32-NEXT: mtlo $6
285 ; DSP-NEXT: mtlo $6, $ac0
336 ; 32-NEXT: mtlo $6
356 ; DSP-NEXT: mtlo $6, $ac0
[all …]
|
| H A D | micromips-pseudo-mtlohi-expand.ll | 16 ; MMR2-NEXT: mtlo $3 # <MCInst #{{[0-9]+}} MTLO_MM
38 ; MMR2-DSP-NEXT: mtlo $3, $ac0 # <MCInst #{{[0-9]+}} MTLO_DSP
|
| H A D | interrupt-attr.ll | 41 ; CHECK: mtlo $26
|
| /llvm-project-15.0.7/llvm/test/MC/Mips/mips32r6/ |
| H A D | invalid-mips1.s | 19 …mtlo $25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
20 …mtlo $sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| H A D | invalid-mips2.s | 25 …mtlo $25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
26 …mtlo $sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| /llvm-project-15.0.7/llvm/test/MC/Mips/dsp/ |
| H A D | valid.s | 69 …mtlo $17, $ac2 # CHECK: mtlo $17, $ac2 # encoding: [0x02,0x…
70 …mtlo $17 # CHECK: mtlo $17 # encoding: [0x02,0x…
|
| /llvm-project-15.0.7/llvm/test/MC/Mips/mips64r6/ |
| H A D | invalid-mips1.s | 22 …mtlo $25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
23 …mtlo $sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| H A D | invalid-mips3.s | 18 …mtlo $25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
19 …mtlo $sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| H A D | invalid-mips2.s | 28 …mtlo $25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
29 …mtlo $sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| H A D | invalid-mips64.s | 39 …mtlo $25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
40 …mtlo $sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| /llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/dsp/ |
| H A D | valid-el.txt | 6 0x13 0x18 0xa0 0x02 # CHECK: mtlo $21, $ac3
|
| H A D | valid.txt | 67 0x02 0x20 0x10 0x13 # CHECK: mtlo $17, $ac2
68 0x02 0x20 0x00 0x13 # CHECK: mtlo $17
|
| /llvm-project-15.0.7/llvm/test/MC/Mips/dspr2/ |
| H A D | valid.s | 91 …mtlo $17, $ac2 # CHECK: mtlo $17, $ac2 # encoding: [0x02,0x20,0…
92 …mtlo $17 # CHECK: mtlo $17 # encoding: [0x02,0x20,0…
|
| /llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips1/ |
| H A D | valid-mips1-el.txt | 67 0x13 0x00 0xa0 0x03 # CHECK: mtlo $sp
68 0x13 0x00 0x20 0x03 # CHECK: mtlo $25
|
| H A D | valid-mips1.txt | 36 0x03 0x20 0x00 0x13 # CHECK: mtlo $25
40 0x03 0xa0 0x00 0x13 # CHECK: mtlo $sp
|
| /llvm-project-15.0.7/llvm/test/MC/Mips/micromips-dsp/ |
| H A D | valid.s | 95 …mtlo $1, $ac1 # CHECK: mtlo $1, $ac1 # encoding: [0x00,0x01,0x70,0x7…
|
| /llvm-project-15.0.7/llvm/test/MC/Mips/ |
| H A D | mips-fpu-instructions.s | 155 # CHECK: mtlo $7 # encoding: [0x13,0x00,0xe0,0x00]
190 mtlo $a3
|
| /llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips2/ |
| H A D | valid-mips2-el.txt | 83 0x13 0x00 0xa0 0x03 # CHECK: mtlo $sp
84 0x13 0x00 0x20 0x03 # CHECK: mtlo $25
|
| H A D | valid-mips2.txt | 60 0x03 0x20 0x00 0x13 # CHECK: mtlo $25
64 0x03 0xa0 0x00 0x13 # CHECK: mtlo $sp
|
| /llvm-project-15.0.7/llvm/test/MC/Mips/mips1/ |
| H A D | valid.s | 83 mtlo $sp
84 mtlo $25
|
| /llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/dspr2/ |
| H A D | valid.txt | 89 0x02 0x20 0x10 0x13 # CHECK: mtlo $17, $ac2
90 0x02 0x20 0x00 0x13 # CHECK: mtlo $17
|
| /llvm-project-15.0.7/llvm/test/MC/Mips/mips2/ |
| H A D | valid.s | 109 mtlo $sp
110 mtlo $25
|
| /llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips3/ |
| H A D | valid-mips3-el.txt | 125 0x13 0x00 0xa0 0x03 # CHECK: mtlo $sp
126 0x13 0x00 0x20 0x03 # CHECK: mtlo $25
|
| /llvm-project-15.0.7/libunwind/src/ |
| H A D | UnwindRegistersRestore.S | 976 mtlo $8
1066 mtlo $8
|