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Searched refs:modulo (Results 1 – 25 of 59) sorted by relevance

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/llvm-project-15.0.7/polly/lib/External/isl/
H A Disl_equalities.c750 isl_int_set_si(*modulo, 0); in isl_basic_set_dim_residue_class()
765 total-bset->n_eq, modulo); in isl_basic_set_dim_residue_class()
767 isl_int_set_si(*modulo, 1); in isl_basic_set_dim_residue_class()
794 isl_int_set_si(*modulo, 1); in isl_basic_set_dim_residue_class()
828 isl_int_set_si(*modulo, 0); in isl_set_dim_residue_class()
839 if (isl_int_is_one(*modulo)) in isl_set_dim_residue_class()
848 isl_int_gcd(*modulo, *modulo, m); in isl_set_dim_residue_class()
850 isl_int_gcd(*modulo, *modulo, m); in isl_set_dim_residue_class()
879 *modulo = NULL; in isl_set_dim_residue_class_val()
885 if (!*modulo || !*residue) in isl_set_dim_residue_class_val()
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H A Disl_map_private.h533 int pos, isl_int *modulo, isl_int *residue);
535 int pos, isl_int *modulo, isl_int *residue);
/llvm-project-15.0.7/llvm/utils/
H A Dunicode-case-fold.py79 modulo = first % stride(b)
89 if stride(b) == 2 and shift(b[0]) == 1 and modulo == 0:
99 body += pattern.format(last, stride(b), modulo, shift(b[0]))
/llvm-project-15.0.7/polly/test/ScopInfo/NonAffine/
H A Dmodulo_domain.ll3 ; TODO: The new domain generation cannot handle modulo domain constraints,
4 ; hence modulo handling has been disabled completely. Once this is
/llvm-project-15.0.7/polly/lib/External/isl/test_inputs/codegen/
H A Dmod.in1 # check that modulo constraint is generated correctly
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Dp10-vector-modulo.ll12 ; This test case aims to test the vector modulo instructions on Power10.
13 ; The vector modulo instructions operate on signed and unsigned words
16 ; The vector modulo instructions operate on signed and unsigned words,
/llvm-project-15.0.7/lld/test/ELF/
H A Dnobits-offset.s8 ## sh_offset to sh_addr modulo max-page-size, so that p_vaddr=p_offset (mod
H A Dtls-nobits-offset.s8 ## sh_offset to sh_addr modulo p_align, so that p_vaddr=p_offset (mod
/llvm-project-15.0.7/lld/test/ELF/linkerscript/
H A Dtls-nobits-offset.s12 ## sh_offset to sh_addr modulo p_align, so that p_vaddr=p_offset (mod
H A Dnobits-offset.s12 ## sh_offset to sh_addr modulo max-page-size, so that p_vaddr=p_offset (mod
H A Doperators.test152 # MODZERO: {{.*}}.script:1: modulo by zero
/llvm-project-15.0.7/lldb/examples/python/
H A Dsbvalue.py210 def __ipow__(self, other, modulo): argument
211 result = self.__pow__(self, other, modulo)
/llvm-project-15.0.7/llvm/test/Transforms/InstSimplify/ConstProp/
H A Dfunnel-shift.ll22 ; Try an oversized shift to test modulo functionality.
33 ; Try an oversized shift to test modulo functionality.
46 ; Try an oversized shift to test modulo functionality.
/llvm-project-15.0.7/llvm/test/MC/AsmParser/
H A Daltmacro_expression.s15 # Checking that the second '%' acts as modulo operator
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dpr48188.ll5 ; Verify that GISel and SDAG do the same thing for this phi (modulo regalloc)
H A Dshift-mod.ll5 ; modulo the shift size to take advantage of the implicit mod done on
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dpr39908.ll36 ; Here the offset overflows and is treated modulo 2^32. This is UB.
/llvm-project-15.0.7/lld/docs/ELF/
H A Dlinker_script.rst94 > The value of sh_addr must be congruent to 0, modulo the value of sh_addralign.
98 sh_addr=0 (modulo sh_addralign).
/llvm-project-15.0.7/polly/test/CodeGen/
H A DexprModDiv.ll14 ; expressions are modulo or division operations. We test that the code we
/llvm-project-15.0.7/llvm/test/MC/X86/
H A Dpad-for-align-debug.s8 ; Inputs/pad-align-without-debug.s are equivalent, modulo a single .loc, which
/llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/pipeliner/
H A Dswp-phi-start.mir1 # RUN: llc < %s -x mir -march=hexagon -run-pass=modulo-schedule-test -pipeliner-experimental-cg=tru…
/llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/
H A Dstack-clash-dynamic-alloca.ll46 ; Probe size should be modulo stack alignment.
/llvm-project-15.0.7/mlir/test/Dialect/Affine/
H A Dsimplify-structures.mlir286 // Tests the simplification of a semi-affine expression with a modulo operation on a floordiv and m…
294 …mplification of a semi-affine expression with a nested floordiv and a floordiv on modulo operation.
318 // Tests the simplification of a semi-affine expression with a modulo operation with a second opera…
/llvm-project-15.0.7/lldb/bindings/python/
H A Dpython-extensions.swig442 def __ipow__(self, other, modulo):
443 result = self.__pow__(self, other, modulo)
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dfunnel-shift.ll168 ; Check modulo math on shift amount.
360 ; Check modulo math on shift amount. 41-32=9.

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