| /llvm-project-15.0.7/llvm/docs/ |
| H A D | AMDGPUInstructionNotation.rst | 16 except that instead of real operands and modifiers it provides references to their description.
26 …description<amdgpu_syn_instruction_operands_notation>`\ ``> <``\ :ref:`modifiers description<amdg…
96 :ref:`VOP3 operand modifiers<amdgpu_synid_vop3_operand_modifiers>` or
97 :ref:`SDWA operand modifiers<amdgpu_synid_sdwa_operand_modifiers>`.
111 src1:m // src1 operand may be used with operand modifiers
120 An instruction may have zero or more optional *modifiers*. They are space-separated in the descript…
124 The order of *modifiers* is fixed.
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| H A D | AMDGPUInstructionSyntax.rst | 21 :doc:`modifiers<AMDGPUModifierSyntax>` are space-separated.
23 The order of *operands* and *modifiers* is fixed.
24 Most *modifiers* are optional and may be omitted.
178 Syntax of modifiers is described :doc:`in this document<AMDGPUModifierSyntax>`.
180 Information about modifiers supported for individual instructions may be found in GPU-specific docu…
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| /llvm-project-15.0.7/clang/test/SemaObjC/ |
| H A D | dist-object-modifiers.m | 16 - (id)serverPID { return 0; } // expected-warning {{conflicting distributed object modifiers on ret…
17 - (void)doStuff:(id)clientId { } // expected-warning {{conflicting distributed object modifiers on …
19 …g1 { return Arg; } // expected-warning {{conflicting distributed object modifiers on return type i…
20 …// expected-warning 2{{conflicting distributed object modifiers on parameter type in implementatio…
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| /llvm-project-15.0.7/mlir/lib/Dialect/OpenMP/IR/ |
| H A D | OpenMPDialect.cpp | 181 if (modifiers.size() > 2) in verifyScheduleModifiers()
183 for (const auto &mod : modifiers) { in verifyScheduleModifiers()
194 if (modifiers.size() == 1) { in verifyScheduleModifiers()
196 modifiers.push_back(modifiers[0]); in verifyScheduleModifiers()
199 } else if (modifiers.size() == 2) { in verifyScheduleModifiers()
250 SmallVector<SmallString<12>> modifiers; in parseScheduleClause() local
255 modifiers.push_back(mod); in parseScheduleClause()
258 if (verifyScheduleModifiers(parser, modifiers)) in parseScheduleClause()
261 if (!modifiers.empty()) { in parseScheduleClause()
264 symbolizeScheduleModifier(modifiers[0])) { in parseScheduleClause()
[all …]
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| /llvm-project-15.0.7/llvm/docs/AMDGPU/ |
| H A D | gfx908_vaddr_b73dc0.rst | 15 *Size:* 0, 1 or 2 dwords. Size is controlled by modifiers :ref:`offen<amdgpu_synid_offen>` and :ref…
19 * If both modifiers are specified, index is in the first register and offset is in the second. Size…
20 * If none of these modifiers are specified, this operand must be set to :ref:`off<amdgpu_synid_off>…
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| H A D | gfx10_vaddr_b73dc0.rst | 15 *Size:* 0, 1 or 2 dwords. Size is controlled by modifiers :ref:`offen<amdgpu_synid_offen>` and :ref…
19 * If both modifiers are specified, index is in the first register and offset is in the second. Size…
20 * If none of these modifiers are specified, this operand must be set to :ref:`off<amdgpu_synid_off>…
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| H A D | gfx1030_vaddr_b73dc0.rst | 15 *Size:* 0, 1 or 2 dwords. Size is controlled by modifiers :ref:`offen<amdgpu_synid_offen>` and :ref…
19 * If both modifiers are specified, index is in the first register and offset is in the second. Size…
20 * If none of these modifiers are specified, this operand must be set to :ref:`off<amdgpu_synid_off>…
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| H A D | gfx8_vaddr_b73dc0.rst | 15 *Size:* 0, 1 or 2 dwords. Size is controlled by modifiers :ref:`offen<amdgpu_synid_offen>` and :ref…
19 * If both modifiers are specified, index is in the first register and offset is in the second. Size…
20 * If none of these modifiers are specified, this operand must be set to :ref:`off<amdgpu_synid_off>…
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| H A D | gfx9_vaddr_b73dc0.rst | 15 *Size:* 0, 1 or 2 dwords. Size is controlled by modifiers :ref:`offen<amdgpu_synid_offen>` and :ref…
19 * If both modifiers are specified, index is in the first register and offset is in the second. Size…
20 * If none of these modifiers are specified, this operand must be set to :ref:`off<amdgpu_synid_off>…
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| H A D | gfx940_vaddr_b73dc0.rst | 15 *Size:* 0, 1 or 2 dwords. Size is controlled by modifiers :ref:`offen<amdgpu_synid_offen>` and :ref…
19 * If both modifiers are specified, index is in the first register and offset is in the second. Size…
20 * If none of these modifiers are specified, this operand must be set to :ref:`off<amdgpu_synid_off>…
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| H A D | gfx90a_vaddr_b73dc0.rst | 15 *Size:* 0, 1 or 2 dwords. Size is controlled by modifiers :ref:`offen<amdgpu_synid_offen>` and :ref…
19 * If both modifiers are specified, index is in the first register and offset is in the second. Size…
20 * If none of these modifiers are specified, this operand must be set to :ref:`off<amdgpu_synid_off>…
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| H A D | gfx7_vaddr_da1f09.rst | 15 *Size:* 0, 1 or 2 dwords. Size is controlled by modifiers :ref:`addr64<amdgpu_synid_addr64>`, :ref:…
21 * If none of these modifiers are specified, this operand must be set to :ref:`off<amdgpu_synid_off>…
22 * All other combinations of these modifiers are illegal.
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| H A D | gfx90a_m_f5d306.rst | 13 This operand may be used with floating point operand modifiers :ref:`abs<amdgpu_synid_abs>` and :re…
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| H A D | gfx10_m_f5d306.rst | 13 This operand may be used with floating point operand modifiers :ref:`abs<amdgpu_synid_abs>` and :re…
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| H A D | gfx8_m_f5d306.rst | 13 This operand may be used with floating point operand modifiers :ref:`abs<amdgpu_synid_abs>` and :re…
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| H A D | gfx900_m.rst | 13 This operand may be used with floating point operand modifiers :ref:`abs<amdgpu_synid_abs>` and :re…
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| H A D | gfx904_m.rst | 13 This operand may be used with floating point operand modifiers :ref:`abs<amdgpu_synid_abs>` and :re…
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| H A D | gfx906_m.rst | 13 This operand may be used with floating point operand modifiers :ref:`abs<amdgpu_synid_abs>` and :re…
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| H A D | gfx908_m_f5d306.rst | 13 This operand may be used with floating point operand modifiers :ref:`abs<amdgpu_synid_abs>` and :re…
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| H A D | gfx1030_m_f5d306.rst | 13 This operand may be used with floating point operand modifiers :ref:`abs<amdgpu_synid_abs>` and :re…
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| H A D | gfx7_m.rst | 13 This operand may be used with floating point operand modifiers :ref:`abs<amdgpu_synid_abs>` and :re…
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| H A D | gfx9_m_f5d306.rst | 13 This operand may be used with floating point operand modifiers :ref:`abs<amdgpu_synid_abs>` and :re…
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| /llvm-project-15.0.7/openmp/runtime/test/worksharing/for/ |
| H A D | omp_monotonic_schedule_set_get.c | 20 omp_sched_t sched_append_modifiers(omp_sched_t sched, omp_sched_t modifiers) { in sched_append_modifiers() argument
21 return (omp_sched_t)((int)sched | (int)modifiers); in sched_append_modifiers()
28 int sched_has_modifiers(omp_sched_t sched, omp_sched_t modifiers) { in sched_has_modifiers() argument
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| H A D | omp_monotonic_env.c | 22 int sched_has_modifiers(omp_sched_t sched, omp_sched_t modifiers) { in sched_has_modifiers() argument
23 return (int)sched & (int)modifiers; in sched_has_modifiers()
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| /llvm-project-15.0.7/llvm/docs/CommandGuide/ |
| H A D | llvm-ar.rst | 64 implementations. However, there are a few modifiers (:option:`L`) that are not
80 Delete files from the ``archive``. The :option:`N` and :option:`T` modifiers
89 :option:`b`, and :option:`i` modifiers apply to this operation. The *files*
90 will all be moved to the location given by the modifiers. If no modifiers are
107 :option:`L` and :option:`T` modifiers are used:
128 modifiers apply to this operation. If no *files* are specified, the archive
134 Print the table of contents. Without any modifiers, this operation just prints
157 The modifiers below are specific to certain operations. See the Operations
158 section to determine which modifiers are applicable to which operations.
215 The modifiers below may be applied to any operation.
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