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/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dset-gpr-idx-peephole.mir13 ; GCN: S_SET_GPR_IDX_OFF implicit-def $mode, implicit $mode
16 S_SET_GPR_IDX_OFF implicit-def $mode, implicit $mode
19 S_SET_GPR_IDX_OFF implicit-def $mode, implicit $mode
35 S_SET_GPR_IDX_OFF implicit-def $mode, implicit $mode
39 S_SET_GPR_IDX_OFF implicit-def $mode, implicit $mode
57 S_SET_GPR_IDX_OFF implicit-def $mode, implicit $mode
61 S_SET_GPR_IDX_OFF implicit-def $mode, implicit $mode
79 S_SET_GPR_IDX_OFF implicit-def $mode, implicit $mode
83 S_SET_GPR_IDX_OFF implicit-def $mode, implicit $mode
101 S_SET_GPR_IDX_OFF implicit-def $mode, implicit $mode
[all …]
H A Dlds-direct-hazards.mir9 ; GCN: $vgpr0 = V_MUL_F32_e32 $vgpr0, $vgpr0, implicit $mode, implicit $exec
12 $vgpr0 = V_MUL_F32_e32 $vgpr0, $vgpr0, implicit $mode, implicit $exec
25 $vgpr0 = V_MUL_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
39 $vgpr0 = V_MUL_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
54 $vgpr0 = V_MUL_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
55 $vgpr2 = V_MUL_F32_e32 $vgpr2, $vgpr2, implicit $mode, implicit $exec
78 $vgpr0 = V_MUL_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
79 $vgpr2 = V_MUL_F32_e32 $vgpr2, $vgpr2, implicit $mode, implicit $exec
80 $vgpr3 = V_MUL_F32_e32 $vgpr2, $vgpr2, implicit $mode, implicit $exec
194 $vgpr2 = V_SQRT_F32_e32 $vgpr2, implicit $mode, implicit $exec
[all …]
H A Dvopd-combine.mir41 … killed $vgpr0, $vgpr0, implicit $exec, implicit $mode, implicit $mode, implicit $exec, implicit $…
71 … killed $vgpr1, $vgpr1, implicit $exec, implicit $mode, implicit $mode, implicit $exec, implicit $…
249 …gpr3, 4, killed $vgpr1, implicit $exec, implicit $mode, implicit $mode, implicit $exec, implicit $…
279 …r3, 100, killed $vgpr1, implicit $exec, implicit $mode, implicit $mode, implicit $exec, implicit $…
328 … killed $vgpr0, $vgpr0, implicit $exec, implicit $mode, implicit $mode, implicit $exec, implicit $…
369 …$vgpr1, $vgpr0, $vgpr0, implicit $exec, implicit $mode, implicit $mode, implicit $exec, implicit $…
372 … $vgpr3, implicit $exec, implicit $vcc, implicit $mode, implicit $mode, implicit $exec, implicit $…
445 …$vgpr1, $vgpr0, $vgpr0, implicit $exec, implicit $mode, implicit $mode, implicit $exec, implicit $…
446 …$vgpr1, $vgpr0, $vgpr0, implicit $exec, implicit $mode, implicit $mode, implicit $exec, implicit $…
450 … $vgpr1, implicit $exec, implicit $mode, implicit $vcc, implicit $mode, implicit $exec, implicit $…
[all …]
H A Ddebug-value-scheduler.mir35 %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0
41 %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0
42 %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0
43 %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0
44 %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0
45 %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0
46 %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0
47 %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0
48 %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0
153 %69:vgpr_32 = V_ADD_F32_e64 0, killed %68, 0, 1, 0, 0, implicit $mode, implicit $exec
[all …]
H A Dmachine-scheduler-sink-trivial-remats.mir85 %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode
192 %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode
301 %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode
408 %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode
409 %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode
530 %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode
544 %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode
666 %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode
667 %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode
681 %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode
[all …]
H A Dmai-hazards-gfx940.mir887 $vgpr1 = V_MOV_B32_e32 0, implicit $mode, implicit $exec
898 $vgpr1 = V_MOV_B32_e32 0, implicit $mode, implicit $exec
910 $vgpr1 = V_MOV_B32_e32 0, implicit $mode, implicit $exec
986 $vgpr4 = V_MOV_B32_e32 0, implicit $mode, implicit $exec
997 $vgpr3 = V_MOV_B32_e32 0, implicit $mode, implicit $exec
1026 $vgpr1 = V_MOV_B32_e32 0, implicit $mode, implicit $exec
1035 $vgpr1 = V_MOV_B32_e32 0, implicit $mode, implicit $exec
1044 $vgpr1 = V_MOV_B32_e32 0, implicit $mode, implicit $exec
1053 $vgpr8 = V_MOV_B32_e32 0, implicit $mode, implicit $exec
1080 $vgpr9 = V_MOV_B32_e32 0, implicit $mode, implicit $exec
[all …]
H A Dmai-hazards-gfx90a.mir619 $vgpr1 = V_MOV_B32_e32 0, implicit $mode, implicit $exec
630 $vgpr1 = V_MOV_B32_e32 0, implicit $mode, implicit $exec
642 $vgpr1 = V_MOV_B32_e32 0, implicit $mode, implicit $exec
718 $vgpr4 = V_MOV_B32_e32 0, implicit $mode, implicit $exec
729 $vgpr3 = V_MOV_B32_e32 0, implicit $mode, implicit $exec
759 $vgpr1 = V_MOV_B32_e32 0, implicit $mode, implicit $exec
769 $vgpr1 = V_MOV_B32_e32 0, implicit $mode, implicit $exec
780 $vgpr1 = V_MOV_B32_e32 0, implicit $mode, implicit $exec
789 $vgpr8 = V_MOV_B32_e32 0, implicit $mode, implicit $exec
816 $vgpr9 = V_MOV_B32_e32 0, implicit $mode, implicit $exec
[all …]
H A Dsdwa-peephole-instr.mir100 %14 = V_FRACT_F32_e32 123, implicit $mode, implicit $exec
103 %17 = V_SIN_F32_e32 %16, implicit $mode, implicit $exec
106 %20 = V_CVT_U32_F32_e32 %19, implicit $mode, implicit $exec
108 %23 = V_CVT_F32_I32_e32 123, implicit $mode, implicit $exec
114 %27 = V_FRACT_F32_e64 0, %6, 0, 0, implicit $mode, implicit $exec
117 %30 = V_SIN_F32_e64 0, %29, 0, 0, implicit $mode, implicit $exec
122 %35 = V_CVT_F32_I32_e64 %6, 0, 0, implicit $mode, implicit $exec
130 %41 = V_SIN_F32_e64 0, %40, 1, 0, implicit $mode, implicit $exec
136 %47 = V_CVT_F32_I32_e64 %46, 0, 1, implicit $mode, implicit $exec
269 %16 = V_ADD_F32_e32 %14, %15, implicit $mode, implicit $exec
[all …]
H A Dmode-register.mir29 # check that the mode is not changed for interp f16 when the mode is already RTZ
44 S_SETREG_IMM32_B32 3, 2177, implicit-def $mode, implicit $mode
76 S_SETREG_IMM32_B32 0, 2177, implicit-def $mode, implicit $mode
109 S_SETREG_IMM32_B32 3, 2177, implicit-def $mode, implicit $mode
183 S_SETREG_IMM32_B32 2, 2049, implicit-def $mode, implicit $mode
270 S_SETREG_IMM32_B32 3, 2177, implicit-def $mode, implicit $mode
317 # check that multiple mode values are propagated to a block that uses the mode
340 S_SETREG_IMM32_B32 3, 2177, implicit-def $mode, implicit $mode
353 # sets or uses the mode.
376 S_SETREG_IMM32_B32 3, 2177, implicit-def $mode, implicit $mode
[all …]
H A Dtrans-forwarding-hazards.mir9 ; GCN: $vgpr1 = V_SQRT_F32_e32 $vgpr0, implicit $mode, implicit $exec
14 $vgpr1 = V_SQRT_F32_e32 $vgpr0, implicit $mode, implicit $exec
30 $vgpr1 = V_SQRT_F32_e32 $vgpr0, implicit $mode, implicit $exec
58 $vgpr1 = V_SQRT_F32_e32 $vgpr0, implicit $mode, implicit $exec
89 $vgpr1 = V_SQRT_F32_e32 $vgpr0, implicit $mode, implicit $exec
113 $vgpr1 = V_SQRT_F32_e32 $vgpr0, implicit $mode, implicit $exec
139 $vgpr1 = V_SQRT_F32_e32 $vgpr0, implicit $mode, implicit $exec
161 $vgpr1 = V_SQRT_F32_e32 $vgpr0, implicit $mode, implicit $exec
179 $vgpr1 = V_SQRT_F32_e32 $vgpr0, implicit $mode, implicit $exec
180 $vgpr3 = V_SQRT_F32_e32 $vgpr2, implicit $mode, implicit $exec
[all …]
H A Dlimit-soft-clause-reg-pressure.mir46 … dead %11:vgpr_32 = nofpexcept V_ADD_F32_e64 0, 0, 0, %4.sub1, 0, 0, implicit $mode, implicit $exec
47 … dead %12:vgpr_32 = nofpexcept V_ADD_F32_e64 0, 0, 0, %4.sub2, 0, 0, implicit $mode, implicit $exec
48 … dead %13:vgpr_32 = nofpexcept V_ADD_F32_e64 0, 0, 0, %4.sub3, 0, 0, implicit $mode, implicit $exec
49 … dead %14:vgpr_32 = nofpexcept V_ADD_F32_e64 0, 0, 0, %4.sub4, 0, 0, implicit $mode, implicit $exec
50 … dead %15:vgpr_32 = nofpexcept V_ADD_F32_e64 0, 0, 0, %4.sub5, 0, 0, implicit $mode, implicit $exec
51 … dead %16:vgpr_32 = nofpexcept V_ADD_F32_e64 0, 0, 0, %4.sub6, 0, 0, implicit $mode, implicit $exec
52 … dead %17:vgpr_32 = nofpexcept V_ADD_F32_e64 0, 0, 0, %4.sub7, 0, 0, implicit $mode, implicit $exec
53 … dead %18:vgpr_32 = nofpexcept V_ADD_F32_e64 0, 0, 0, %4.sub8, 0, 0, implicit $mode, implicit $exec
54 … dead %19:vgpr_32 = nofpexcept V_ADD_F32_e64 0, 0, 0, %4.sub9, 0, 0, implicit $mode, implicit $exec
61 … dead %26:vgpr_32 = nofpexcept V_ADD_F32_e64 0, 0, 0, %5.sub0, 0, 0, implicit $mode, implicit $exec
[all …]
H A Ddebug-value-scheduler-liveins.mir18 %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0
24 %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0
25 %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0
26 %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0
27 %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0
28 %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0
29 %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0
30 %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0
31 %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0
32 %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0
[all …]
H A Dfdiv-nofpexcept.ll16 ; GCN-NEXT: %8:vgpr_32 = nofpexcept V_RCP_F32_e64 0, %6, 0, 0, implicit $mode, implicit $exec
20 ; GCN-NEXT: S_SETREG_B32_mode killed [[S_MOV_B32_]], 2305, implicit-def $mode, implicit $mode
22 …gpr_32 = nofpexcept V_FMA_F32_e64 0, killed %12, 0, %8, 0, %8, 0, 0, implicit $mode, implicit $exec
23 …; GCN-NEXT: %14:vgpr_32 = nofpexcept V_MUL_F32_e64 0, %4, 0, %13, 0, 0, implicit $mode, implicit…
24 …; GCN-NEXT: %15:vgpr_32 = nofpexcept V_FMA_F32_e64 1, %6, 0, %14, 0, %4, 0, 0, implicit $mode, i…
26 …; GCN-NEXT: %17:vgpr_32 = nofpexcept V_FMA_F32_e64 1, %6, 0, %16, 0, %4, 0, 0, implicit $mode, i…
27 …GCN-NEXT: S_SETREG_B32_mode killed [[S_MOV_B32_2]], 2305, implicit-def dead $mode, implicit $mode
47 …; GCN-NEXT: %8:vgpr_32 = nnan nofpexcept V_RCP_F32_e64 0, %6, 0, 0, implicit $mode, implicit $ex…
51 ; GCN-NEXT: S_SETREG_B32_mode killed [[S_MOV_B32_]], 2305, implicit-def $mode, implicit $mode
54 …; GCN-NEXT: %14:vgpr_32 = nnan nofpexcept V_MUL_F32_e64 0, %4, 0, %13, 0, 0, implicit $mode, imp…
[all …]
H A Dfp-atomic-to-s_denormmode.mir13 S_DENORM_MODE 0, implicit-def $mode, implicit $mode
25 S_DENORM_MODE 0, implicit-def $mode, implicit $mode
37 S_DENORM_MODE 0, implicit-def $mode, implicit $mode
49 S_DENORM_MODE 0, implicit-def $mode, implicit $mode
61 S_DENORM_MODE 0, implicit-def $mode, implicit $mode
73 S_DENORM_MODE 0, implicit-def $mode, implicit $mode
85 S_DENORM_MODE 0, implicit-def $mode, implicit $mode
97 S_DENORM_MODE 0, implicit-def $mode, implicit $mode
109 S_DENORM_MODE 0, implicit-def $mode, implicit $mode
121 S_DENORM_MODE 0, implicit-def $mode, implicit $mode
[all …]
H A Dsdwa-peephole-instr-gfx10.mir91 %14 = V_FRACT_F32_e32 123, implicit $mode, implicit $exec
94 %17 = V_SIN_F32_e32 %16, implicit $mode, implicit $exec
97 %20 = V_CVT_U32_F32_e32 %19, implicit $mode, implicit $exec
99 %23 = V_CVT_F32_I32_e32 123, implicit $mode, implicit $exec
105 %27 = V_FRACT_F32_e64 0, %6, 0, 0, implicit $mode, implicit $exec
108 %30 = V_SIN_F32_e64 0, %29, 0, 0, implicit $mode, implicit $exec
113 %35 = V_CVT_F32_I32_e64 %6, 0, 0, implicit $mode, implicit $exec
121 %41 = V_SIN_F32_e64 0, %40, 1, 0, implicit $mode, implicit $exec
127 %47 = V_CVT_F32_I32_e64 %46, 0, 1, implicit $mode, implicit $exec
240 %16 = V_ADD_F32_e32 %14, %15, implicit $mode, implicit $exec
[all …]
H A Doptimize-exec-mask-pre-ra-alloc-failure.mir172 %89:vgpr_32 = nofpexcept V_FREXP_EXP_I32_F64_e64 2, %87, 0, 0, implicit $mode, implicit $exec
173 %90:vreg_64 = V_CVT_F64_I32_e32 %89, implicit $mode, implicit $exec
175 %0:sreg_32 = nofpexcept V_CMP_LT_F64_e64 0, %27, 0, %91, 0, implicit $mode, implicit $exec
177 %1:sreg_32 = nofpexcept V_CMP_GT_F64_e64 0, %31, 0, %90, 0, implicit $mode, implicit $exec
205 %103:sreg_32 = nofpexcept V_CMP_EQ_F64_e64 0, 0, 0, %87, 0, implicit $mode, implicit $exec
222 %118:vreg_64 = nofpexcept V_ADD_F64_e64 0, %117, 0, %43, 0, 0, implicit $mode, implicit $exec
224 %119:vreg_64 = nofpexcept V_ADD_F64_e64 0, %118, 0, %44, 0, 0, implicit $mode, implicit $exec
225 %120:vreg_64 = nofpexcept V_ADD_F64_e64 0, %24, 0, %119, 0, 0, implicit $mode, implicit $exec
226 %121:vreg_64 = nofpexcept V_MUL_F64_e64 0, %9, 0, %120, 0, 0, implicit $mode, implicit $exec
227 %122:vreg_64 = nofpexcept V_MUL_F64_e64 0, %121, 0, %45, 0, 0, implicit $mode, implicit $exec
[all …]
H A Dtwoaddr-mad.mir4 # GCN: V_MADMK_F32 killed %0.sub0, 1078523331, killed %1, implicit $mode, implicit $exec
18 %3 = V_MAC_F32_e32 killed %0.sub0, %2, killed %1, implicit $mode, implicit $exec
37 %3 = V_MAC_F32_e32 %2, killed %0.sub0, killed %1, implicit $mode, implicit $exec
42 # GCN: V_MADAK_F32 killed %0.sub0, %0.sub1, 1078523331, implicit $mode, implicit $exec
54 %2 = V_MAC_F32_e32 killed %0.sub0, %0.sub1, %1, implicit $mode, implicit $exec
73 %3 = V_MAC_F16_e32 killed %0.sub0, %2, killed %1, implicit $mode, implicit $exec
109 %2 = V_MAC_F16_e32 killed %0.sub0, %0.sub1, %1, implicit $mode, implicit $exec
130 %2 = V_MAC_F32_e32 killed %0, %1, %3, implicit $mode, implicit $exec
149 %1 = V_MAC_F32_e32 1073741824, %0, %2, implicit $mode, implicit $exec
167 %1 = V_MAC_F32_e32 1120403456, %0, %2, implicit $mode, implicit $exec
[all …]
H A Dneighboring-mfma-padding.mir13 …_F32_4X4X1F32_e64 $vgpr1, $vgpr0, $agpr0_agpr1_agpr2_agpr3, 0, 0, 0, implicit $mode, implicit $exec
16 …_F32_4X4X1F32_e64 $vgpr1, $vgpr0, $agpr0_agpr1_agpr2_agpr3, 0, 0, 0, implicit $mode, implicit $exec
19 …_F32_4X4X1F32_e64 $vgpr1, $vgpr0, $agpr0_agpr1_agpr2_agpr3, 0, 0, 0, implicit $mode, implicit $exec
23 …_F32_4X4X1F32_e64 $vgpr1, $vgpr0, $agpr0_agpr1_agpr2_agpr3, 0, 0, 0, implicit $mode, implicit $exec
27 …_F32_4X4X1F32_e64 $vgpr1, $vgpr0, $agpr0_agpr1_agpr2_agpr3, 0, 0, 0, implicit $mode, implicit $exec
30 …_F32_4X4X1F32_e64 $vgpr1, $vgpr0, $agpr0_agpr1_agpr2_agpr3, 0, 0, 0, implicit $mode, implicit $exec
31 …_F32_4X4X1F32_e64 $vgpr1, $vgpr0, $agpr0_agpr1_agpr2_agpr3, 0, 0, 0, implicit $mode, implicit $exec
59 …_F32_4X4X1F32_e64 $vgpr1, $vgpr0, $agpr0_agpr1_agpr2_agpr3, 0, 0, 0, implicit $mode, implicit $exec
61 …_F32_4X4X1F32_e64 $vgpr1, $vgpr0, $agpr0_agpr1_agpr2_agpr3, 0, 0, 0, implicit $mode, implicit $exec
91 …_F32_4X4X1F32_e64 $vgpr1, $vgpr0, $agpr0_agpr1_agpr2_agpr3, 0, 0, 0, implicit $mode, implicit $exec
[all …]
/llvm-project-15.0.7/clang/test/SemaCXX/
H A Dattr-mode-tmpl.cpp10 typedef T __attribute__((mode(QI))) T1; in CheckEnumerations()
11 typedef T T2 __attribute__((mode(HI))); in CheckEnumerations()
15 typedef enum __attribute__((mode(HI))) { A4, B4 } T4; in CheckEnumerations()
16 typedef enum { A5, B5 } __attribute__((mode(SI))) T5; in CheckEnumerations()
42 typedef T __attribute__((mode(II))) T7; // expected-error{{unknown machine mode}} in CheckMachineMode()
50 T2 __attribute__((mode(SF))) paramSF, in CheckParameters()
59 T __attribute__((mode(HI))) x1;
64 typedef T __attribute__((mode(DI))) T1;
69 void f1(T __attribute__((mode(QI))) x) {} in f1()
92 int __attribute__((mode(V4DI))) valV4DI; // expected-warning{{deprecated}} in main()
[all …]
/llvm-project-15.0.7/clang/test/Sema/
H A Dattr-mode.c18 typedef int i16_1 __attribute((mode(HI)));
23 typedef float f64 __attribute((mode(DF)));
40 typedef _Complex float c16a __attribute((mode(HC)));
42 typedef _Complex double c16b __attribute((mode(HC)));
45 typedef _Complex double c32 __attribute((mode(SC)));
47 typedef _Complex float c64 __attribute((mode(DC)));
50 typedef _Complex float c80 __attribute((mode(XC)));
100 typedef float w128ibm __attribute__((mode(IF)));
109 typedef _Complex float cf128 __attribute__((mode(KC)));
110 typedef float f128 __attribute__((mode(KF)));
[all …]
H A Dattr-mode-vector-types.c4 typedef int __attribute__((mode(byte))) __attribute__((vector_size(256))) vec_t1;
5 typedef int __attribute__((mode(QI))) __attribute__((vector_size(256))) vec_t2;
6 typedef int __attribute__((mode(SI))) __attribute__((vector_size(256))) vec_t3;
7 typedef int __attribute__((mode(DI))) __attribute__((vector_size(256)))vec_t4;
8 typedef float __attribute__((mode(SF))) __attribute__((vector_size(256))) vec_t5;
9 typedef float __attribute__((mode(DF))) __attribute__((vector_size(256))) vec_t6;
10 typedef float __attribute__((mode(XF))) __attribute__((vector_size(256))) vec_t7;
12 typedef int v8qi __attribute__ ((mode(QI))) __attribute__ ((vector_size(8)));
13 typedef int v8qi __attribute__ ((mode(V8QI)));
16 typedef float v4sf __attribute__((mode(V4SF)));
[all …]
H A Dattr-mode-enums.c20 …EnumType v1 __attribute__((mode(V4QI))); // expected-error{{mode 'V4QI' is not supported for enume… in main()
33 typedef enum Y __attribute__((mode(QI))) CompleteYType1; in main()
34 typedef enum Y CompleteYType2 __attribute__((mode(HI))); in main()
35 typedef enum { A1, B1 } __attribute__((mode(QI))) CompleteType3; in main()
36 typedef enum { A2, B2 } CompleteType4 __attribute__((mode(QI))); in main()
37 typedef enum __attribute__((mode(QI))) { A3, B3 } CompleteType5; in main()
39 enum X __attribute__((mode(QI))) a3; in main()
40 enum X a4 __attribute__((mode(HI))); in main()
41 IncompleteYType __attribute__((mode(QI))) a5; in main()
42 IncompleteYType a6 __attribute__((mode(HI))); in main()
[all …]
/llvm-project-15.0.7/compiler-rt/utils/
H A Dgenerate_netbsd_syscalls.awk552 if (mode == "pre") {
558 if (mode == "pre") {
568 if (mode == "pre") {
578 if (mode == "pre") {
592 if (mode == "pre") {
602 if (mode == "pre") {
624 if (mode == "pre") {
638 if (mode == "pre") {
656 if (mode == "pre") {
670 if (mode == "pre") {
[all …]
/llvm-project-15.0.7/clang/test/CodeGenCXX/
H A Dattr-mode-vector-types-tmpl.cpp7 typedef T __attribute__((mode(QI))) T1; in CheckIntScalarTypes()
8 typedef T __attribute__((mode(HI))) T2; in CheckIntScalarTypes()
9 typedef T __attribute__((mode(SI))) T3; in CheckIntScalarTypes()
10 typedef T __attribute__((mode(DI))) T4; in CheckIntScalarTypes()
22 typedef int __attribute__((mode(QI))) __attribute__((vector_size(8))) VT_11; in CheckIntVectorTypes()
23 typedef T __attribute__((mode(V8QI))) VT_12; in CheckIntVectorTypes()
24 typedef int __attribute__((mode(SI))) __attribute__((vector_size(16))) VT_21; in CheckIntVectorTypes()
25 typedef T __attribute__((mode(V4SI))) VT_22; in CheckIntVectorTypes()
61 typedef int __attribute__((mode(DI))) Int64Ty1;
62 typedef enum __attribute__((mode(DI))) { A2 } Int64Ty2;
[all …]
/llvm-project-15.0.7/libclc/generic/lib/
H A Dgen_convert.py218 for mode in rounding_modes:
321 for mode in rounding_modes:
347 if mode == '_rte':
349 elif mode == '_rtp':
351 elif mode == '_rtn':
354 elif mode == '_rte':
359 if mode == '_rtz':
368 if mode == '_rtp':
371 if mode == '_rtn':
384 for mode in rounding_modes:
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