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Searched refs:memops (Results 1 – 25 of 46) sorted by relevance

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/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Dfuture-check-features.ll1 ; RUN: llc -mattr=pcrelative-memops,prefix-instrs,paired-vector-memops,mma,rop-protect,privileged \
4 ; RUN: llc -mattr=pcrelative-memops,prefix-instrs,paired-vector-memops,mma,rop-protect,privileged \
H A Dfunc-alias.ll29 ; Function Attrs: noinline nounwind optnone -pcrelative-memops
30 ; This caller does not use PC Relative memops
46 attributes #1 = { noinline nounwind optnone "target-features"="-pcrelative-memops" }
H A Dpcrel-local-caller-toc.ll94 ; -pcrelative-memops while callee has +pcrelative-memops
95 …get-features"="+altivec,+bpermd,+crypto,+direct-move,+extdiv,+pcrelative-memops,+power8-vector,+po…
96 …get-features"="+altivec,+bpermd,+crypto,+direct-move,+extdiv,+pcrelative-memops,+power8-vector,+po…
97 …rmd,+crypto,+direct-move,+extdiv,+power8-vector,+power9-vector,+vsx,-htm,-pcrelative-memops,-spe" }
H A Dfusion-load-store.ll6 ; RUN: -mattr=-paired-vector-memops,-pcrelative-memops -verify-misched \
H A Daix-tls-xcoff-reloc-large.ll613 …,-bpermd,-crypto,-direct-move,-extdiv,-float128,-htm,-mma,-paired-vector-memops,-power10-vector,-p…
614 …,-bpermd,-crypto,-direct-move,-extdiv,-float128,-htm,-mma,-paired-vector-memops,-power10-vector,-p…
H A Daix-tls-xcoff-reloc.ll643 …,-bpermd,-crypto,-direct-move,-extdiv,-float128,-htm,-mma,-paired-vector-memops,-power10-vector,-p…
644 …,-bpermd,-crypto,-direct-move,-extdiv,-float128,-htm,-mma,-paired-vector-memops,-power10-vector,-p…
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Ddiscriminate-mem-ops-skip-pfetch.ll1 ; RUN: llc -x86-discriminate-memops < %s | FileCheck %s
2 ; RUN: llc -x86-discriminate-memops -x86-bypass-prefetch-instructions=0 < %s | FileCheck %s -check…
H A Dinsert-prefetch.ll1 ; RUN: llc < %s -x86-discriminate-memops -prefetch-hints-file=%S/insert-prefetch.afdo | FileCheck %s
2 ; RUN: llc < %s -x86-discriminate-memops -prefetch-hints-file=%S/insert-prefetch-other.afdo | FileC…
H A Dinsert-prefetch-invalid-instr.ll1 ; RUN: llc < %s -x86-discriminate-memops -prefetch-hints-file=%S/insert-prefetch-invalid-instr.afdo…
H A Ddiscriminate-mem-ops-missing-info.ll1 ; RUN: llc -x86-discriminate-memops < %s | FileCheck %s
H A Ddiscriminate-mem-ops.ll1 ; RUN: llc -x86-discriminate-memops < %s | FileCheck %s
H A Dinsert-prefetch-inline.ll1 ; RUN: llc < %s -x86-discriminate-memops -prefetch-hints-file=%S/insert-prefetch-inline.afdo | File…
/llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/
H A Dfeature-memops.ll22 attributes #1 = { nounwind "target-features"="-memops" }
H A Dmem-ops-sub_i16.ll2 ; Test that we do generate max #u5 in memops.
H A Dmem-ops-sub.ll2 ; Test that we do not exceed #u5 in memops.
H A Dmem-ops-sub_01.ll2 ; Test that we do generate max #u5 in memops.
H A Dmem-ops-sub_i16_01.ll2 ; Test that we do not exceed #u5 in memops.
H A Dtrivialmemaliascheck.ll5 ; determine this - in this case, it is because of the use of memops, that on the
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/X86/
H A Dmasked-interleaved-store-i16.ll10 ; Check that when we allow masked-memops to support interleave-group with gaps,
12 ; Check that when we don't allow masked-memops to support interleave-group with gaps,
70 ; fold-tail mask. If using masked memops to vectorize interleaved-group with gaps is
136 ; If using masked memops to vectorize interleaved-group with gaps is
H A Dmasked-interleaved-load-i16.ll10 ; Check that when we allow masked-memops to support interleave-group with gaps,
12 ; Check that when we don't allow masked-memops to support interleave-group with gaps,
70 ; fold-tail mask. If using masked memops to vectorize interleaved-group with gaps is
136 ; If using masked memops to vectorize interleaved-group with gaps is
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dmerge-store-dependency.ll179 ; Prefer paired memops over rotate.
196 ; Prefer paired memops over rotate.
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonShuffler.h152 unsigned memops; member
H A DHexagonShuffler.cpp374 Summary.memops == 0) in restrictStoreLoadOrder()
525 ++Summary.memops; in GetPacketSummary()
/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/X86/
H A Dx86-interleaved-store-accesses-with-gaps.ll9 ; Check that when we allow masked-memops to support interleave-group with gaps,
11 ; Check that when we don't allow masked-memops to support interleave-group with gaps,
123 ; fold-tail mask. If using masked memops to vectorize interleaved-group with gaps is
312 ; If using masked memops to vectorize interleaved-group with gaps is
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPC.td294 SubtargetFeature<"pcrelative-memops", "HasPCRelativeMemops", "true",
298 SubtargetFeature<"paired-vector-memops", "PairedVectorMemops", "true",

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