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/llvm-project-15.0.7/clang/test/CodeGen/
H A Dbuiltins-nvptx-mma.cu40 __hmma_m16n16k16_ld_a(dst, src, ldm, 1); in test_wmma_buitins()
43 __hmma_m16n16k16_ld_a(dst, src, ldm, 0); in test_wmma_buitins()
46 __hmma_m16n16k16_ld_b(dst, src, ldm, 1); in test_wmma_buitins()
49 __hmma_m16n16k16_ld_b(dst, src, ldm, 0); in test_wmma_buitins()
176 __hmma_m32n8k16_ld_a(dst, src, ldm, 1); in test_wmma_buitins()
179 __hmma_m32n8k16_ld_a(dst, src, ldm, 0); in test_wmma_buitins()
182 __hmma_m32n8k16_ld_b(dst, src, ldm, 1); in test_wmma_buitins()
185 __hmma_m32n8k16_ld_b(dst, src, ldm, 0); in test_wmma_buitins()
212 __hmma_m8n32k16_ld_a(dst, src, ldm, 1); in test_wmma_buitins()
215 __hmma_m8n32k16_ld_a(dst, src, ldm, 0); in test_wmma_buitins()
[all …]
H A Dbuiltins-nvptx-sm_70.cu36 int ldm) { in nvvm_wmma_m16n16k16() argument
39 __hmma_m16n16k16_ld_a(dst, src, ldm, 0); in nvvm_wmma_m16n16k16()
42 __hmma_m16n16k16_ld_a(dst, src+1, ldm, 1); in nvvm_wmma_m16n16k16()
46 __hmma_m16n16k16_ld_b(dst, src, ldm, 0); in nvvm_wmma_m16n16k16()
49 __hmma_m16n16k16_ld_b(dst, src+2, ldm, 1); in nvvm_wmma_m16n16k16()
53 __hmma_m16n16k16_ld_c_f16(dst, src, ldm, 0); in nvvm_wmma_m16n16k16()
187 __hmma_m32n8k16_ld_a(dst, src, ldm, 0); in nvvm_wmma_m32n8k16()
190 __hmma_m32n8k16_ld_a(dst, src+1, ldm, 1); in nvvm_wmma_m32n8k16()
194 __hmma_m32n8k16_ld_b(dst, src, ldm, 0); in nvvm_wmma_m32n8k16()
332 __hmma_m8n32k16_ld_a(dst, src, ldm, 0); in nvvm_wmma_m32n8k16()
[all …]
/llvm-project-15.0.7/llvm/test/tools/llvm-mca/ARM/
H A Dmemcpy-ldm-stm.s4 ldm r2!, {r3, r4, r5, r6, r12, lr}
26 # CHECK-NEXT: 3 18 2.00 * ldm r2!, {r3, r4, r5, r6, r12, lr}
43 # CHECK-NEXT: - - - 2.00 1.09 0.91 ldm r2!, {r3, r4, r5, r6, r12, lr}
50 # CHECK: [0,0] DeeeeeeeeeeeeeeeeeeER . . ldm r2!, {r3, r4, r5, r6, r12, lr}
52 # CHECK-NEXT: [1,0] . DeeeeeeeeeeeeeeeeeeER . . ldm r2!, {r3, r4, r5, r6, r12, lr}
54 # CHECK-NEXT: [2,0] . .DeeeeeeeeeeeeeeeeeeER . ldm r2!, {r3, r4, r5, r6, r12, lr}
64 # CHECK-NEXT: 0. 3 1.0 1.0 0.0 ldm r2!, {r3, r4, r5, r6, r12, lr}
H A Dcortex-a57-memory-instructions.s98 ldm r2, {r1, r2, r4, r5, r6}
270 # CHECK-NEXT: 12 6 6.00 * ldm r2, {r1, r2, r4, r5, r6}
271 # CHECK-NEXT: 12 6 6.00 * ldm r2, {r1, r2, r4, r5, r6}
272 # CHECK-NEXT: 6 5 6.00 * ldm r2, {r1, r3, r4, r5, r6}
280 # CHECK-NEXT: 16 10 16.00 * ldm r2, {r0, r1, r3, r4, r5, r6, r7, r8, r9…
281 # CHECK-NEXT: 32 11 16.00 * ldm r2, {r0, r2, r3, r4, r5, r6, r7, r8, r9…
449 # CHECK-NEXT: - 3.00 3.00 6.00 - - - - ldm r2, {r1, r2, r4, r5, r6}
450 # CHECK-NEXT: - 3.00 3.00 6.00 - - - - ldm r2, {r1, r2, r4, r5, r6}
451 # CHECK-NEXT: - - - 6.00 - - - - ldm r2, {r1, r3, r4, r5, r6}
459 # CHECK-NEXT: - - - 16.00 - - - - ldm r2, {r0, r1, r3, r4, r5, …
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Thumb/
H A Dldm-stm-base-materialization.ll16 ; CHECK-NEXT: ldm r[[NLB]]!, {r[[R1:[0-9]]], r[[R2:[0-9]]], r[[R3:[0-9]]]}
18 ; CHECK-NEXT: ldm r[[NLB]]!, {r[[R1:[0-9]]], r[[R2:[0-9]]], r[[R3:[0-9]]]}
37 ; CHECK-NEXT: ldm r[[NLB]]!, {r[[R1:[0-9]]], r[[R2:[0-9]]], r[[R3:[0-9]]]}
39 ; CHECK-NEXT: ldm r[[NLB]]!, {r[[R1:[0-9]]], r[[R2:[0-9]]], r[[R3:[0-9]]], r[[R4:[0-9]]]}
58 ; CHECK-NEXT: ldm r[[NLB]]!, {r[[R1:[0-9]]], r[[R2:[0-9]]], r[[R3:[0-9]]], r[[R4:[0-9]]]}
60 ; CHECK-NEXT: ldm r[[NLB]]!, {r[[R1:[0-9]]], r[[R2:[0-9]]], r[[R3:[0-9]]], r[[R4:[0-9]]]}
79 ; CHECK-NEXT: ldm r[[NLB]]!, {r[[R1:[0-9]]], r[[R2:[0-9]]], r[[R3:[0-9]]]}
81 ; CHECK-NEXT: ldm r[[NLB]]!, {r[[R1:[0-9]]], r[[R2:[0-9]]], r[[R3:[0-9]]]}
83 ; CHECK-NEXT: ldm r[[NLB]]!, {r[[R1:[0-9]]], r[[R2:[0-9]]], r[[R3:[0-9]]]}
H A Dldm-stm-base-materialization-thumb2.ll17 ; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-…
36 ; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]]!, {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]]}
38 ; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-…
57 ; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]]!, {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0…
59 ; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-…
78 ; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]]!, {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0…
80 ; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-…
H A Dthumb-ldm.ll8 ; CHECK: ldm
19 ; CHECK: ldm
31 ; CHECK: ldm
/llvm-project-15.0.7/llvm/test/MC/ARM/
H A Dthumb-load-store-multiple.s11 .global ldm
12 .type ldm,%function
13 ldm: label
14 ldm r0!, {r1, sp}
16 @ CHECK: ldm r0!, {r1, sp}
18 ldm r0!, {lr, pc}
20 @ CHECK: ldm r0!, {lr, pc}
H A Darm-load-store-multiple-deprecated.s117 .global ldm
118 .type ldm,%function
119 ldm: label
120 ldm r0!, {r1, lr, pc}
122 ldm r0!, {lr, pc}
194 ldm r0!, {r1, sp}
195 @ CHECK: ldm r0!, {r1, sp}
196 ldm r0!, {sp}
197 @ CHECK: ldm r0!, {sp}
H A Dthumb-diagnostics.s88 ldm r2!, {r5, r8}
89 ldm r2, {r5, r7}
90 ldm r2!, {r2, r3, r4}
91 ldm r2!, {r2, r3, r4, r10}
93 ldm r0, {r2, sp}
101 @ CHECK-ERRORS: ldm r2!, {r5, r8}
104 @ CHECK-ERRORS: ldm r2, {r5, r7}
107 @ CHECK-ERRORS: ldm r2!, {r2, r3, r4}
110 @ CHECK-ERRORS-V8: ldm r2!, {r2, r3, r4, r10}
116 @ CHECK-ERRORS-V7M: ldm r0, {r2, sp}
H A Dbasic-thumb-instructions.s250 ldm r3, {r0, r1, r2, r3, r4, r5, r6, r7}
251 ldm r2!, {r1, r3, r4, r5, r7}
252 ldm r1, {r1}
254 @ CHECK: ldm r3, {r0, r1, r2, r3, r4, r5, r6, r7} @ encoding: [0xff,0xcb]
255 @ CHECK: ldm r2!, {r1, r3, r4, r5, r7} @ encoding: [0xba,0xca]
256 @ CHECK: ldm r1, {r1} @ encoding: [0x02,0xc9]
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dldm-stm-base-materialization.ll17 ; CHECK-NEXT: ldm [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]], [[R…
36 ; CHECK-NEXT: ldm [[NLB]]!, {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]]}
38 ; CHECK-NEXT: ldm [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]]}
57 ; CHECK-NEXT: ldm [[NLB]]!, {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]]}
59 ; CHECK-NEXT: ldm [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]]}
78 ; CHECK-NEXT: ldm [[NLB]]!, {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]]}
80 ; CHECK-NEXT: ldm [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]], [[R…
H A Dmemcpy-ldm-stm.ll22 ; CHECK-NEXT: ldm{{(\.w)?}} [[LB]]!,
37 ; CHECKV6-NEXT: ldm{{(\.w)?}} [[LB]]!,
76 ; 3 ldm/stm pairs in v6; 2 in v7
77 ; CHECK: ldm{{(\.w)?}} {{[rl0-9]+!?}}, [[REGLIST1:{.*}]]
79 ; CHECK: ldm{{(\.w)?}} {{[rl0-9]+!?}}, [[REGLIST2:{.*}]]
81 ; CHECKV6: ldm {{r[0-7]!?}}, [[REGLIST3:{.*}]]
83 ; CHECKV7-NOT: ldm
H A Dsegmented-stacks.ll30 ; ARM-linux-NEXT: ldm sp!, {lr}
49 ; ARM-android-NEXT: ldm sp!, {lr}
77 ; ARM-linux-NEXT: ldm sp!, {lr}
96 ; ARM-android-NEXT: ldm sp!, {lr}
123 ; ARM-linux-NEXT: ldm sp!, {lr}
146 ; ARM-android-NEXT: ldm sp!, {lr}
175 ; ARM-linux-NEXT: ldm sp!, {lr}
194 ; ARM-android-NEXT: ldm sp!, {lr}
221 ; ARM-linux-NEXT: ldm sp!, {lr}
244 ; ARM-android-NEXT: ldm sp!, {lr}
H A D2013-01-21-PR14992.ll16 ;EXPECTED: ldm [[BASE:r[0-9]+]]!, {[[REG:r[0-9]+]], {{r[0-9]+}},
17 ;CHECK-NOT: ldm [[BASE:r[0-9]+]]!, {[[REG:r[0-9]+]], [[REG]],
H A D2015-01-21-thumbv4t-ldstr-opt.ll14 ; CHECK-NEXT: ldm [[NEWBASE]],
38 ; CHECK-NEXT: ldm [[NEWBASE]],
H A Dldm-stm-i256.ll5 ; being used as a test of optimizations related to ldm/stm.
20 ; CHECK-DAG: ldm r2
H A D2012-10-04-AAPCS-byval-align8.ll31 ; ldm is not formed when the coalescer failed to coalesce everything.
58 ; ldm is not formed when the coalescer failed to coalesce everything.
H A D2011-11-28-DAGCombineBug.ll5 ; combined them into a ldm which causes runtime exception.
16 ; CHECK-NOT: ldm
H A Dsegmented-stacks-dynamic.ll36 ; ARM-linux-NEXT: ldm sp!, {lr}
56 ; ARM-android-NEXT: ldm sp!, {lr}
H A Darm-modifier.ll51 ; CHECK: ldm {{lr|r[0-9]+}}, {r{{[0-9]+}}, r{{[0-9]+}}}
56 %1 = call i64 asm sideeffect "ldm ${1:m}, ${0:M}\0A\09", "=r,*m"(i64** elementtype(i64*) @f3_ptr) n…
H A Dgpr-paired-spill.ll33 ; CHECK-WITHOUT-LDRD-DAG: ldm [[ADDRREG]], {r{{[0-9]+}}, r{{[0-9]+}}}
34 ; CHECK-WITHOUT-LDRD-DAG: ldm sp, {r{{[0-9]+}}, r{{[0-9]+}}}
/llvm-project-15.0.7/llvm/test/CodeGen/Thumb2/
H A Dthumb2-ldm.ll11 ; CONSERVATIVE-NOT: ldm
22 ; CHECK: ldm
24 ; CONSERVATIVE-NOT: ldm
36 ; CHECK: ldm
38 ; CONSERVATIVE-NOT: ldm
53 ; ALL: ldm.w sp, {r0, r1, r2}
/llvm-project-15.0.7/compiler-rt/lib/builtins/arm/
H A Daeabi_cfcmp.S36 ldm r0, {r0-r3}
91 ldm r0, {r0-r3}
109 ldm sp, {r0-r3}
H A Daeabi_cdcmp.S36 ldm r0, {r0-r3}
91 ldm r0, {r0-r3}
109 ldm sp, {r0-r3}

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