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Searched refs:ldc (Results 1 – 25 of 38) sorted by relevance

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/llvm-project-15.0.7/llvm/test/CodeGen/XCore/
H A Dbigstructret.ll16 ; CHECK: ldc r0, 12
17 ; CHECK: ldc r1, 24
18 ; CHECK: ldc r2, 48
19 ; CHECK: ldc r3, 24601
26 ; CHECK: ldc [[REGISTER:r[0-9]+]], 5
40 ; CHECK: ldc [[REGISTER:r[0-9]+]], 0
64 ; CHECK: ldc r1, 4321
66 ; CHECK: ldc r1, 24601
68 ; CHECK: ldc r1, 48
70 ; CHECK: ldc r1, 24
[all …]
H A Dmul64.ll11 ; CHECK: ldc [[REG:r[0-9]+]], 0
23 ; CHECK: ldc
34 ; CHECK: ldc
46 ; CHECK: ldc
H A Dladd_lsub_combine.ll12 ; CHECK: ldc r2, 0
25 ; CHECK: ldc r2, 0
38 ; CHECK: ldc r3, 0
51 ; CHECK: ldc r3, 0
64 ; CHECK: ldc r3, 0
H A Dashr.ll55 ; CHECK-NEXT: ldc r0, 17
56 ; CHECK: ldc r0, 10
66 ; CHECK-NEXT: ldc r0, 10
67 ; CHECK: ldc r0, 17
H A Dllvm-intrinsics.ll56 ; CHECK: ldc r0, 0
68 ; CHECK-NEXT: ldc r0, 400
85 ; CHECK: ldc r2, 8
114 ; CHECK-NEXT: ldc r0, 20
138 ; CHECK-NEXT: ldc r1, 12
288 ; CHECKFP-NEXT: ldc r2, 40
336 ; CHECK-NEXT: ldc r2, 36
H A Daddsub64.ll7 ; CHECK: ldc r11, 0
17 ; CHECK: ldc r11, 0
H A DbyVal.ll21 ; CHECK: ldc r2, 40
62 ; CHECK: ldc r1, 0
H A Dtrap.ll5 ; CHECK: ldc
H A Dunaligned_store_combine.ll8 ; CHECK: ldc r2, 8
H A Dexception.ll30 ; CHECK: ldc r0, 4
33 ; CHECK: ldc r2, 0
H A Dthreads.ll77 ; CHECK: ldc [[R1:r[0-9]]], 8
78 ; CHECK: ldc [[R2:r[0-9]]], 12
/llvm-project-15.0.7/llvm/test/MC/ARM/
H A Dgas-compl-copr-reg.s3 @ CHECK: ldc p12, c4, [r0, #4] @ encoding: [0x01,0x4c,0x90,0xed]
6 ldc p12, cr4, [r0, #4]
10 @ CHECK: ldc p12, c4, [r0, #4] @ encoding: [0x01,0x4c,0x90,0xed]
13 ldc p12, cr4, [r0, #4]
/llvm-project-15.0.7/clang/test/CodeGen/
H A Dcomplex-builtins-3.c29 volatile long double _Complex ldc = 1.0L + 2.0iL; in main() local
57 if (__builtin_conjl (ldc) != 1.0L - 2.0iL) in main()
61 if (__builtin_creall (ldc) != 1.0L) in main()
65 if (__builtin_cimagl (ldc) != 2.0L) in main()
H A Dbuiltins-arm.c104 void ldc(const void *i) { in ldc() function
/llvm-project-15.0.7/llvm/test/tools/llvm-objdump/ELF/ARM/
H A Dliteral-arm.s48 ldc p14, c5, foo
52 @ CHECK-NEXT: 2c: ldc p14, c5, [pc, #-52] @ 0x0 <foo>
59 ldc p14, c5, [r1, #8]
60 ldc p14, c5, [pc], {16}
61 @ CHECK-NEXT: 3c: ldc p14, c5, [r1, #8]{{$}}
62 @ CHECK-NEXT: 40: ldc p14, c5, [pc], {16}{{$}}
H A Dliteral-thumb2.s86 ldc p14, c5, foo
90 @ CHECK: 68: ldc p14, c5, [pc, #-108] @ 0x0 <foo>
97 ldc p14, c5, foo
101 @ CHECK: 7a: ldc p14, c5, [pc, #-124] @ 0x0 <foo>
108 ldc p14, c5, [r1, #8]
109 ldc p14, c5, [pc], {16}
110 @ CHECK: 8a: ldc p14, c5, [r1, #8]{{$}}
111 @ CHECK-NEXT: 8e: ldc p14, c5, [pc], {16}{{$}}
/llvm-project-15.0.7/llvm/test/DebugInfo/
H A Ddwarfdump-immutable.ll32 !12 = !DIFile(filename: "usr/include/dlang/ldc/object.d", directory: "/")
33 !13 = !{!"ldc version 1.28.0"}
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dintrinsics-coprocessor.ll21 ; CHECK: ldc p7, c3, [r{{[0-9]+}}]
22 tail call void @llvm.arm.ldc(i32 7, i32 3, i8* %i) nounwind
44 declare void @llvm.arm.ldc(i32, i32, i8*) nounwind
/llvm-project-15.0.7/llvm/test/CodeGen/Thumb2/
H A Dintrinsics-coprocessor.ll20 ; CHECK: ldc p7, c3, [r{{[0-9]+}}]
21 tail call void @llvm.arm.ldc(i32 7, i32 3, i8* %i) nounwind
59 declare void @llvm.arm.ldc(i32, i32, i8*) nounwind
/llvm-project-15.0.7/llvm/test/MC/Disassembler/ARM/
H A Dthumb2-v8.txt39 # CHECK: ldc p14
H A Dinvalid-thumbv8.txt144 # CHECK-V7: ldc
149 # CHECK-V7: ldc
H A Dinvalid-armv8.txt144 # CHECK-V7: ldc
149 # CHECK-V7: ldc
H A Dbasic-arm-instructions-v8.txt57 # CHECK: ldc p14
/llvm-project-15.0.7/llvm/test/DebugInfo/XCore/
H A Ddwarf-mem-barrier.ll6 ; CHECK: ldc r0, 0
/llvm-project-15.0.7/llvm/test/MC/Disassembler/XCore/
H A Dxcore.txt479 # CHECK: ldc r3, 30
482 # CHECK: ldc r11, 1000
485 # CHECK: ldc sp, 0
488 # CHECK: ldc lr, 81

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