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/llvm-project-15.0.7/mlir/lib/Analysis/
H A DDataLayoutAnalysis.cpp21 layouts[op] = std::make_unique<DataLayout>(iface); in DataLayoutAnalysis()
23 layouts[op] = std::make_unique<DataLayout>(module); in DataLayoutAnalysis()
37 auto it = layouts.find(ancestor); in getAbove()
38 if (it != layouts.end()) in getAbove()
47 auto it = layouts.find(operation); in getAtOrAbove()
48 if (it != layouts.end()) in getAtOrAbove()
/llvm-project-15.0.7/mlir/test/lib/Dialect/DLTI/
H A DTestDataLayoutQuery.cpp31 const DataLayoutAnalysis &layouts = getAnalysis<DataLayoutAnalysis>(); in runOnOperation() local
38 const DataLayout &layout = layouts.getAbove(op); in runOnOperation()
/llvm-project-15.0.7/mlir/test/Dialect/DLTI/
H A Dinvalid.mlir58 // expected-error@below {{data layout does not combine with layouts of enclosing ops}}
79 // expected-error@below {{data layout does not combine with layouts of enclosing ops}}
89 // expected-error@below {{data layout does not combine with layouts of enclosing ops}}
H A Droundtrip.mlir39 // Should not fail on nested compatible layouts.
45 // Should not fail on deeper nested compatible layouts.
/llvm-project-15.0.7/mlir/include/mlir/Analysis/
H A DDataLayoutAnalysis.h40 DenseMap<Operation *, std::unique_ptr<DataLayout>> layouts;
/llvm-project-15.0.7/llvm/test/Linker/
H A Ddatalayout.ll14 ; WARN-B: warning: Linking two modules of different data layouts:
H A Dcuda-libdevice.ll30 ; WARN-DL-DAG: warning: Linking two modules of different data layouts:
/llvm-project-15.0.7/llvm/test/tools/llvm-objcopy/ELF/
H A Dlayout-sections-by-original-offsets.test5 ## This checks that llvm-objcopy layouts sections in the order of their offsets
/llvm-project-15.0.7/clang/test/CodeGenObjC/
H A Dfragile-arc.m24 // ^ is compiled by ARC (controls interpretation of layouts)
117 // Note that these layouts implicitly start at the end of the previous
H A Dmrc-weak.m10 // of the superclass. Ensure that they're still covered by layouts.
/llvm-project-15.0.7/mlir/test/Transforms/
H A Dnormalize-memrefs.mlir3 // This file tests whether the memref type having non-trivial map layouts
4 // are normalized to trivial (identity) layouts.
/llvm-project-15.0.7/mlir/docs/
H A DDataLayout.md21 Similarly, built-in `ModuleOp` supports data layouts without going through the
197 enclosing scopes (layouts are expected to be compatible).
H A DShapeInference.md65 currently left open with the intention of supporting extensions such as layouts
H A DTargetLLVMIR.md97 trivial layouts should be converted into the strided form first, e.g., by
/llvm-project-15.0.7/mlir/include/mlir/Interfaces/
H A DDataLayoutInterfaces.td97 "layouts, provided from the outermost (oldest) to the "
/llvm-project-15.0.7/mlir/docs/Rationale/
H A DRationale.md65 of the polyhedral information, and so are tensor variables, their layouts, and
76 layout such as padding and transforming to blocked layouts are also represented
80 high-level transformations for loop nests and data layouts that a typical
943 1. Allow piece-wise affine maps for layouts: allows clean modeling of
/llvm-project-15.0.7/llvm/docs/
H A DBigEndianNEON.rst93 …gether. The intention is for arrays and vectors to have identical memory layouts - ``[4 x i8]`` an…
/llvm-project-15.0.7/mlir/include/mlir/Dialect/LLVMIR/
H A DNVVMOps.td487 // MMA ops check both layouts.
907 combinations are possible for certain layouts according to the table below.
/llvm-project-15.0.7/clang/include/clang/Basic/
H A DLangOptions.def291 BENIGN_LANGOPT(DumpVTableLayouts , 1, 0, "dumping the layouts of emitted vtables")
H A DDiagnosticASTKinds.td577 "ms_struct may not produce Microsoft-compatible layouts with fundamental "
/llvm-project-15.0.7/mlir/include/mlir/Dialect/MemRef/IR/
H A DMemRefOps.td326 1. Both have the same layout or both have compatible strided layouts.
399 Otherwise, the result is undefined. They may have different layouts.
/llvm-project-15.0.7/libcxx/
H A DCMakeLists.txt73 symbols but also potentially different layouts of types), and one should not mix code
/llvm-project-15.0.7/mlir/docs/Dialects/Linalg/
H A D_index.md102 // memory layouts
/llvm-project-15.0.7/clang/include/clang/Driver/
H A DOptions.td5340 def fdump_vtable_layouts : Flag<["-"], "fdump-vtable-layouts">,
5341 HelpText<"Dump the layouts of all vtables that will be emitted in a translation unit">,
5905 def fdump_record_layouts_simple : Flag<["-"], "fdump-record-layouts-simple">,
5908 def fdump_record_layouts_canonical : Flag<["-"], "fdump-record-layouts-canonical">,
5911 def fdump_record_layouts_complete : Flag<["-"], "fdump-record-layouts-complete">,
5914 def fdump_record_layouts : Flag<["-"], "fdump-record-layouts">,
5932 HelpText<"Override record layouts with those in the given file">,
6423 Alias<Xclang>, AliasArgs<["-fdump-record-layouts"]>;
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dblock-placement.ll947 ; strange layouts that are siginificantly less efficient, often times making

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