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Searched refs:isOrigArg (Results 1 – 7 of 7) sorted by relevance

/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DTargetCallingConv.h219 bool isOrigArg() const { in isOrigArg() function
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp3658 if (Ins[InsIdx].isOrigArg()) { in LowerFormalArguments()
3667 assert(Ins[InsIdx].isOrigArg() && "Byval arguments cannot be implicit"); in LowerFormalArguments()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp4342 if (Ins[ArgNo].isOrigArg()) { in LowerFormalArguments_64SVR4()
4370 assert(Ins[ArgNo].isOrigArg() && "Byval arguments cannot be implicit"); in LowerFormalArguments_64SVR4()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp5785 if (Ins[i].isOrigArg()) { in LowerFormalArguments()
5979 if (Ins[i].isOrigArg()) { in LowerFormalArguments()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp4494 if (Ins[VA.getValNo()].isOrigArg()) { in LowerFormalArguments()
4603 assert(Ins[index].isOrigArg() && in LowerFormalArguments()
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp10589 else if (Ins[i].isOrigArg()) in analyzeInputArgs()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp2448 if (Arg.isOrigArg() && Skipped[Arg.getOrigArgIndex()]) { in LowerFormalArguments()