| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86RegisterBankInfo.h | 35 static PartialMappingIdx getPartialMappingIdx(const LLT &Ty, bool isFP);
49 bool isFP) const;
54 const MachineRegisterInfo &MRI, const bool isFP,
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| H A D | X86RegisterBankInfo.cpp | 65 X86GenRegisterBankInfo::getPartialMappingIdx(const LLT &Ty, bool isFP) { in getPartialMappingIdx() argument
66 if ((Ty.isScalar() && !isFP) || Ty.isPointer()) { in getPartialMappingIdx()
111 const MachineInstr &MI, const MachineRegisterInfo &MRI, const bool isFP, in getInstrPartialMappingIdxs() argument
120 OpRegBankIdx[Idx] = getPartialMappingIdx(MRI.getType(MO.getReg()), isFP); in getInstrPartialMappingIdxs()
145 bool isFP) const { in getSameOperandsMapping()
156 auto Mapping = getValueMapping(getPartialMappingIdx(Ty, isFP), 3); in getSameOperandsMapping()
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| H A D | X86ISelLowering.cpp | 5465 bool isFP, SDValue &LHS, SDValue &RHS, in TranslateX86CC() argument
5467 if (!isFP) { in TranslateX86CC()
24280 bool isFP = Op1.getSimpleValueType().isFloatingPoint(); in LowerVSETCC() local
24283 if (isFP) { in LowerVSETCC()
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| /llvm-project-15.0.7/llvm/utils/TableGen/ |
| H A D | FastISelEmitter.cpp | 107 bool isFP() const { return Repr == OK_FP; } in isFP() function in __anon7553c2e00311::OperandsSignature::OpKind
116 else if (isFP()) in printManglingSuffix()
300 } else if (Operands[i].isFP()) { in PrintParameters()
322 } else if (Operands[i].isFP()) { in PrintArguments()
338 } else if (Operands[i].isFP()) { in PrintArguments()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.td | 1612 bit isFP = isFloatType<VT>.ret;
1615 !if(isFP,
1656 bit isFP = isFloatType<VT>.ret;
1665 bit isFP = isFloatType<VT>.ret;
1670 !if(isFP,
1679 !if(isFP,
1705 bit isFP = isFloatType<VT>.ret;
1708 !if (isFP,
1739 bit isFP = isFloatType<VT>.ret;
1743 !if(isFP,
[all …]
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| H A D | BUFInstructions.td | 754 let FPAtomic = isFP in
758 let FPAtomic = isFP in
762 let FPAtomic = isFP in
765 let FPAtomic = isFP in
769 let FPAtomic = isFP in
777 bit isFP = isFloatType<vdataType>.ret> {
778 let FPAtomic = isFP in
785 let FPAtomic = isFP in
792 let FPAtomic = isFP in
795 let FPAtomic = isFP in
[all …]
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| H A D | FLATInstructions.td | 475 bit isFP = isFloatType<data_vt>.ret,
484 let FPAtomic = isFP;
494 let FPAtomic = isFP;
505 bit isFP = isFloatType<data_vt>.ret,
516 let FPAtomic = isFP;
528 let FPAtomic = isFP;
538 bit isFP = isFloatType<data_vt>.ret,
549 let FPAtomic = isFP;
561 let FPAtomic = isFP;
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| H A D | MIMGInstructions.td | 780 bit isFP = 0> {
783 ssamp = 0, FPAtomic = isFP in {
854 multiclass MIMG_Atomic <mimgopc op, string asm, bit isCmpSwap = 0, bit isFP = 0> { // 64-bit atomics
866 defm _V1 : MIMG_Atomic_Addr_Helper_m <op, asm, !if(isCmpSwap, VReg_64, VGPR_32), 1, isFP>;
868 defm _V2 : MIMG_Atomic_Addr_Helper_m <op, asm, !if(isCmpSwap, VReg_128, VReg_64), 0, isFP>;
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrFormats.td | 146 bits<1> isFP = 0;
147 let TSFlags {50} = isFP; // Floating-point.
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| H A D | HexagonDepInstrInfo.td | 4117 let isFP = 1;
4129 let isFP = 1;
4139 let isFP = 1;
4149 let isFP = 1;
4161 let isFP = 1;
4171 let isFP = 1;
4181 let isFP = 1;
4193 let isFP = 1;
4205 let isFP = 1;
4217 let isFP = 1;
[all …]
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 2509 const bool isFP = Opcode == TargetOpcode::G_FCONSTANT; in select() local
2524 if (isFP) { in select()
2562 if (isFP) { in select()
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