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Searched refs:isDS (Results 1 – 7 of 7) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUIGroupLP.cpp169 return TII->isVMEM(MI) || (TII->isFLAT(MI) && !TII->isDS(MI)); in isVMEMSGMember()
174 (TII->isVMEM(MI) || (TII->isFLAT(MI) && !TII->isDS(MI))); in isVMEMReadSGMember()
179 (TII->isVMEM(MI) || (TII->isFLAT(MI) && !TII->isDS(MI))); in isVMEMWriteSGMember()
183 return MI.mayStore() && TII->isDS(MI); in isDSWriteSGMember()
187 return MI.mayLoad() && TII->isDS(MI); in isDSReadSGMember()
H A DGCNHazardRecognizer.cpp153 if (TII.isDS(MI.getOpcode())) { in isSendMsgTraceDataOrGDS()
221 SIInstrInfo::isFLAT(*MI) || SIInstrInfo::isDS(*MI) || in getHazardType()
343 SIInstrInfo::isFLAT(*MI) || SIInstrInfo::isDS(*MI) || in PreEmitNoopsCommon()
371 SIInstrInfo::isDS(*MI)) in PreEmitNoopsCommon()
1305 HasLds |= SIInstrInfo::isDS(MI); in shouldRunLdsBranchVmemWARHazardFixup()
1322 if (SIInstrInfo::isDS(MI)) in fixLdsBranchVmemWARHazard()
1396 SIInstrInfo::isDS(I) || SIInstrInfo::isEXP(I); in fixLdsDirectVALUHazard()
1428 !SIInstrInfo::isDS(I)) in fixLdsDirectVMEMHazard()
1505 SIInstrInfo::isDS(I) || SIInstrInfo::isEXP(I) || in fixVALUPartialForwardingHazard()
1640 SIInstrInfo::isDS(I) || SIInstrInfo::isEXP(I) || in fixVALUTransUseHazard()
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H A DAMDGPUReleaseVGPRs.cpp71 if (SIInstrInfo::isDS(MI) || SIInstrInfo::isEXP(MI) || in isLastVGPRUseVMEMStore()
H A DSIPreEmitPeephole.cpp328 TII->isDS(MI) || MI.getOpcode() == AMDGPU::S_WAITCNT) in mustRetainExeczBranch()
H A DSIInsertWaitcnts.cpp540 if (TII->isDS(Inst) && (Inst.mayStore() || Inst.mayLoad())) { in updateByEvent()
677 if (Inst.mayStore() && (TII->isDS(Inst) || mayWriteLDSThroughDMA(Inst))) { in updateByEvent()
1372 if (TII->isDS(Inst) && TII->usesLGKM_CNT(Inst)) { in updateEventWaitcntAfter()
H A DSIInstrInfo.h489 static bool isDS(const MachineInstr &MI) { in isDS() function
493 bool isDS(uint16_t Opcode) const { in isDS() function
H A DSIInstrInfo.cpp188 if (isDS(Opc0) && isDS(Opc1)) { in areLoadsFromSameBasePtr()
309 if (isDS(LdSt)) { in getMemOperandsWithOffsetWidth()
3180 if (isDS(MIa)) { in areMemAccessesTriviallyDisjoint()
3181 if (isDS(MIb)) in areMemAccessesTriviallyDisjoint()
4600 uint16_t DataNameIdx = isDS(Opcode) ? AMDGPU::OpName::data0 in verifyInstruction()
5031 (MI.mayLoad() || MI.mayStore() || isDS(Opc) || isMIMG(Opc))) in isOperandLegal()
5036 isDS(Opc) ? AMDGPU::OpName::data0 : AMDGPU::OpName::vdata); in isOperandLegal()