Searched refs:is64bit (Results 1 – 9 of 9) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/Sparc/ |
| H A D | SparcTargetMachine.cpp | 93 Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT, bool is64bit) in SparcTargetMachine() argument
94 : LLVMTargetMachine(T, computeDataLayout(TT, is64bit), TT, CPU, FS, Options, in SparcTargetMachine()
97 CM, getEffectiveRelocModel(RM), is64bit, JIT), in SparcTargetMachine()
100 Subtarget(TT, std::string(CPU), std::string(FS), *this, is64bit), in SparcTargetMachine()
101 is64Bit(is64bit) { in SparcTargetMachine()
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| H A D | SparcSubtarget.h | 62 const std::string &FS, const TargetMachine &TM, bool is64bit);
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| H A D | SparcTargetMachine.h | 31 CodeGenOpt::Level OL, bool JIT, bool is64bit);
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| /llvm-project-15.0.7/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXTargetMachine.h | 26 bool is64bit; variable
40 CodeGenOpt::Level OP, bool is64bit);
47 bool is64Bit() const { return is64bit; } in is64Bit()
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| H A D | NVPTXTargetMachine.cpp | 117 CodeGenOpt::Level OL, bool is64bit) in NVPTXTargetMachine() argument
120 : LLVMTargetMachine(T, computeDataLayout(is64bit, UseShortPointersOpt), TT, in NVPTXTargetMachine()
123 is64bit(is64bit), UseShortPointers(UseShortPointersOpt), in NVPTXTargetMachine()
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| /llvm-project-15.0.7/lldb/source/Plugins/ABI/X86/ |
| H A D | ABIX86.cpp | 133 is64bit \
146 is64bit \
171 BaseRegToRegsMap makeBaseRegMap(bool is64bit) { in makeBaseRegMap() argument
183 if (is64bit) { in makeBaseRegMap()
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| /llvm-project-15.0.7/clang/lib/Lex/ |
| H A D | InitHeaderSearch.cpp | 204 bool is64bit = arch == llvm::Triple::ppc64 || arch == llvm::Triple::x86_64; in AddGnuCPlusPlusIncludePaths() local
205 if (is64bit) in AddGnuCPlusPlusIncludePaths()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 416 bool is64bit = VT == MVT::f64; in ARMMaterializeFP() local
423 if (is64bit) { in ARMMaterializeFP()
443 unsigned Opc = is64bit ? ARM::VLDRD : ARM::VLDRS; in ARMMaterializeFP()
1796 bool is64bit = VT == MVT::f64 || VT == MVT::i64; in SelectBinaryFPOp() local
1800 Opc = is64bit ? ARM::VADDD : ARM::VADDS; in SelectBinaryFPOp()
1803 Opc = is64bit ? ARM::VSUBD : ARM::VSUBS; in SelectBinaryFPOp()
1806 Opc = is64bit ? ARM::VMULD : ARM::VMULS; in SelectBinaryFPOp()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 3335 bool is64bit = Subtarget.isPPC64(); in LowerGlobalTLSAddressLinux() local
3377 if (is64bit) { in LowerGlobalTLSAddressLinux()
3404 if (is64bit) { in LowerGlobalTLSAddressLinux()
3430 if (is64bit) { in LowerGlobalTLSAddressLinux()
11576 bool is64bit = Subtarget.isPPC64(); in EmitPartwordAtomicBinary() local
11578 unsigned ZeroReg = is64bit ? PPC::ZERO8 : PPC::ZERO; in EmitPartwordAtomicBinary()
11656 .addReg(Ptr1Reg, 0, is64bit ? PPC::sub_32 : 0) in EmitPartwordAtomicBinary()
11664 if (is64bit) in EmitPartwordAtomicBinary()
12582 bool is64bit = Subtarget.isPPC64(); in EmitInstrWithCustomInserter() local
12671 .addReg(Ptr1Reg, 0, is64bit ? PPC::sub_32 : 0) in EmitInstrWithCustomInserter()
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