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Searched refs:inversion (Results 1 – 11 of 11) sorted by relevance

/llvm-project-15.0.7/bolt/test/X86/
H A Dloop-inversion-pass.s10 # RUN: --print-finalized --loop-inversion-opt -o %t.out \
13 # RUN: --print-finalized --loop-inversion-opt -o %t.out2 \
16 # RUN: --print-finalized --loop-inversion-opt -o %t.out3 \
/llvm-project-15.0.7/compiler-rt/test/tsan/Darwin/
H A Dobjc-synchronize-cycle.mm22 // CHECK: ThreadSanitizer: lock-order-inversion (potential deadlock)
H A Ddeadlock.mm46 // CHECK: WARNING: ThreadSanitizer: lock-order-inversion (potential deadlock)
H A Dobjc-synchronize-cycle-tagged.mm33 // SEVEN: ThreadSanitizer: lock-order-inversion (potential deadlock)
/llvm-project-15.0.7/mlir/lib/Dialect/SCF/Transforms/
H A DTileUsingInterface.cpp71 SmallVector<unsigned> inversion(interchange.size()); in invertPermutationVector() local
73 inversion[pos.value()] = pos.index(); in invertPermutationVector()
75 return inversion; in invertPermutationVector()
/llvm-project-15.0.7/mlir/include/mlir/Dialect/SparseTensor/IR/
H A DSparseTensorOps.td501 Example showing a structural inversion (existing values become missing in
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DREADME-SSE.txt826 and inversion with an rsqrtss instruction, which computes 1/sqrt faster at the
H A DX86InstrAVX512.td3709 // mask inversion when one already exists.
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dselect.ll2949 ; Check that the transformation could be applied after condition's inversion.
/llvm-project-15.0.7/clang/docs/
H A DClangCommandLineReference.rst3473 Disallow converting instructions with negative immediates to their negation or inversion.
/llvm-project-15.0.7/clang/include/clang/Driver/
H A DOptions.td3515 …pText<"Disallow converting instructions with negative immediates to their negation or inversion.">;