| /llvm-project-15.0.7/polly/lib/External/isl/ |
| H A D | isl_morph.c | 48 morph->inv = inv; in isl_morph_alloc() 55 isl_mat_free(inv); in isl_morph_alloc() 100 isl_mat_free(morph->inv); in isl_morph_free() 268 morph->inv = isl_mat_drop_rows(morph->inv, dom_offset + first, n); in isl_morph_remove_dom_dims() 295 morph->inv = isl_mat_drop_cols(morph->inv, ran_offset + first, n); in isl_morph_remove_ran_dims() 572 isl_mat *map, *inv; in isl_basic_set_parameter_compression() local 603 inv = isl_mat_diagonal(inv, isl_mat_identity(bset->ctx, nvar)); in isl_basic_set_parameter_compression() 714 isl_mat *map, *inv; in isl_morph_compose() local 721 inv = isl_mat_product(isl_mat_copy(morph2->inv), isl_mat_copy(morph1->inv)); in isl_morph_compose() 753 morph->map = morph->inv; in isl_morph_inverse() [all …]
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| H A D | isl_farkas.c | 331 return morph ? morph->inv : NULL; in peek_inv() 770 isl_mat *inv; in isl_basic_set_coefficients_morphed_product() local 782 inv = get_inv(f->morph); in isl_basic_set_coefficients_morphed_product() 783 inv = isl_mat_transpose(inv); in isl_basic_set_coefficients_morphed_product() 784 inv = isl_mat_lin_to_aff(inv); in isl_basic_set_coefficients_morphed_product() 788 ma = isl_multi_aff_from_aff_mat(space, inv); in isl_basic_set_coefficients_morphed_product()
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| H A D | isl_morph.h | 35 isl_mat *inv; member 43 __isl_take isl_mat *map, __isl_take isl_mat *inv);
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| /llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/ |
| H A D | rot-02.ll | 16 %inv = sub i32 32, %and 18 %partb = lshr i32 %val, %inv 33 %inv = sub i32 32, %and 35 %partb = lshr i32 %val, %inv 50 %inv = sub i32 32, %and 52 %partb = lshr i32 %val, %inv 67 %inv = sub i64 64, %and 69 %partb = lshr i64 %val, %inv 86 %inv = sub i32 32, %and 88 %partb = lshr i32 %val, %inv
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| H A D | rot-01.ll | 15 %inv = sub i32 32, %mod 17 %partb = lshr i32 %val, %inv 33 %inv = sub i64 64, %mod 35 %partb = lshr i64 %val, %inv
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| /llvm-project-15.0.7/llvm/test/Transforms/LoopUnroll/ |
| H A D | peel-loop-not-forced.ll | 39 ; CHECK-NOT: %half.inv = phi 47 %half.inv = phi i32 [ %a, %entry ], [ %b, %loop ] 48 %plus = phi i32 [ %a, %entry ], [ %half.inv, %loop ] 69 ; CHECK-NOT: %half.inv = phi 70 ; CHECK-NOT: %half.inv.2 = phi 78 %half.inv = phi i32 [ %a, %entry ], [ %b, %loop ] 79 %half.inv.2 = phi i32 [ %a, %entry ], [ %half.inv, %loop ] 104 ; CHECK-NOT: %half.inv = phi 105 ; CHECK-NOT: %half.inv.2 = phi 112 %half.inv = phi i32 [ %a, %entry ], [ %b, %loop ] [all …]
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| H A D | peel-to-turn-invariant-accesses-dereferenceable.ll | 67 %i = load i32, i32* %inv 129 %i = load i32, i32* %inv 191 %i = load i32, i32* %inv 255 %i = load i32, i32* %inv 316 %i = load i32, i32* %inv 337 define i32 @do_not_peel_write2(i32* %ptr, i32 %N, i32* %inv, i32* %dst) { 373 %i = load i32, i32* %inv 403 define i32 @peel_with_deopt_exit(i32* %ptr, i32 %N, i32* %inv, i1 %c.1) { 439 %i = load i32, i32* %inv 495 %i = load i32, i32* %inv [all …]
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| /llvm-project-15.0.7/llvm/test/CodeGen/AVR/ |
| H A D | rot.ll | 22 %inv = sub i8 8, %mod 24 %partb = lshr i8 %val, %inv 50 %inv = sub i8 8, %mod 52 %partb = shl i8 %val, %inv
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| /llvm-project-15.0.7/llvm/test/CodeGen/VE/Scalar/ |
| H A D | rotr.ll | 14 %b.inv = sub nsw i32 64, %b 15 %b.inv64 = zext i32 %b.inv to i64 31 %b.inv = sub nsw i32 32, %b 32 %a.sl = shl i32 %a, %b.inv
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| H A D | rotl.ll | 14 %b.inv = sub nsw i32 64, %b 15 %b.inv64 = zext i32 %b.inv to i64 31 %b.inv = sub nsw i32 32, %b 32 %a.sr = lshr i32 %a, %b.inv
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| /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ |
| H A D | llvm.amdgcn.s.dcache.inv.ll | 4 declare void @llvm.amdgcn.s.dcache.inv() #0 13 call void @llvm.amdgcn.s.dcache.inv() 22 call void @llvm.amdgcn.s.dcache.inv()
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| H A D | llvm.amdgcn.s.dcache.inv.vol.ll | 4 declare void @llvm.amdgcn.s.dcache.inv.vol() #0 13 call void @llvm.amdgcn.s.dcache.inv.vol() 22 call void @llvm.amdgcn.s.dcache.inv.vol()
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| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | 2008-05-22-FoldUnalignedLoad.ll | 6 %inv = call <4 x float> @llvm.x86.sse.rcp.ps(<4 x float> %tmp2) 7 store <4 x float> %inv, ptr %x, align 1
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| /llvm-project-15.0.7/llvm/test/CodeGen/WinEH/ |
| H A D | wineh-setjmp.ll | 17 %inv = invoke i32 (i8*, i32, ...) @_setjmp3(i8* @jb, i32 0) #2 27 ret i32 %inv 49 %inv = invoke i32 (i8*, i32, ...) @_setjmp3(i8* @jb, i32 0) #2 58 ret i32 %inv
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| /llvm-project-15.0.7/llvm/test/Transforms/StructurizeCFG/ |
| H A D | branch-on-argument.ll | 5 ; CHECK: %arg.inv = xor i1 %arg, true 25 ; CHECK: %arg.inv = xor i1 %arg, true
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| H A D | one-loop-multiple-backedges.ll | 11 ; CHECK: %tmp4.inv = xor i1 %tmp4, true 12 ; CHECK: br i1 %tmp4.inv, label %bb5, label %Flow
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| /llvm-project-15.0.7/clang/test/Analysis/ |
| H A D | array-struct.c | 167 void inv(struct s1 *); 173 inv(&t); in f17()
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| /llvm-project-15.0.7/llvm/test/Other/ |
| H A D | new-pm-eager-invalidate.ll | 3 ; RUN: opt -disable-verify -debug-pass-manager -passes='function<eager-inv>(require<no-op-function>… 4 ; RUN: opt -disable-verify -debug-pass-manager -passes='cgscc(function<eager-inv>(require<no-op-fun…
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| /llvm-project-15.0.7/llvm/test/Feature/ |
| H A D | memorymarkers.ll | 27 %inv = call {}* @llvm.invariant.start.p0i8(i64 8, i8* %y) 32 call void @llvm.invariant.end.p0i8({}* %inv, i64 8, i8* %y)
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| /llvm-project-15.0.7/polly/test/ScopInfo/ |
| H A D | invariant_load_base_pointer_in_conditional.ll | 34 %inv = load i32, i32 *%BP 35 store i32 %inv, i32* %tmp9a, align 4
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| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/ |
| H A D | arm64-early-ifcvt.ll | 119 %inv = xor i32 %x, -1 126 %cond = phi i32 [ %y, %eq_bb ], [ %inv, %entry ] 137 %inv = xor i64 %x, -1 144 %cond = phi i64 [ %y, %eq_bb ], [ %inv, %entry ] 155 %inv = xor i32 %x, -1 162 %cond = phi i32 [ %inv, %eq_bb ], [ %y, %entry ] 173 %inv = xor i64 %x, -1 180 %cond = phi i64 [ %inv, %eq_bb ], [ %y, %entry ]
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| H A D | eliminate-trunc.ll | 9 define void @test1_signed([8 x i8]* nocapture %a, i8* nocapture readonly %box, i8 %limit, i64 %inv)… 17 %arrayidx6.us = getelementptr inbounds [8 x i8], [8 x i8]* %a, i64 %indvars.iv, i64 %inv
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| H A D | inline-asm-constraints-bad-sve.ll | 32 define half @foo4(<vscale x 16 x i1> *%inp, <vscale x 8 x half> *%inv) { 35 %1 = load <vscale x 8 x half>, <vscale x 8 x half>* %inv, align 16
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| H A D | arm64-arith.ll | 213 %inv = xor i32 %x, -1 214 ret i32 %inv 223 %inv = xor i64 %x, -1 224 ret i64 %inv
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| /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/AArch64/ |
| H A D | sve-extract-last-veclane.ll | 6 define void @inv_store_last_lane(i32* noalias nocapture %a, i32* noalias nocapture %inv, i32* noali… 31 %arrayidx5 = getelementptr inbounds i32, i32* %inv, i64 42
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