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/llvm-project-15.0.7/llvm/test/CodeGen/WebAssembly/
H A Dtarget-features.ll59 ; ATTRS-NEXT: .int8 3
60 ; ATTRS-NEXT: .int8 43
61 ; ATTRS-NEXT: .int8 7
63 ; ATTRS-NEXT: .int8 43
64 ; ATTRS-NEXT: .int8 19
66 ; ATTRS-NEXT: .int8 43
67 ; ATTRS-NEXT: .int8 15
71 ; SIMD128-NEXT: .int8 4
72 ; SIMD128-NEXT: .int8 43
73 ; SIMD128-NEXT: .int8 7
[all …]
H A Dtarget-features-tls.ll13 ; NO-BULK-MEM-NEXT: .int8 2
14 ; NO-BULK-MEM-NEXT: .int8 43
15 ; NO-BULK-MEM-NEXT: .int8 7
17 ; NO-BULK-MEM-NEXT: .int8 45
18 ; NO-BULK-MEM-NEXT: .int8 10
24 ; BULK-MEM-NEXT: .int8 2
25 ; BULK-MEM-NEXT: .int8 43
26 ; BULK-MEM-NEXT: .int8 7
28 ; BULK-MEM-NEXT: .int8 43
29 ; BULK-MEM-NEXT: .int8 11
H A Dcustom-sections.ll32 ; CHECK-NEXT: .int8 2
33 ; CHECK-NEXT: .int8 8
35 ; CHECK-NEXT: .int8 1
36 ; CHECK-NEXT: .int8 3
38 ; CHECK-NEXT: .int8 0
39 ; CHECK-NEXT: .int8 12
41 ; CHECK-NEXT: .int8 1
42 ; CHECK-NEXT: .int8 5
44 ; CHECK-NEXT: .int8 3
H A Deh-lsda.ll93 ; CHECK-NEXT: .int8 0 # >> Call Site 0 <<
95 ; CHECK-NEXT: .int8 7 # Action: 4
96 ; CHECK-NEXT: .int8 1 # >> Call Site 1 <<
98 ; CHECK-NEXT: .int8 3 # Action: 2
99 ; CHECK-NEXT: .int8 2 # >> Call Site 2 <<
101 ; CHECK-NEXT: .int8 11 # Action: 6
103 ; CHECK-NEXT: .int8 1 # >> Action Record 1 <<
105 ; CHECK-NEXT: .int8 0 # No further actions
106 ; CHECK-NEXT: .int8 2 # >> Action Record 2 <<
109 ; CHECK-NEXT: .int8 3 # >> Action Record 3 <<
[all …]
H A Dreference-types.ll10 ; CHECK: .int8 1
11 ; CHECK-NEXT: .int8 43
12 ; CHECK-NEXT: .int8 15
H A Dstackified-debug.ll28 ; CHECK: .int8 237 # DW_OP_WASM_location
29 ; CHECK: .int8 2 # 2
30 ; CHECK: .int8 0 # 0
31 ; CHECK: .int8 159 # DW_OP_stack_value
40 ; CHECK: .int8 237 # DW_OP_WASM_location
41 ; CHECK: .int8 2 # 2
42 ; CHECK: .int8 1 # 1
43 ; CHECK: .int8 159 # DW_OP_stack_value
H A Dmemory64-feature.ll12 ; CHECK-NEXT: .int8 1
13 ; CHECK-NEXT: .int8 43
14 ; CHECK-NEXT: .int8 8
H A Dmutable-globals.ll12 ; CHECK-NEXT: .int8 1
13 ; CHECK-NEXT: .int8 43
14 ; CHECK-NEXT: .int8 15
/llvm-project-15.0.7/clang/test/SemaOpenCL/
H A Dformat-strings-fixit.cl27 printf("%v4d", (int8) 123);
28 // CHECK: printf("%v8hld", (int8) 123);
30 printf("%v4f", (int8) 123);
31 // CHECK: printf("%v8hld", (int8) 123);
33 printf("%v4ld", (int8) 123);
34 // CHECK: printf("%v8hld", (int8) 123);
42 printf("%v4hld", (int8) 123);
43 // CHECK: printf("%v8hld", (int8) 123);
45 printf("%v4hlf", (int8) 123);
46 // CHECK: printf("%v8hld", (int8) 123);
[all …]
H A Dinvalid-vector-literals.cl5 typedef __attribute__(( ext_vector_type(8) )) int int8;
11 …int8 d = (int8)(a,(float4)(1)); // expected-error{{initializing 'int' with an expression of incomp…
H A Dvec_step.cl6 typedef int int8 __attribute__((ext_vector_type(8)));
9 void foo(int3 arg1, int8 arg2) {
25 int res10[vec_step(int8) == 8 ? 1 : -1];
/llvm-project-15.0.7/lld/test/wasm/
H A Dtls-export.s13 .int8 3
14 .int8 43
15 .int8 7
17 .int8 43
18 .int8 11
20 .int8 43
21 .int8 15
H A Dno-tls.s12 .int8 2
13 .int8 43
14 .int8 7
16 .int8 43
17 .int8 11
H A Dtls-non-shared-memory-basic.s14 .int8 2
15 .int8 43
16 .int8 7
18 .int8 43
19 .int8 11
H A Dtls_init_symbols.s29 .int8 2
30 .int8 43
31 .int8 7
33 .int8 43
34 .int8 11
H A Dtls-align.s50 .int8 2
51 .int8 43
52 .int8 7
54 .int8 43
55 .int8 11
H A Dshared-memory-bss.s21 .int8 2
22 .int8 43
23 .int8 7
25 .int8 43
26 .int8 11
H A Dtls-non-shared-memory.s37 .int8 2
38 .int8 43
39 .int8 7
41 .int8 43
42 .int8 11
H A Dtls.s78 .int8 2
79 .int8 43
80 .int8 7
82 .int8 43
83 .int8 11
/llvm-project-15.0.7/llvm/test/MC/WebAssembly/
H A Dbad-fixup-expr.s5 .int8 1
8 .int8 1
13 .int8 1
18 .int8 1
H A Dsection-symbol.s9 .int8 1
14 # CHECK-NEXT: .int8 1
/llvm-project-15.0.7/clang/include/clang/Basic/
H A DBuiltinsX86_64.def112 TARGET_BUILTIN(__builtin_ia32_tdpbssd_internal, "V256iUsUsUsV256iV256iV256i", "n", "amx-int8")
113 TARGET_BUILTIN(__builtin_ia32_tdpbsud_internal, "V256iUsUsUsV256iV256iV256i", "n", "amx-int8")
114 TARGET_BUILTIN(__builtin_ia32_tdpbusd_internal, "V256iUsUsUsV256iV256iV256i", "n", "amx-int8")
115 TARGET_BUILTIN(__builtin_ia32_tdpbuud_internal, "V256iUsUsUsV256iV256iV256i", "n", "amx-int8")
129 TARGET_BUILTIN(__builtin_ia32_tdpbssd, "vIUcIUcIUc", "n", "amx-int8")
130 TARGET_BUILTIN(__builtin_ia32_tdpbsud, "vIUcIUcIUc", "n", "amx-int8")
131 TARGET_BUILTIN(__builtin_ia32_tdpbusd, "vIUcIUcIUc", "n", "amx-int8")
132 TARGET_BUILTIN(__builtin_ia32_tdpbuud, "vIUcIUcIUc", "n", "amx-int8")
/llvm-project-15.0.7/lldb/examples/python/
H A Dmemory.py65 int8 = int(value, 0)
66 parser.values.data += struct.pack('1B', int8)
77 int8 = int(value, 0)
78 parser.values.data += struct.pack('1b', int8)
/llvm-project-15.0.7/clang/lib/Headers/
H A Dopencl-c.h9149 int8 __ovld __cnfn hadd(int8, int8);
9255 int8 __ovld __cnfn clamp(int8, int8, int8);
9456 int8 __ovld __cnfn mad_hi(int8, int8, int8);
9508 int8 __ovld __cnfn mad_sat(int8, int8, int8);
9560 int8 __ovld __cnfn max(int8, int8);
9652 int8 __ovld __cnfn min(int8, int8);
9989 int8 __ovld __cnfn mad24(int8, int8, int8);
10977 int8 __ovld __cnfn bitselect(int8, int8, int8);
11057 int8 __ovld __cnfn select(int8, int8, int8);
18211 int8 __ovld amd_max3(int8 src0, int8 src1, int8 src2);
[all …]
/llvm-project-15.0.7/libclc/generic/include/clc/math/
H A Dgentype.inc37 #define __CLC_INTN int8
95 #define __CLC_INTN int8
155 #define __CLC_INTN int8

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